/linux/drivers/gpu/ipu-v3/ |
H A D | ipu-pre.c | 126 struct ipu_pre *pre; in ipu_pre_lookup_by_phandle() local 129 list_for_each_entry(pre, &ipu_pre_list, list) { in ipu_pre_lookup_by_phandle() 130 if (pre_node == pre->dev->of_node) { in ipu_pre_lookup_by_phandle() 132 device_link_add(dev, pre->dev, in ipu_pre_lookup_by_phandle() 134 return pre; in ipu_pre_lookup_by_phandle() 142 int ipu_pre_get(struct ipu_pre *pre) in ipu_pre_get() argument 146 if (pre->cur.in_use) in ipu_pre_get() 150 writel(0, pre->regs + IPU_PRE_CTRL); in ipu_pre_get() 157 writel(val, pre->regs + IPU_PRE_CTRL); in ipu_pre_get() 159 pre->cur.in_use = true; in ipu_pre_get() [all …]
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/linux/drivers/firmware/broadcom/ |
H A D | bcm47xx_sprom.c | 191 const char *pre = prefix; in bcm47xx_sprom_fill_auto() local 195 ENTRY(0xfffffffe, u16, pre, "devid", dev_id, 0, fallback); in bcm47xx_sprom_fill_auto() 197 ENTRY(0xfffffffe, u16, pre, "boardrev", board_rev, 0, true); in bcm47xx_sprom_fill_auto() 198 ENTRY(0xfffffffe, u32, pre, "boardflags", boardflags, 0, fb); in bcm47xx_sprom_fill_auto() 199 ENTRY(0xfffffff0, u32, pre, "boardflags2", boardflags2, 0, fb); in bcm47xx_sprom_fill_auto() 200 ENTRY(0xfffff800, u32, pre, "boardflags3", boardflags3, 0, fb); in bcm47xx_sprom_fill_auto() 201 ENTRY(0x00000002, u16, pre, "boardflags", boardflags_lo, 0, fb); in bcm47xx_sprom_fill_auto() 202 ENTRY(0xfffffffc, u16, pre, "boardtype", board_type, 0, true); in bcm47xx_sprom_fill_auto() 203 ENTRY(0xfffffffe, u16, pre, "boardnum", board_num, 0, fb); in bcm47xx_sprom_fill_auto() 204 ENTRY(0x00000002, u8, pre, "cc", country_code, 0, fb); in bcm47xx_sprom_fill_auto() [all …]
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/linux/Documentation/netlink/specs/ |
H A D | devlink.yaml | 1238 pre: devlink-nl-pre-doit 1261 pre: devlink-nl-pre-doit-port 1286 pre: devlink-nl-pre-doit-port 1303 pre: devlink-nl-pre-doit 1325 pre: devlink-nl-pre-doit-port 1337 pre: devlink-nl-pre-doit-port 1353 pre: devlink-nl-pre-doit-port 1364 pre: devlink-nl-pre-doit 1386 pre: devlink-nl-pre-doit 1410 pre: devlink-nl-pre-doit [all …]
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/linux/Documentation/livepatch/ |
H A D | callbacks.rst | 39 * Pre-patch 46 * Pre-unpatch 54 used to cleanup pre-patch callback resources 61 symmetry: pre-patch callbacks have a post-unpatch counterpart and 62 post-patch callbacks have a pre-unpatch counterpart. An unpatch 75 The pre-patch callback, if specified, is expected to return a status 78 safe and to stop the current patching request. (When no pre-patch 80 pre-patch callback returns failure, the kernel's module loader will: 90 No post-patch, pre-unpatch, or post-unpatch callbacks will be executed 94 If a patch transition is reversed, no pre-unpatch handlers will be run [all …]
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/linux/sound/pci/ctxfi/ |
H A D | ctimap.c | 21 struct list_head *pos, *pre, *head; in input_mapper_add() local 42 pre = pos->prev; in input_mapper_add() 43 if (pre == head) in input_mapper_add() 44 pre = head->prev; in input_mapper_add() 48 pre = head->prev; in input_mapper_add() 53 pre_ent = list_entry(pre, struct imapper, list); in input_mapper_add() 67 struct list_head *next, *pre, *head; in input_mapper_delete() local 75 pre = (entry->list.prev == head) ? head->prev : entry->list.prev; in input_mapper_delete() 78 if (pre == &entry->list) { in input_mapper_delete() 86 pre_ent = list_entry(pre, struct imapper, list); in input_mapper_delete()
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/linux/Documentation/devicetree/bindings/input/ |
H A D | ti,drv260x.yaml | 46 These are ROM based waveforms pre-programmed into the IC. 50 DRV260X_LIB_EMPTY - Do not use a pre-programmed library 51 DRV260X_ERM_LIB_A - Pre-programmed Library 52 DRV260X_ERM_LIB_B - Pre-programmed Library 53 DRV260X_ERM_LIB_C - Pre-programmed Library 54 DRV260X_ERM_LIB_D - Pre-programmed Library 55 DRV260X_ERM_LIB_E - Pre-programmed Library 56 DRV260X_ERM_LIB_F - Pre-programmed Library 57 DRV260X_LIB_LRA - Pre-programmed LRA Library
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/linux/arch/arm64/boot/dts/qcom/ |
H A D | pm7250b.dtsi | 112 qcom,pre-scaling = <1 1>; 118 qcom,pre-scaling = <1 1>; 124 qcom,pre-scaling = <1 1>; 130 qcom,pre-scaling = <1 1>; 136 qcom,pre-scaling = <1 16>; 142 qcom,pre-scaling = <1 1>; 149 qcom,pre-scaling = <1 1>; 155 qcom,pre-scaling = <1 6>; 162 qcom,pre-scaling = <1 1>; 169 qcom,pre-scaling = <1 3>; [all …]
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H A D | pm8950.dtsi | 63 qcom,pre-scaling = <1 1>; 69 qcom,pre-scaling = <1 1>; 75 qcom,pre-scaling = <1 1>; 81 qcom,pre-scaling = <1 1>; 87 qcom,pre-scaling = <1 1>; 93 qcom,pre-scaling = <1 1>; 109 qcom,pre-scaling = <1 1>; 117 qcom,pre-scaling = <1 1>; 125 qcom,pre-scaling = <1 1>; 133 qcom,pre-scaling = <1 1>; [all …]
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H A D | pmp8074.dtsi | 23 qcom,pre-scaling = <1 1>; 29 qcom,pre-scaling = <1 1>; 35 qcom,pre-scaling = <1 1>; 41 qcom,pre-scaling = <1 1>; 49 qcom,pre-scaling = <1 1>; 57 qcom,pre-scaling = <1 1>; 65 qcom,pre-scaling = <1 1>; 73 qcom,pre-scaling = <1 1>; 79 qcom,pre-scaling = <1 3>;
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H A D | pm660.dtsi | 113 qcom,pre-scaling = <1 1>; 120 qcom,pre-scaling = <1 1>; 127 qcom,pre-scaling = <1 1>; 133 qcom,pre-scaling = <1 1>; 142 qcom,pre-scaling = <1 1>; 151 qcom,pre-scaling = <1 1>; 160 qcom,pre-scaling = <1 1>; 169 qcom,pre-scaling = <1 1>; 178 qcom,pre-scaling = <1 1>; 188 qcom,pre-scaling = <1 3>; [all …]
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H A D | pmi632.dtsi | 94 qcom,pre-scaling = <1 1>; 100 qcom,pre-scaling = <1 1>; 106 qcom,pre-scaling = <1 1>; 112 qcom,pre-scaling = <1 1>; 118 qcom,pre-scaling = <1 16>; 124 qcom,pre-scaling = <1 1>; 131 qcom,pre-scaling = <1 1>; 138 qcom,pre-scaling = <1 3>; 144 qcom,pre-scaling = <1 3>;
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H A D | sc8180x-pmics.dtsi | 108 qcom,pre-scaling = <1 1>; 114 qcom,pre-scaling = <1 1>; 120 qcom,pre-scaling = <1 1>; 176 qcom,pre-scaling = <1 1>; 182 qcom,pre-scaling = <1 1>; 188 qcom,pre-scaling = <1 1>; 234 qcom,pre-scaling = <1 1>; 240 qcom,pre-scaling = <1 1>; 246 qcom,pre-scaling = <1 1>; 284 qcom,pre-scaling = <1 1>; [all …]
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H A D | pms405.dtsi | 85 qcom,pre-scaling = <1 1>; 91 qcom,pre-scaling = <1 1>; 97 qcom,pre-scaling = <1 3>; 103 qcom,pre-scaling = <1 1>; 111 qcom,pre-scaling = <1 1>; 119 qcom,pre-scaling = <1 1>; 127 qcom,pre-scaling = <1 1>;
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H A D | pm6125.dtsi | 89 qcom,pre-scaling = <1 1>; 95 qcom,pre-scaling = <1 1>; 101 qcom,pre-scaling = <1 1>; 107 qcom,pre-scaling = <1 3>; 113 qcom,pre-scaling = <1 3>; 119 qcom,pre-scaling = <1 1>;
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/linux/arch/arm/boot/dts/nxp/imx/ |
H A D | imx6qp.dtsi | 28 pre1: pre@21c8000 { 29 compatible = "fsl,imx6qp-pre"; 37 pre2: pre@21c9000 { 38 compatible = "fsl,imx6qp-pre"; 46 pre3: pre@21ca000 { 47 compatible = "fsl,imx6qp-pre"; 55 pre4: pre@21cb000 { 56 compatible = "fsl,imx6qp-pre";
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/linux/drivers/crypto/intel/qat/qat_common/ |
H A D | adf_mstate_mgr.c | 97 struct adf_mstate_preh *pre = (struct adf_mstate_preh *)mgr->buf; in adf_mstate_preamble_add() local 99 if (adf_mstate_avail_room(mgr) < sizeof(*pre)) { in adf_mstate_preamble_add() 104 adf_mstate_preamble_init(pre); in adf_mstate_preamble_add() 105 mgr->state += pre->preh_len; in adf_mstate_preamble_add() 107 return pre; in adf_mstate_preamble_add() 263 struct adf_mstate_preh *pre; in adf_mstate_mgr_init_from_remote() local 267 pre = (struct adf_mstate_preh *)(mgr->buf); in adf_mstate_mgr_init_from_remote() 270 print_hex_dump_debug("", DUMP_PREFIX_OFFSET, 16, 2, pre, pre->preh_len, 0); in adf_mstate_mgr_init_from_remote() 273 ret = (*pre_checker)(pre, opaque); in adf_mstate_mgr_init_from_remote() 275 ret = adf_mstate_preamble_def_checker(pre, mgr); in adf_mstate_mgr_init_from_remote() [all …]
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/linux/Documentation/gpu/amdgpu/display/ |
H A D | display-manager.rst | 60 pre-blending but DRM/KMS has not per-plane color correction properties. 63 CRTC gamma after blending, and CRTC degamma pre-blending. Although CTM is 64 programmed after blending, it is mapped to DPP hw blocks (pre-blending). Other 119 * **Pre-multiplied**: Blend formula that assumes the pixel color values in a 120 plane was already pre-multiplied by its own alpha channel before storage. 123 pre-multiplied with the alpha channel values. 125 and pre-multiplied is the default pixel blend mode, that means, when no blend 127 pre-multiplied color values. On IGT GPU tools, the kms_plane_alpha_blend test 139 :c:type:`pre_multiplied_alpha` is the alpha pre-multiplied mode flag used to 141 multiplied (true/false), being only true for DRM pre-multiplied blend mode. [all …]
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/linux/sound/core/ |
H A D | pcm_memory.c | 127 * Releases the pre-allocated buffer of the given substream. 135 * snd_pcm_lib_preallocate_free_for_all - release all pre-allocated buffers on the pcm 138 * Releases all the pre-allocated buffers on the given pcm. 259 * pre-allocate the buffer and create a proc file for the substream 313 * snd_pcm_lib_preallocate_pages - pre-allocation for the given DMA type 317 * @size: the requested pre-allocation size in bytes 318 * @max: the max. allowed pre-allocation size 320 * Do pre-allocation for the given DMA buffer type. 331 …* snd_pcm_lib_preallocate_pages_for_all - pre-allocation for continuous memory type (all substream… 335 * @size: the requested pre-allocation size in bytes [all …]
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/linux/Documentation/devicetree/bindings/power/supply/ |
H A D | richtek,rt5033-charger.yaml | 27 Current of pre-charge mode. The pre-charge current levels are 350 mA 40 Voltage of pre-charge mode. If the battery voltage is below the pre-charge 41 threshold voltage, the charger is in pre-charge mode with pre-charge
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/linux/tools/memory-model/ |
H A D | linux-kernel.cat | 187 let w-pre-bounded = [Marked] ; (addr | fence)? 188 let r-pre-bounded = [Marked] ; (addr | nonrw-fence | 195 let ww-vis = fence | (strong-fence ; xbstar ; w-pre-bounded) | 196 (w-post-bounded ; vis ; w-pre-bounded) 197 let wr-vis = fence | (strong-fence ; xbstar ; r-pre-bounded) | 198 (w-post-bounded ; vis ; r-pre-bounded) 199 let rw-xbstar = fence | (r-post-bounded ; xbstar ; w-pre-bounded) 202 let pre-race = ext & ((Plain * M) | ((M \ IW) * Plain)) 205 let wr-incoh = pre-race & rf & rw-xbstar^-1 206 let rw-incoh = pre-race & fr & wr-vis^-1 [all …]
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/linux/drivers/gpu/drm/i915/gvt/ |
H A D | mmio_context.c | 407 static void switch_mocs(struct intel_vgpu *pre, struct intel_vgpu *next, in switch_mocs() argument 428 if (!pre && !gen9_render_mocs.initialized) in switch_mocs() 433 if (pre) in switch_mocs() 434 old_v = vgpu_vreg_t(pre, offset); in switch_mocs() 451 if (pre) in switch_mocs() 452 old_v = vgpu_vreg_t(pre, l3_offset); in switch_mocs() 481 static void switch_mmio(struct intel_vgpu *pre, in switch_mmio() argument 491 switch_mocs(pre, next, engine); in switch_mmio() 506 if (pre) { in switch_mmio() 507 vgpu_vreg_t(pre, mmio->reg) = in switch_mmio() [all …]
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/linux/Documentation/devicetree/bindings/hwmon/ |
H A D | moortec,mr75203.yaml | 25 *) Pre Scaler - provides divide-by-X scaling of input voltage, which can then 27 divide by 2 pre-scaler). 82 moortec,vm-pre-scaler-x2: 84 Defines the channels that use a mr76006 pre-scaler to divide the input 86 The pre-scaler is used for input sources that exceed the VM input range. 89 For channels that are not listed, no pre-scaler is assumed. 160 moortec,vm-pre-scaler-x2 = /bits/ 8 <5 6 20>;
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/linux/Documentation/userspace-api/media/v4l/ |
H A D | ext-ctrls-fm-tx.rst | 34 to 31 pre-defined programme types. 150 Configures the pre-emphasis value for broadcasting. A pre-emphasis 154 values for pre-emphasis. Here they are: 163 - No pre-emphasis is applied. 165 - A pre-emphasis of 50 uS is used. 167 - A pre-emphasis of 75 uS is used.
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/linux/drivers/gpu/drm/i915/display/ |
H A D | intel_dp_aux_regs.h | 58 #define DP_AUX_CH_CTL_PRECHARGE_2US_MASK REG_GENMASK(19, 16) /* pre-skl */ 63 #define DP_AUX_CH_CTL_MANCHESTER_TEST REG_BIT(14) /* pre-hsw */ 65 #define DP_AUX_CH_CTL_SYNC_TEST REG_BIT(13) /* pre-hsw */ 67 #define DP_AUX_CH_CTL_DEGLITCH_TEST REG_BIT(12) /* pre-hsw */ 69 #define DP_AUX_CH_CTL_PRECHARGE_TEST REG_BIT(11) /* pre-hsw */ 71 #define DP_AUX_CH_CTL_BIT_CLOCK_2X_MASK REG_GENMASK(10, 0) /* pre-skl */
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/linux/drivers/media/pci/intel/ipu6/ |
H A D | ipu6.h | 116 * Threshold values are pre-defined and are arrived at after performance 147 * or Zero length write, is pre-fetch mechanism to pre-fetch the pages in 186 * MMU1 support pre-fetching of the pages to have less cache lookup misses. To 187 * enable the pre-fetching, MMU1 AT (Address Translator) device registers 191 * ZLW(Zero Length Write) is a mechanism to enable VT-d pre-fetching on IOMMU. 197 * N is pre-defined and hardcoded in the platform data 230 * Currently L1/L2 streams, blocks, AT ZLW configurations etc. are pre-defined 231 * as per the usecase specific calculations. Any change to this pre-defined
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