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12

/linux/Documentation/devicetree/bindings/display/bridge/
H A Dtoshiba,tc358767.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrey Gusakov <andrey.gusakov@cogentembedded.com>
19 - items:
20 - enum:
21 - toshiba,tc358867
22 - toshiba,tc9595
23 - const: toshiba,tc358767
24 - const: toshiba,tc358767
[all …]
H A Danalogix,anx7625.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Xin Ji <xji@analogixsemi.com>
14 The ANX7625 is an ultra-low power 4K Mobile HD Transmitter
28 enable-gpios:
32 reset-gpios:
36 vdd10-supply:
39 vdd18-supply:
42 vdd33-supply:
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/linux/drivers/phy/rockchip/
H A Dphy-rockchip-usbdp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2021-2024 Rockchip Electronics Co., Ltd
9 #include <dt-bindings/phy/phy.h>
115 /* u2phy-grf */
119 /* usb-grf */
123 /* usbdpphy-grf */
129 /* vo-grf */
179 bool hs; /* flag for high-speed */
206 /* voltage swing 0, pre-emphasis 0->3 */
214 /* voltage swing 1, pre-emphasis 0->2 */
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H A Dphy-rockchip-samsung-hdptx.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2021-2022 Rockchip Electronics Co., Ltd.
6 * Author: Algea Cao <algea.cao@rock-chips.com>
11 #include <linux/clk-provider.h>
693 /* voltage swing 0, pre-emphasis 0->3 */
701 /* voltage swing 1, pre-emphasis 0->2 */
708 /* voltage swing 2, pre-emphasis 0->1 */
714 /* voltage swing 3, pre-emphasis 0 */
721 /* voltage swing 0, pre-emphasis 0->3 */
729 /* voltage swing 1, pre-emphasis 0->2 */
[all …]
/linux/Documentation/devicetree/bindings/phy/
H A Dapm,xgene-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/apm,xgene-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: APM X-Gene 15Gbps Multi-purpose PHY
10 - Khuong Dinh <khuong@os.amperecomputing.com>
13 PHY nodes are defined to describe on-chip 15Gbps Multi-purpose PHY. Each
19 - const: apm,xgene-phy
24 '#phy-cells':
32 apm,tx-eye-tuning:
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H A Dqcom,snps-eusb2-repeater.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,snps-eusb2-repeater.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Abel Vesa <abel.vesa@linaro.org>
19 - items:
20 - enum:
21 - qcom,pm7550ba-eusb2-repeater
22 - const: qcom,pm8550b-eusb2-repeater
23 - enum:
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H A Dmediatek,tphy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: MediaTek T-PHY Controller
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 The T-PHY controller supports physical layer functionality for a number of
17 Layout differences of banks between T-PHY V1 (mt8173/mt2701) and
18 T-PHY V2 (mt2712) / V3 (mt8195) when works on USB mode:
19 -----------------------------------
67 pattern: "^t-phy(@[0-9a-f]+)?$"
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H A Dphy-stm32-usbphyc.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/phy-stm32-usbphyc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
22 |_ PHY port#2 ----| |________________
27 - Amelie Delaunay <amelie.delaunay@foss.st.com>
31 const: st,stm32mp1-usbphyc
42 "#address-cells":
45 "#size-cells":
48 vdda1v1-supply:
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/linux/include/linux/phy/
H A Dphy-dp.h1 /* SPDX-License-Identifier: GPL-2.0 */
15 * struct phy_configure_opts_dp - DisplayPort PHY configuration set
52 * @pre:
54 * Pre-emphasis levels, as specified by DisplayPort specification, to be
59 unsigned int pre[4]; member
64 * Flag indicating, whether or not to enable spread-spectrum clocking.
91 * and pre-emphasis to requested values. Only lanes specified
/linux/drivers/gpu/drm/sti/
H A Dsti_hdmi_tx3g4c28phy.c1 // SPDX-License-Identifier: GPL-2.0
70 * sti_hdmi_tx3g4c28phy_start - Start hdmi phy macro cell tx3g4c28
78 u32 ckpxpll = hdmi->mode.clock * 1000; in sti_hdmi_tx3g4c28phy_start()
116 hdmi->event_received = false; in sti_hdmi_tx3g4c28phy_start()
121 wait_event_interruptible_timeout(hdmi->wait_event, in sti_hdmi_tx3g4c28phy_start()
122 hdmi->event_received == true, in sti_hdmi_tx3g4c28phy_start()
142 * To configure the source termination and pre-emphasis appropriately in sti_hdmi_tx3g4c28phy_start()
168 * Default, power up the serializer with no pre-emphasis or in sti_hdmi_tx3g4c28phy_start()
182 * sti_hdmi_tx3g4c28phy_stop - Stop hdmi phy macro cell tx3g4c28
192 hdmi->event_received = false; in sti_hdmi_tx3g4c28phy_stop()
[all …]
/linux/include/sound/
H A Dak4117.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
27 #define AK4117_REG_QSUB_ADDR 0x11 /* Q-subcode address + control */
28 #define AK4117_REG_QSUB_TRACK 0x12 /* Q-subcode track */
29 #define AK4117_REG_QSUB_INDEX 0x13 /* Q-subcode index */
30 #define AK4117_REG_QSUB_MINUTE 0x14 /* Q-subcode minute */
31 #define AK4117_REG_QSUB_SECOND 0x15 /* Q-subcode second */
32 #define AK4117_REG_QSUB_FRAME 0x16 /* Q-subcode frame */
33 #define AK4117_REG_QSUB_ZERO 0x17 /* Q-subcode zero */
34 #define AK4117_REG_QSUB_ABSMIN 0x18 /* Q-subcode absolute minute */
35 #define AK4117_REG_QSUB_ABSSEC 0x19 /* Q-subcode absolute second */
[all …]
H A Dak4113.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
50 /* Q-subcode address + control */
52 /* Q-subcode track */
54 /* Q-subcode index */
56 /* Q-subcode minute */
58 /* Q-subcode second */
60 /* Q-subcode frame */
62 /* Q-subcode zero */
64 /* Q-subcode absolute minute */
66 /* Q-subcode absolute second */
[all …]
H A Dak4114.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
33 #define AK4114_REG_QSUB_ADDR 0x16 /* Q-subcode address + control */
34 #define AK4114_REG_QSUB_TRACK 0x17 /* Q-subcode track */
35 #define AK4114_REG_QSUB_INDEX 0x18 /* Q-subcode index */
36 #define AK4114_REG_QSUB_MINUTE 0x19 /* Q-subcode minute */
37 #define AK4114_REG_QSUB_SECOND 0x1a /* Q-subcode second */
38 #define AK4114_REG_QSUB_FRAME 0x1b /* Q-subcode frame */
39 #define AK4114_REG_QSUB_ZERO 0x1c /* Q-subcode zero */
40 #define AK4114_REG_QSUB_ABSMIN 0x1d /* Q-subcode absolute minute */
41 #define AK4114_REG_QSUB_ABSSEC 0x1e /* Q-subcode absolute second */
[all …]
/linux/Documentation/devicetree/bindings/usb/
H A Dchipidea,usb2-imx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/chipidea,usb2-imx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Xu Yang <xu.yang_2@nxp.com>
15 - enum:
16 - fsl,imx27-usb
17 - items:
18 - enum:
19 - fsl,imx23-usb
[all …]
/linux/drivers/phy/qualcomm/
H A Dphy-qcom-snps-femto-v2.c1 // SPDX-License-Identifier: GPL-2.0
82 "vdda-pll", "vdda33", "vdda18",
110 * struct qcom_snps_hsphy - snps hs phy attributes
143 struct device *dev = hsphy->dev; in qcom_snps_hsphy_clk_init()
145 hsphy->num_clks = 2; in qcom_snps_hsphy_clk_init()
146 hsphy->clks = devm_kcalloc(dev, hsphy->num_clks, sizeof(*hsphy->clks), GFP_KERNEL); in qcom_snps_hsphy_clk_init()
147 if (!hsphy->clks) in qcom_snps_hsphy_clk_init()
148 return -ENOMEM; in qcom_snps_hsphy_clk_init()
154 hsphy->clks[0].id = "cfg_ahb"; in qcom_snps_hsphy_clk_init()
155 hsphy->clks[0].clk = devm_clk_get_optional(dev, "cfg_ahb"); in qcom_snps_hsphy_clk_init()
[all …]
H A Dphy-qcom-qusb2.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/nvmem-consumer.h>
22 #include <dt-bindings/phy/phy-qcom-qusb2.h>
105 * if yes, then offset gives index in the reg-layout
123 /* set of registers with offsets different per-PHY */
307 /* true if PHY default clk scheme is single-ended */
397 "vdd", "vdda-pll", "vdda-phy-dpdm",
402 /* struct override_param - structure holding qusb2 v2 phy overriding param
411 /*struct override_params - structure holding qusb2 v2 phy overriding params
414 * @preemphasis: Amplitude Pre-Emphasis to be updated in TUNE1 register
[all …]
/linux/drivers/gpu/drm/i915/display/
H A Dintel_fdi_regs.h1 /* SPDX-License-Identifier: MIT */
48 /* ILK always use 400mV 0dB for voltage swing and pre-emphasis level.
50 /* SNB A-stepping */
55 /* SNB B-stepping */
63 #define FDI_DP_PORT_WIDTH(width) (((width) - 1) << FDI_DP_PORT_WIDTH_SHIFT)
80 /* FDI_RX, FDI_X is hard-wired to Transcoder_X */
/linux/drivers/phy/lantiq/
H A Dphy-lantiq-rcu-usb2.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (C) 2017 Hauke Mehrtens <hauke@hauke-m.de>
21 /* Transmitter HS Pre-Emphasis Enable */
69 .compatible = "lantiq,ase-usb2-phy",
73 .compatible = "lantiq,danube-usb2-phy",
77 .compatible = "lantiq,xrx100-usb2-phy",
81 .compatible = "lantiq,xrx200-usb2-phy",
85 .compatible = "lantiq,xrx300-usb2-phy",
96 if (priv->reg_bits->have_ana_cfg) { in ltq_rcu_usb2_phy_init()
97 regmap_update_bits(priv->regmap, priv->ana_cfg1_reg_offset, in ltq_rcu_usb2_phy_init()
[all …]
/linux/drivers/gpu/drm/bridge/cadence/
H A Dcdns-mhdp8546-core.c1 // SPDX-License-Identifier: GPL-2.0
7 * Authors: Quentin Schulz <quentin.schulz@free-electrons.com>
14 * - Implement optimized mailbox communication using mailbox interrupts
15 * - Add support for power management
16 * - Add support for features like audio, MST and fast link training
17 * - Implement request_fw_cancel to handle HW_STATE
18 * - Fix asynchronous loading of firmware implementation
19 * - Add DRM helper function for cdns_mhdp_lower_link_rate
29 #include <linux/media-bus-format.h>
33 #include <linux/phy/phy-dp.h>
[all …]
/linux/drivers/phy/xilinx/
H A Dphy-zynqmp.c1 // SPDX-License-Identifier: GPL-2.0
3 * phy-zynqmp.c - PHY driver for Xilinx ZynqMP GT.
5 * Copyright (C) 2018-2020 Xilinx Inc.
27 #include <dt-bindings/phy/phy.h>
33 /* TX De-emphasis parameters */
184 * struct xpsgtr_ssc - structure to hold SSC settings for a lane
198 * struct xpsgtr_phy - representation of a lane
219 * struct xpsgtr_dev - representation of a ZynMP GT device
271 return readl(gtr_dev->serdes + reg); in xpsgtr_read()
276 writel(value, gtr_dev->serdes + reg); in xpsgtr_write()
[all …]
/linux/drivers/phy/
H A Dphy-xgene.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * AppliedMicro X-Gene Multi-purpose PHY driver
10 * The APM X-Gene PHY consists of two PLL clock macro's (CMU) and lanes.
19 * -----------------
20 * | Internal | |------|
21 * | Ref PLL CMU |----| | ------------- ---------
22 * ------------ ---- | MUX |-----|PHY PLL CMU|----| Serdes|
23 * | | | | ---------
24 * External Clock ------| | -------------
25 * |------|
[all …]
H A Dphy-snps-eusb2.c1 // SPDX-License-Identifier: GPL-2.0
184 phy->mode = mode; in snps_eusb2_hsphy_set_mode()
186 return phy_set_mode_ext(phy->repeater, mode, submode); in snps_eusb2_hsphy_set_mode()
205 /* default parameters: tx pre-emphasis */ in qcom_eusb2_default_parameters()
206 snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_CFG_CTRL_9, in qcom_eusb2_default_parameters()
211 snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_CFG_CTRL_9, in qcom_eusb2_default_parameters()
216 snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_CFG_CTRL_9, in qcom_eusb2_default_parameters()
221 snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_CFG_CTRL_8, in qcom_eusb2_default_parameters()
226 snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_CFG_CTRL_8, in qcom_eusb2_default_parameters()
249 unsigned long ref_clk_freq = clk_get_rate(phy->ref_clk); in exynos_eusb2_ref_clk_init()
[all …]
/linux/drivers/usb/typec/mux/
H A Dptn36502.c1 // SPDX-License-Identifier: GPL-2.0+
3 * NXP PTN36502 Type-C driver
11 #include <drm/bridge/aux-bridge.h>
72 struct mutex lock; /* protect non-concurrent retimer & switch */
81 bool reverse = (ptn->orientation == TYPEC_ORIENTATION_REVERSE); in ptn36502_set()
86 switch (ptn->mode) { in ptn36502_set()
89 regmap_write(ptn->regmap, PTN36502_MODE_CTRL1_REG, in ptn36502_set()
97 * A -> USB RX in ptn36502_set()
98 * B -> USB TX in ptn36502_set()
99 * C -> X in ptn36502_set()
[all …]
/linux/drivers/phy/cadence/
H A Dphy-cadence-torrent.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/phy/phy-cadence.h>
12 #include <linux/clk-provider.h>
243 [CDNS_TORRENT_REFCLK_DRIVER] = "refclk-driver",
244 [CDNS_TORRENT_DERIVED_REFCLK] = "refclk-der",
245 [CDNS_TORRENT_RECEIVED_REFCLK] = "refclk-rec",
473 for (i = 0; i < tbl->num_entries; i++) { in cdns_torrent_get_tbl_vals()
474 if (tbl->entries[i].key == key) in cdns_torrent_get_tbl_vals()
475 return tbl->entries[i].vals; in cdns_torrent_get_tbl_vals()
[all …]
/linux/drivers/scsi/bfa/
H A Dbfa_defs.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
4 * Copyright (c) 2014- QLogic Corporation.
8 * Linux driver for QLogic BR-series Fibre Channel Host Bus Adapter.
34 BFA_MFG_TYPE_LIGHTNING_P0 = 902, /* Lightning mezz card - old */
102 * All numerical fields are in big-endian format.
125 BFA_STATUS_ETIMER = 5, /* Timer expired - Retry, if persists,
129 BFA_STATUS_SFP_UNSUPP = 10, /* Unsupported SFP - Replace SFP */
132 BFA_STATUS_DEVBUSY = 13, /* Device busy - Retry operation */
148 BFA_STATUS_IOC_FAILURE = 56, /* IOC failure - Retry, if persists
[all …]

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