| /linux/tools/testing/selftests/net/bench/page_pool/ |
| H A D | time_bench.h | 32 * instructions counter including pipelined instructions
176 /* Reading all pipelined instruction */
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| /linux/Documentation/devicetree/bindings/mtd/ |
| H A D | mxicy,nand-ecc-engine.yaml | 56 /* Pipelined configuration */
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| /linux/Documentation/devicetree/bindings/spi/ |
| H A D | qcom,spi-qpic-snand.yaml | 16 operations in single, dual or quad IO mode with pipelined ECC
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| H A D | mediatek,spi-mtk-snfi.yaml | 17 in single, dual or quad IO mode with pipelined ECC encoding/decoding
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| /linux/Documentation/gpu/ |
| H A D | drm-vm-bind-async.rst | 121 deeply pipelined behind other VM_BIND operations and workloads
140 buffers. The workload execution can then easily be pipelined behind
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| /linux/arch/m68k/include/asm/ |
| H A D | mcfwdebug.h | 80 #define MCFDEBUG_CSR_NPL 0x00000040 /* Non-pipelined mode */
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| /linux/Documentation/devicetree/bindings/memory-controllers/ |
| H A D | mvebu-devbus.txt | 48 synchronous pipelined devices, where the address
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| /linux/arch/mips/sgi-ip22/ |
| H A D | ip22-mc.c | 161 tmp |= SGIMC_GIOPAR_PLINEEXP0; /* exp[01] pipelined */ in sgimc_init()
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| /linux/arch/mips/include/asm/sgi/ |
| H A D | mc.h | 85 #define SGIMC_GIOPAR_ONEBUS 0x00000400 /* Exists one GIO64 pipelined bus */
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| /linux/arch/powerpc/kernel/ |
| H A D | l2cr_6xx.S | 59 - L2RAM set to pipelined synchronous late-write
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| /linux/drivers/gpu/drm/i915/gt/ |
| H A D | gen6_engine_cs.c | 23 * produced by non-pipelined state commands), software needs to first
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| /linux/arch/powerpc/platforms/chrp/ |
| H A D | setup.c | 83 "Pipelined Synchronous"
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| /linux/drivers/net/ethernet/sfc/falcon/ |
| H A D | rx.c | 53 * to allow pipelined receives.
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| H A D | farch.c | 1730 * Due to pipelined implementation we need to program H/W with a value that
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| H A D | efx.c | 696 /* RX packet processing is pipelined, so wait for the in ef4_stop_datapath()
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| /linux/drivers/net/ethernet/sfc/ |
| H A D | rx_common.c | 30 * to allow pipelined receives.
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| H A D | efx_channels.c | 1137 /* RX packet processing is pipelined, so wait for the in efx_stop_channels()
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| /linux/drivers/net/ethernet/sfc/siena/ |
| H A D | rx_common.c | 30 * to allow pipelined receives.
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| H A D | efx_channels.c | 1158 /* RX packet processing is pipelined, so wait for the in efx_siena_stop_channels()
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| H A D | farch.c | 1821 * Due to pipelined implementation we need to program H/W with a value that
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| /linux/include/linux/mtd/ |
| H A D | rawnand.h | 208 * Some controllers with pipelined ECC engines override the BBM marker with
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| /linux/drivers/usb/cdns3/ |
| H A D | cdnsp-gadget.c | 223 * Controller will complete any current and actively pipelined transactions, and
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| /linux/drivers/iio/adc/ |
| H A D | ad4691.c | 1298 * a conversion AND returns the previous result (pipelined). in ad4691_manual_offload_buffer_postenable()
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| /linux/drivers/media/platform/renesas/ |
| H A D | rcar_fdp1.c | 1351 * For pipelined performance support, this would in device_frame_end()
|