| /linux/Documentation/hwmon/ |
| H A D | tc654.rst | 13 - Chris Packham <chris.packham@alliedtelesis.co.nz>
14 - Masahiko Iwamoto <iwamoto@allied-telesis.co.jp>
17 -----------
20 The TC654 uses the 2-wire interface compatible with the SMBUS 2.0
22 one (1) PWM output which can be used for fan control.
25 -------------------
26 Ordinarily the pwm1_mode ABI is used for controlling the pwm output
27 mode. However, for this chip the output is always pwm, and the
28 pwm1_mode determines if the pwm output is controlled via the pwm1 value
32 Setting pwm1_mode to 1 will cause the pwm output to be driven based on
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| H A D | max31760.rst | 1 .. SPDX-License-Identifier: GPL-2.0-or-later
19 -----------
21 The MAX31760 integrates temperature sensing along with precision PWM fan
23 temperature of a discrete diode-connected transistor, such as a 2N3906,
27 I2C-compatible interface. Fan speed is controlled based on the temperature
28 reading as an index to a 48-byte lookup table (LUT) containing
29 user-programmed PWM values. The flexible LUT-based architecture enables
35 remote high-temperature threshold has been exceeded.
37 Temperature measurement range: from -55°C to 125°C
41 Please refer how to instantiate this driver: Documentation/i2c/instantiating-devices.rst
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| H A D | emc2305.rst | 1 .. SPDX-License-Identifier: GPL-2.0
12 https://www.microchip.com/en-us/product/EMC2305
15 ------------
16 This driver implements support for Microchip EMC2301/2/3/5 RPM-based PWM Fan Controller.
17 The EMC2305 Fan Controller supports up to 5 independently controlled PWM fan drives.
19 The driver supports the RPM-based PWM control to keep a fan at the desired speed.
20 The driver provides the possibility to have one common PWM interface for all FANs
26 fan[1-5]_fault RO files for tachometers TACH1-TACH5 fault indication
27 fan[1-5]_input RO files for tachometers TACH1-TACH5 input (in RPM)
28 pwm[1-5] RW file for fan[1-5] target duty cycle (0..255)
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| H A D | adt7470.rst | 17 -----------
22 The ADT7470 uses the 2-wire interface compatible with the SMBus 2.0
24 external temperatures. It has four (4) 16-bit counters for measuring fan speed.
25 There are four (4) PWM outputs that can be used to control fan speed.
27 A sophisticated control system for the PWM outputs is designed into the ADT7470
28 that allows fan speed to be adjusted automatically based on any of the ten
29 temperature sensors. Each PWM output is individually adjustable and
30 programmable. Once configured, the ADT7470 will adjust the PWM outputs in
32 feature can also be disabled for manual control of the PWM's.
40 automatic fan pwm control to set the fan speed. The driver will not read the
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| H A D | adt7462.rst | 17 -----------
27 A sophisticated control system for the PWM outputs is designed into the ADT7462
28 that allows fan speed to be adjusted automatically based on any of the three
29 temperature sensors. Each PWM output is individually adjustable and
30 programmable. Once configured, the ADT7462 will adjust the PWM outputs in
32 feature can also be disabled for manual control of the PWM's.
43 ----------------
45 The ADT7462 have a 10-bit ADC and can therefore measure temperatures
49 determining an optimal configuration for the automatic PWM control.
55 -------------------
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| H A D | dme1737.rst | 18 Addresses scanned: none, address read from Super-I/O config space
34 Addresses scanned: none, address read from Super-I/O config space
43 -----------------
47 and PWM output control functions. Using this parameter
52 Include non-standard LPC addresses 0x162e and 0x164e
55 - VIA EPIA SN18000
59 -----------
63 and SCH5127 Super-I/O chips. These chips feature monitoring of 3 temp sensors
64 temp[1-3] (2 remote diodes and 1 internal), 8 voltages in[0-7] (7 external and
65 1 internal) and up to 6 fan speeds fan[1-6]. Additionally, the chips implement
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| H A D | vt1211.rst | 10 Addresses scanned: none, address read from Super-I/O config space
16 This driver is based on the driver for kernel 2.4 by Mark D. Studebaker and
24 -----------------
29 configuration for channels 1-5.
30 Legal values are in the range of 0-31. Bit 0 maps to
47 -----------
49 The VIA VT1211 Super-I/O chip includes complete hardware monitoring
52 implements 5 universal input channels (UCH1-5) that can be individually
60 connected to the PWM outputs of the VT1211 :-().
80 ------------------
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| H A D | adt7475.rst | 39 - Jordan Crouse
40 - Hans de Goede
41 - Darrick J. Wong (documentation)
42 - Jean Delvare
46 -----------
56 The ADT747x uses the 2-wire interface compatible with the SMBus 2.0
58 temperatures and two (2) or more voltages. It has four (4) 16-bit counters
59 for measuring fan speed. There are three (3) PWM outputs that can be used
62 A sophisticated control system for the PWM outputs is designed into the
63 ADT747x that allows fan speed to be adjusted automatically based on any of the
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| H A D | asc7621.rst | 20 Andigilog has both the PECI and pre-PECI versions of the Heceta-6, as
21 Intel calls them. Heceta-6e has high frequency PWM and Heceta-6p has
23 Heceta-6e part and aSC7621 is the Heceta-6p part. They are both in
28 have used registers below 20h for vendor-specific functions in addition
29 to those in the Intel-specified vendor range.
32 The fan speed control uses this finer value to produce a "step-less" fan
33 PWM output. These two bytes are "read-locked" to guarantee that once a
34 high or low byte is read, the other byte is locked-in until after the
37 sheet says 10-bits of resolution, although you may find the lower bits
42 data sheet. Our temperature reports and fan PWM outputs are very smooth
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| H A D | g762.rst | 4 The GMT G762 Fan Speed PWM Controller is connected directly to a fan
5 and performs closed-loop or open-loop control of the fan speed. Two
6 modes - PWM or DC - are supported by the device.
9 http://natisbad.org/NAS/ref/GMT_EDS-762_763-080710-0.2.pdf. sysfs
10 bindings are described in Documentation/hwmon/sysfs-interface.rst.
25 set desired fan speed. This only makes sense in closed-loop
44 in closed-loop control mode, if fan RPM value is 25% out
50 speed control (open-loop) via pwm1 described below, 2 for
51 automatic fan speed control (closed-loop) via fan1_target
55 set or get fan driving mode: 1 for PWM mode, 0 for DC mode.
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| /linux/drivers/pwm/ |
| H A D | pwm-dwc-core.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * DesignWare PWM Controller driver core
5 * Copyright (C) 2018-2020 Intel Corporation
20 #include <linux/pwm.h>
22 #include "pwm-dwc.h"
24 static void __dwc_pwm_set_enable(struct dwc_pwm *dwc, int pwm, int enabled) in __dwc_pwm_set_enable() argument
28 reg = dwc_pwm_readl(dwc, DWC_TIM_CTRL(pwm)); in __dwc_pwm_set_enable()
35 dwc_pwm_writel(dwc, reg, DWC_TIM_CTRL(pwm)); in __dwc_pwm_set_enable()
39 struct pwm_device *pwm, in __dwc_pwm_configure_timer() argument
52 tmp = DIV_ROUND_CLOSEST_ULL(state->duty_cycle, dwc->clk_ns); in __dwc_pwm_configure_timer()
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| H A D | pwm-airoha.c | 1 // SPDX-License-Identifier: GPL-2.0
7 * - Only 8 concurrent waveform generators are available for 8 combinations of
10 * - Supports only normal polarity.
11 * - On configuration the currently running period is completed.
12 * - Minimum supported period is 4 ms
13 * - Maximum supported period is 1s
26 #include <linux/pwm.h>
66 /* Cycle(Period) registers handles 4 generators in one 32-bit register */
68 /* Flash(Duty) producer handles 2 generators in one 32-bit register */
73 * The first 16 GPIO pins, GPIO0-GPIO15, are mapped into 16 PWM channels, 0-15.
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| /linux/Documentation/devicetree/bindings/pwm/ |
| H A D | pwm.txt | 1 Specifying PWM information for devices
4 1) PWM user nodes
5 -----------------
7 PWM users should specify a list of PWM devices that they want to use
8 with a property containing a 'pwm-list':
10 pwm-list ::= <single-pwm> [pwm-list]
11 single-pwm ::= <pwm-phandle> <pwm-specifier>
12 pwm-phandle : phandle to PWM controller node
13 pwm-specifier : array of #pwm-cells specifying the given PWM
16 PWM properties should be named "pwms". The exact meaning of each pwms
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| H A D | clk-pwm.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pwm/clk-pwm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Clock based PWM controller
10 - Nikita Travkin <nikita@trvn.ru>
15 It's often possible to control duty-cycle of such clocks which makes them
16 suitable for generating PWM signal.
19 - $ref: pwm.yaml#
23 const: clk-pwm
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| H A D | pwm-tiehrpwm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pwm/pwm-tiehrpwm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI SOC EHRPWM based PWM controller
10 - Vignesh R <vigneshr@ti.com>
13 - $ref: pwm.yaml#
18 - const: ti,am3352-ehrpwm
19 - items:
20 - enum:
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| H A D | pwm-tiecap.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pwm/pwm-tiecap.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI SOC ECAP based APWM controller
10 - Vignesh R <vigneshr@ti.com>
13 - $ref: pwm.yaml#
18 - const: ti,am3352-ecap
19 - items:
20 - enum:
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| /linux/Documentation/driver-api/backlight/ |
| H A D | lp855x-driver.rst | 15 -----------
19 Brightness can be controlled by the pwm input or the i2c command.
28 Value: pwm based or register based
37 ------------------------
48 Platform specific PWM period value. unit is nano.
49 Only valid when brightness is pwm input mode.
68 .name = "lcd-bl",
75 2) lp8556 platform data: pwm input mode with default rom data::
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| /linux/drivers/input/misc/ |
| H A D | pwm-vibra.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * PWM vibrator driver
7 * Based on previous work from:
10 * Based on PWM beeper driver:
11 * Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
21 #include <linux/pwm.h>
28 struct pwm_device *pwm; member
40 struct device *pdev = vibrator->input->dev.parent; in pwm_vibrator_start()
44 if (!vibrator->vcc_on) { in pwm_vibrator_start()
45 err = regulator_enable(vibrator->vcc); in pwm_vibrator_start()
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| /linux/arch/arm/boot/dts/samsung/ |
| H A D | exynos4412-odroidu3.dts | 1 // SPDX-License-Identifier: GPL-2.0
3 * Hardkernel's Exynos4412 based ODROID-U3 board device tree source
7 * Device tree source file for Hardkernel's ODROID-U3 board which is based
11 /dts-v1/;
12 #include <dt-bindings/leds/common.h>
13 #include "exynos4412-odroid-common.dtsi"
14 #include "exynos4412-prime.dtsi"
17 model = "Hardkernel ODROID-U3 board based on Exynos4412";
18 compatible = "hardkernel,odroid-u3", "samsung,exynos4412", "samsung,exynos4";
29 vbus_otg_reg: regulator-1 {
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| H A D | exynos4412-itop-elite.dts | 1 // SPDX-License-Identifier: GPL-2.0
3 * TOPEET's Exynos4412 based itop board device tree source
10 * which is based on Samsung's Exynos4412 SoC.
13 /dts-v1/;
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/pwm/pwm.h>
16 #include <dt-bindings/sound/samsung-i2s.h>
17 #include "exynos4412-itop-scp-core.dtsi"
20 model = "TOPEET iTop 4412 Elite board based on Exynos4412";
21 compatible = "topeet,itop4412-elite", "samsung,exynos4412", "samsung,exynos4";
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| /linux/Documentation/devicetree/bindings/input/ |
| H A D | pwm-vibrator.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/input/pwm-vibrator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: PWM vibrator
10 - Sebastian Reichel <sre@kernel.org>
13 Registers a PWM device as vibrator. It is expected, that the vibrator's
14 strength increases based on the duty cycle of the enable PWM channel
17 The binding supports an optional direction PWM channel, that can be
23 const: pwm-vibrator
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| /linux/drivers/video/backlight/ |
| H A D | pwm_bl.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Simple PWM based backlight control, board code has to setup
4 * 1) pin configuration so PWM waveforms can output
16 #include <linux/pwm.h>
22 struct pwm_device *pwm; member
43 if (pb->enabled) in pwm_backlight_power_on()
46 if (pb->power_supply) { in pwm_backlight_power_on()
47 err = regulator_enable(pb->power_supply); in pwm_backlight_power_on()
49 dev_err(pb->dev, "failed to enable power supply\n"); in pwm_backlight_power_on()
52 if (pb->post_pwm_on_delay) in pwm_backlight_power_on()
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| /linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | brcm,nsp-pinmux.txt | 3 The NSP IOMUX controller supports group based mux configuration. In
7 - compatible:
8 Must be "brcm,nsp-pinmux"
10 - reg:
15 - function:
18 - groups:
22 Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
27 compatible = "brcm,nsp-pinmux";
32 pinctrl-names = "default";
33 pinctrl-0 = <&pwm>, <&gpio_b>, <&nand_sel>;
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| /linux/Documentation/devicetree/bindings/leds/backlight/ |
| H A D | lp855x-backlight.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/backlight/lp855x-backlight.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Artur Weber <aweber.kernel@gmail.com>
15 - ti,lp8550
16 - ti,lp8551
17 - ti,lp8552
18 - ti,lp8553
19 - ti,lp8555
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| /linux/include/linux/ |
| H A D | led-lm3530.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2011 ST-Ericsson SA.
9 * based on leds-lm3530.c by Dan Murphy <D.Murphy@motorola.com>
63 LM3530_BL_MODE_PWM, /* "pwm" */
74 /* PWM Platform Specific Data */
82 * @mode: mode of operation i.e. Manual, ALS or PWM
83 * @als_input_mode: select source of ALS input - ALS1/2 or average
85 * @pwm_pol_hi: PWM input polarity - active high/active low
87 * @brt_ramp_law: brightness mapping mode - exponential/linear
94 * @brt_val: brightness value (0-127)
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