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/freebsd/share/man/man4/
H A Dpwmc.430 .Nd PWM (Pulse Width Modulation) control device driver
35 .Bd -ragged -offset indent
43 .Bd -literal -offset indent
49 driver provides device-control access to a channel of PWM hardware.
52 device is associated with a single PWM output channel.
54 Some PWM hardware is organized with multiple channels sharing a
61 Consult the documentation for the underlying PWM hardware device driver
67 .Pa /dev/pwm/pwmcX.Y
70 is a sequential number assigned to each PWM hardware controller
80 driver provides control of a PWM channel with the following
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/freebsd/sys/contrib/device-tree/Bindings/pwm/
H A Dpwm.txt1 Specifying PWM information for devices
4 1) PWM user nodes
5 -----------------
7 PWM users should specify a list of PWM devices that they want to use
8 with a property containing a 'pwm-list':
10 pwm-list ::= <single-pwm> [pwm-list]
11 single-pwm ::= <pwm-phandle> <pwm-specifier>
12 pwm-phandle : phandle to PWM controller node
13 pwm-specifier : array of #pwm-cells specifying the given PWM
16 PWM properties should be named "pwms". The exact meaning of each pwms
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H A Dclk-pwm.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pwm/clk-pwm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Clock based PWM controller
10 - Nikita Travkin <nikita@trvn.ru>
15 It's often possible to control duty-cycle of such clocks which makes them
16 suitable for generating PWM signal.
19 - $ref: pwm.yaml#
23 const: clk-pwm
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H A Dnvidia,tegra20-pwm.txt4 - compatible: Must be:
5 - "nvidia,tegra20-pwm": for Tegra20
6 - "nvidia,tegra30-pwm", "nvidia,tegra20-pwm": for Tegra30
7 - "nvidia,tegra114-pwm", "nvidia,tegra20-pwm": for Tegra114
8 - "nvidia,tegra124-pwm", "nvidia,tegra20-pwm": for Tegra124
9 - "nvidia,tegra132-pwm", "nvidia,tegra20-pwm": for Tegra132
10 - "nvidia,tegra210-pwm", "nvidia,tegra20-pwm": for Tegra210
11 - "nvidia,tegra186-pwm": for Tegra186
12 - "nvidia,tegra194-pwm": for Tegra194
13 - reg: physical base address and length of the controller's registers
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H A Dpwm-tiehrpwm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pwm/pwm-tiehrpwm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI SOC EHRPWM based PWM controller
10 - Vignesh R <vigneshr@ti.com>
13 - $ref: pwm.yaml#
18 - const: ti,am3352-ehrpwm
19 - items:
20 - enum:
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H A Dpwm-tiehrpwm.txt1 TI SOC EHRPWM based PWM controller
4 - compatible: Must be "ti,<soc>-ehrpwm".
5 for am33xx - compatible = "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm";
6 for am4372 - compatible = "ti,am4372-ehrpwm", "ti-am3352-ehrpwm", "ti,am33xx-ehrpwm";
7 for am654 - compatible = "ti,am654-ehrpwm", "ti-am3352-ehrpwm";
8 for da850 - compatible = "ti,da850-ehrpwm", "ti-am3352-ehrpwm", "ti,am33xx-ehrpwm";
9 for dra746 - compatible = "ti,dra746-ehrpwm", "ti-am3352-ehrpwm";
10 - #pwm-cells: should be 3. See pwm.yaml in this directory for a description of
13 - reg: physical base address and size of the registers map.
16 - clocks: Handle to the PWM's time-base and functional clock.
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H A Dpwm-tiecap.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pwm/pwm-tiecap.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI SOC ECAP based APWM controller
10 - Vignesh R <vigneshr@ti.com>
13 - $ref: pwm.yaml#
18 - const: ti,am3352-ecap
19 - items:
20 - enum:
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H A Dpwm-tiecap.txt1 TI SOC ECAP based APWM controller
4 - compatible: Must be "ti,<soc>-ecap".
5 for am33xx - compatible = "ti,am3352-ecap", "ti,am33xx-ecap";
6 for am4372 - compatible = "ti,am4372-ecap", "ti,am3352-ecap", "ti,am33xx-ecap";
7 for da850 - compatible = "ti,da850-ecap", "ti,am3352-ecap", "ti,am33xx-ecap";
8 for dra746 - compatible = "ti,dra746-ecap", "ti,am3352-ecap";
9 for 66ak2g - compatible = "ti,k2g-ecap", "ti,am3352-ecap";
10 for am654 - compatible = "ti,am654-ecap", "ti,am3352-ecap";
11 - #pwm-cells: should be 3. See pwm.yaml in this directory for a description of
12 the cells format. The PWM channel index ranges from 0 to 4. The only third
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/freebsd/sys/contrib/device-tree/src/arm/samsung/
H A Dexynos4412-odroidu3.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Hardkernel's Exynos4412 based ODROID-U3 board device tree source
7 * Device tree source file for Hardkernel's ODROID-U3 board which is based
11 /dts-v1/;
12 #include <dt-bindings/leds/common.h>
13 #include "exynos4412-odroi
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H A Dexynos4412-itop-elite.dts1 // SPDX-License-Identifier: GPL-2.0
3 * TOPEET's Exynos4412 based itop board device tree source
10 * which is based on Samsung's Exynos4412 SoC.
13 /dts-v1/;
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/pwm/pwm.h>
16 #include <dt-bindings/sound/samsung-i2s.h>
17 #include "exynos4412-itop-scp-core.dtsi"
20 model = "TOPEET iTop 4412 Elite board based on Exynos4412";
21 compatible = "topeet,itop4412-elite", "samsung,exynos4412", "samsung,exynos4";
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H A Ds5pv210-smdkv210.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
12 * NOTE: This file is completely based on original board file for mach-smdkv210
17 /dts-v1/;
18 #include <dt-bindings/interrupt-controller/irq.h>
19 #include <dt-binding
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H A Ds3c6410-mini6410.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's S3C6410 based Mini6410 board device tree source
7 * Device tree source file for FriendlyARM Mini6410 board which is based on
11 /dts-v1/;
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
19 model = "FriendlyARM Mini6410 board based o
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/freebsd/sys/contrib/device-tree/Bindings/input/
H A Dpwm-vibrator.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/input/pwm-vibrator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: PWM vibrator
10 - Sebastian Reichel <sre@kernel.org>
13 Registers a PWM device as vibrator. It is expected, that the vibrator's
14 strength increases based on the duty cycle of the enable PWM channel
17 The binding supports an optional direction PWM channel, that can be
23 const: pwm-vibrator
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H A Dpwm-vibrator.txt1 * PWM vibrator device tree bindings
3 Registers a PWM device as vibrator. It is expected, that the vibrator's
4 strength increases based on the duty cycle of the enable PWM channel
7 The binding supports an optional direction PWM channel, that can be
12 - compatible: should contain "pwm-vibrator"
13 - pwm-names: Should contain "enable" and optionally "direction"
14 - pwms: Should contain a PWM handle for each entry in pwm-names
17 - vcc-supply: Phandle for the regulator supplying power
18 - direction-duty-cycle-ns: Duty cycle of the direction PWM channel in
26 pinctrl-single,pins = <
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/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dbrcm,nsp-pinmux.txt3 The NSP IOMUX controller supports group based mux configuration. In
7 - compatible:
8 Must be "brcm,nsp-pinmux"
10 - reg:
15 - function:
18 - groups:
22 Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
27 compatible = "brcm,nsp-pinmux";
32 pinctrl-names = "default";
33 pinctrl-0 = <&pwm>, <&gpio_b>, <&nand_sel>;
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H A Dpinctrl-mt7622.txt4 - compatible: Should be one of the following
5 "mediatek,mt7622-pinctrl" for MT7622 SoC
6 "mediatek,mt7629-pinctrl" for MT7629 SoC
7 - reg: offset and length of the pinctrl space
9 - gpio-controller: Marks the device node as a GPIO controller.
10 - #gpio-cells: Should be two. The first cell is the pin number and the
14 - interrupt-controller : Marks the device node as an interrupt controller
16 If the property interrupt-controller is defined, following property is required
17 - reg-names: A string describing the "reg" entries. Must contain "eint".
18 - interrupts : The interrupt output from the controller.
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/freebsd/sys/contrib/device-tree/Bindings/leds/backlight/
H A Dlp855x-backlight.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/backlight/lp855x-backlight.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Artur Weber <aweber.kernel@gmail.com>
15 - ti,lp8550
16 - ti,lp8551
17 - ti,lp8552
18 - ti,lp8553
19 - ti,lp8555
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/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Diqs62x.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Azoteq IQS620A/621/622/624/625 Multi-Function Sensors
10 - Jeff LaBundy <jeff@labundy.com>
13 The Azoteq IQS620A, IQS621, IQS622, IQS624 and IQS625 multi-function sensors
21 - azoteq,iqs620a
22 - azoteq,iqs621
23 - azoteq,iqs622
24 - azoteq,iqs624
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/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Dmotorola-mapphone-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
6 #include "motorola-cpcap-mapphone.dtsi"
10 * We seem to have only 1021 MB accessible, 1021 - 1022 is locked,
11 * then 1023 - 102
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/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6dl-aristainetos_7.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * support fot the imx6 based aristainetos board
7 /dts-v1/;
9 #include "imx6qdl-aristainetos.dtsi"
13 compatible = "abb,aristainetos-imx6dl-7", "fsl,imx6dl";
21 compatible = "fsl,imx-parallel-display";
22 interface-pix-fmt = "rgb24";
23 pinctrl-names = "default";
24 pinctrl-0 = <&pinctrl_ipu_disp>;
27 display-timings {
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H A Dimx6dl-aristainetos_4.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * support fot the imx6 based aristainetos board
7 /dts-v1/;
9 #include "imx6qdl-aristainetos.dtsi"
13 compatible = "abb,aristainetos-imx6dl-4", "fsl,imx6dl";
16 compatible = "pwm-backlight";
18 brightness-levels = <0 4 8 16 32 64 128 255>;
19 default-brightness-level = <7>;
20 enable-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
21 pinctrl-names = "default";
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/freebsd/sys/contrib/device-tree/src/arm64/allwinner/
H A Dsun50i-a64-teres-i.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 // based on sun50i-a64-olinuxino.dts by Jagan Teki <jteki@openedev.com>
5 /dts-v1/;
7 #include "sun50i-a64.dtsi"
8 #include "sun50i-a64-cpu-opp.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/pwm/pwm.h>
15 model = "Olimex A64 Teres-I";
16 compatible = "olimex,a64-teres-i", "allwinner,sun50i-a64";
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/freebsd/sys/contrib/device-tree/Bindings/display/bridge/
H A Dti,sn65dsi86.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sandeep Panda <spanda@codeaurora.org>
23 enable-gpios:
27 suspend-gpios:
31 no-hpd:
37 vccio-supply:
40 vpll-supply:
43 vcca-supply:
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/freebsd/sys/contrib/device-tree/src/arm/marvell/
H A Darmada-388-helios4.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * based on SolidRun Clearfog revision A1 rev 2.0 (88F6828)
10 /dts-v1/;
11 #include "armada-388.dtsi"
12 #include "armada-38x-solidrun-microsom.dtsi"
25 /* So that mvebu u-boot can update the MAC addresses */
30 stdout-path = "serial0:115200n8";
33 reg_12v: regulator-12v {
34 compatible = "regulator-fixed";
35 regulator-name = "power_brick_12V";
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/freebsd/sys/contrib/device-tree/include/dt-bindings/regulator/
H A Dqcom,rpmh-regulator.h1 /* SPDX-License-Identifier: GPL-2.0 */
9 * device tree properties (e.g. regulator-initial-mode). Each type of regulator
21 * automatically switches between LPM and HPM based
22 * upon the real-time load current. This mode is
27 * corresponds to PWM for SMPS and BOB type

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