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/linux/drivers/net/ethernet/marvell/mvpp2/
H A Dmvpp2.h3 * Definitions for Marvell PPv2 network controller for Armada 375 SoC.
490 /* Per-port XGMAC registers. PPv2.2 and PPv2.3, only for GOP port 0,
527 /* SMI registers. PPv2.2 and PPv2.3, relative to priv->iface_base. */
531 /* TAI registers, PPv2.2 only, relative to priv->iface_base */
603 /* XPCS registers.PPv2.2 and PPv2.3 */
614 /* FCA registers. PPv2.2 and PPv2.3 */
623 /* XPCS registers. PPv2.2 and PPv2.3 */
630 /* PTP registers. PPv2.2 only */
1039 /* On PPv2.2 and PPv2.3, each "software thread" can access the base
1046 /* On PPv2.2 and PPv2.3, some port control registers are located into
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H A DMakefile3 # Makefile for the Marvell PPv2 driver.
H A Dmvpp2_cls.h3 * RSS and Classifier definitions for Marvell PPv2 Network Controller
H A Dmvpp2_prs.h3 * Header Parser definitions for Marvell PPv2 Network Controller
H A Dmvpp2_debugfs.c3 * Driver for Marvell PPv2 network controller for Armada 375 SoC.
H A Dmvpp2_cls.c3 * RSS and Classifier helpers for Marvell PPv2 Network Controller
H A Dmvpp2_prs.c3 * Header Parser helpers for Marvell PPv2 Network Controller
/linux/drivers/clk/mvebu/
H A Dcp110-system-controller.c15 * - PPv2 core (1/3 PLL0)
90 [CP110_GATE_PPV2] = "ppv2",
258 /* PPv2 is PLL0/3 */ in cp110_syscon_common_probe()
259 ppv2_name = ap_cp_unique_name(dev, syscon_node, "ppv2-core"); in cp110_syscon_common_probe()
/linux/Documentation/devicetree/bindings/net/
H A Dmarvell,pp2.yaml14 Marvell Armada 375 Ethernet Controller (PPv2.1)
15 Marvell Armada 7K/8K Ethernet Controller (PPv2.2)
16 Marvell CN913X Ethernet Controller (PPv2.3)