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Searched full:ppis (Results 1 – 9 of 9) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Darm,gic.yaml17 Primary GIC is attached directly to the CPU and typically has PPIs and SGIs.
19 have PPIs or SGIs.
H A Dti,omap4-wugen-mpu20 - Only SPIs can use the WUGEN as an interrupt parent. SGIs and PPIs
H A Dnvidia,tegra20-ictlr.txt27 - Only SPIs can use the ictlr as an interrupt parent. SGIs and PPIs
H A Darm,gic-v3.yaml63 interrupt types other than PPI or PPIs that are not partitioned,
/freebsd/sys/contrib/device-tree/Bindings/timer/
H A Darm,arch_timer.yaml18 per-processor interrupts via PPIs. The memory mapped timer is attached to a GIC
/freebsd/sys/arm64/arm64/
H A Dgic_v3.c860 * We need the lock for both SGIs and PPIs for an atomic CPU_SET() at a in gic_v3_setup_intr_periph()
973 /* SGIs and PPIs in corresponding Re-Distributor */ in gic_v3_disable_intr()
994 /* SGIs and PPIs in corresponding Re-Distributor */ in gic_v3_enable_intr_periph()
1488 /* Configure SGIs and PPIs to be Group1 Non-secure */ in gic_v3_redist_init()
1499 /* Set priority for SGIs and PPIs */ in gic_v3_redist_init()
H A Dgic_v3_reg.h34 * supported by GIC (including SGIs, PPIs and SPIs)
271 /* Re-distributor registers for SGIs and PPIs */
/freebsd/sys/arm64/vmm/io/
H A Dvgic_v3.c144 /* How many IRQs we support (SGIs + PPIs + SPIs). Not including LPIs */
492 /* PPIs */ in vgic_v3_cpuinit()
933 * The config can't be changed for SGIs and PPIs. SGIs have in write_config()
935 * implementation defined to be read-only for PPIs. in write_config()
/freebsd/sys/contrib/edk2/
H A DMdePkg.dec4 # It also provides the definitions(including PPIs/PROTOCOLs/GUIDs) of
814 [Ppis]
879 # PPIs defined in PI 1.2.
901 # PPIs defined in PI 1.2.1.
920 # PPIs defined in PI 1.3.
930 # PPIs defined in PI 1.4.
954 # PPIs defined in PI 1.5.
967 # PPIs defined in PI 1.7.