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/linux/arch/powerpc/kernel/
H A Dcpu_specs_book3s_64.h214 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */
217 .cpu_name = "POWER7 (architected)",
227 .platform = "power7",
301 { /* Power7 */
304 .cpu_name = "POWER7 (raw)",
316 .platform = "power7",
318 { /* Power7+ */
321 .cpu_name = "POWER7+ (raw)",
333 .platform = "power7+",
H A Dmce_power.c3 * Machine check exception handling CPU-side for power7 and power8
/linux/arch/powerpc/perf/
H A Dpower7-pmu.c3 * Performance counter support for POWER7 processors.
16 * Bits in event code for POWER7
31 * Bits in MMCR1 for POWER7
52 * Power7 event codes.
58 #include "power7-events-list.h"
388 #include "power7-events-list.h"
403 #include "power7-events-list.h"
432 .name = "POWER7",
H A Dpower7-events-list.h3 * Performance counter support for POWER7 processors.
/linux/Documentation/arch/powerpc/
H A Disa-versions.rst17 Power7 Power ISA v2.06
51 Power7 Yes
71 Power7 Yes
91 Power7 No
H A Dcpu_families.rst91 | POWER7 |
97 | POWER7+ |
/linux/arch/powerpc/lib/
H A Dchecksum_64.S74 * On POWER6 and POWER7 back to back adde instructions take 2 cycles
77 * been shown to hit this on both POWER6 and POWER7.
267 * On POWER6 and POWER7 back to back adde instructions take 2 cycles
270 * been shown to hit this on both POWER6 and POWER7.
/linux/arch/powerpc/kvm/
H A Dbook3s_hv_ras.c20 /* SRR1 bits for machine check on POWER7 */
29 /* DSISR bits for machine check on POWER7 */
36 /* POWER7 SLB flush and reload */
66 * On POWER7, see if we can handle a machine check that occurred inside
/linux/drivers/char/hw_random/
H A Dpowernv-rng.c71 MODULE_DESCRIPTION("Bare metal HWRNG driver for POWER7+ and above");
H A Dpseries-rng.c5 * Driver for the pseries hardware RNG for POWER7+ and above
/linux/arch/powerpc/xmon/
H A Dppc-opc.c2956 #define POWER7 PPC_OPCODE_POWER7 macro
5052 {"dcbtstt", XRT(31,246,0x10), XRT_MASK, POWER7, 0, {RA0, RB}},
5062 {"bpermd", X(31,252), X_MASK, POWER7|PPCA2, 0, {RA, RS, RB}},
5103 {"dcbtt", XRT(31,278,0x10), XRT_MASK, POWER7, 0, {RA0, RB}},
5127 {"tlbie", X(31,306), XRA_MASK, POWER7, POWER9|TITAN, {RB, RS}},
5128 {"tlbie", X(31,306), XRTLRA_MASK, PPC, E500|POWER7|TITAN, {RB, LOPT}},
5334 {"mfppr", XSPR(31,339,896), XSPR_MASK, POWER7, 0, {RT}},
5335 {"mfppr32", XSPR(31,339,898), XSPR_MASK, POWER7, 0, {RT}},
5427 {"popcntw", X(31,378), XRB_MASK, POWER7|PPCA2, 0, {RA, RS}},
5437 {"divdeu", XO(31,393,0,0), XO_MASK, POWER7|PPCA2, 0, {RT, RA, RB}},
[all …]
H A Dppc.h119 /* Opcode is only supported by Power7 architecture. */
/linux/Documentation/devicetree/bindings/tpm/
H A Dibm,vtpm.yaml13 Virtual TPM is used on IBM POWER7+ and POWER8 systems running POWERVM.
/linux/tools/testing/selftests/powerpc/security/
H A Dentry_flush.c34 // The PMU event we use only works on Power7 or later in entry_flush_test()
H A Drfi_flush.c34 // The PMU event we use only works on Power7 or later in rfi_flush_test()
H A Duaccess_flush.c36 // The PMU event we use only works on Power7 or later in uaccess_flush_test()
/linux/Documentation/ABI/testing/
H A Dsysfs-bus-event_source-devices-hv_24x731 hypervisor on POWER7 and 8 systems. This catalog lists events
/linux/arch/powerpc/platforms/powernv/
H A Drng.c38 .machine power7; \ in rng_whiten()
/linux/Documentation/devicetree/bindings/powerpc/opal/
H A Dpower-mgt.txt49 0x00010000 /* This is a nap state (POWER7,POWER8) */
/linux/Documentation/virt/kvm/devices/
H A Dxive.rst17 the legacy interrupt mode, referred as XICS (POWER7/8).
/linux/tools/testing/selftests/powerpc/primitives/asm/
H A Dppc_asm.h171 #define HMT_EXTRA_HIGH or 7,7,7 # power7 only
/linux/arch/powerpc/include/asm/book3s/64/
H A Dmmu-hash.h128 #define POWER7_TLB_SETS 128 /* # sets in POWER7 TLB */
/linux/arch/powerpc/include/asm/
H A Dppc_asm.h171 #define HMT_EXTRA_HIGH or 7,7,7 # power7 only
/linux/Documentation/admin-guide/
H A Dkernel-parameters.txt6826 barrier on kernel entry and exit. On Power7