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/linux/tools/perf/util/
H A Dpmus.c18 #include "pmu.h"
26 * core_pmus: A PMU belongs to core_pmus if it's name is "cpu" or it's sysfs
28 * must have pmu->is_core=1. If there are more than one PMU in
31 * homogeneous PMU, and thus they are treated as homogeneous
34 * matter whether PMU is present per SMT-thread or outside of the
38 * must have pmu->is_core=0 but pmu->is_uncore could be 0 or 1.
83 * that S390's cpum_cf PMU doesn't match. in pmu_name_len_no_suffix()
113 struct perf_pmu *pmu, *tm in perf_pmus__destroy() local
130 struct perf_pmu *pmu; pmu_find() local
148 struct perf_pmu *pmu; perf_pmus__find() local
201 struct perf_pmu *pmu; perf_pmu__find2() local
293 struct perf_pmu *pmu; __perf_pmus__find_by_type() local
310 struct perf_pmu *pmu = __perf_pmus__find_by_type(type); perf_pmus__find_by_type() local
334 perf_pmus__scan(struct perf_pmu * pmu) perf_pmus__scan() argument
354 perf_pmus__scan_core(struct perf_pmu * pmu) perf_pmus__scan_core() argument
366 perf_pmus__scan_for_event(struct perf_pmu * pmu,const char * event) perf_pmus__scan_for_event() argument
405 perf_pmus__scan_matching_wildcard(struct perf_pmu * pmu,const char * wildcard) perf_pmus__scan_matching_wildcard() argument
452 perf_pmus__scan_skip_duplicates(struct perf_pmu * pmu) perf_pmus__scan_skip_duplicates() argument
491 struct perf_pmu *pmu = NULL; perf_pmus__pmu_for_pmu_filter() local
513 const struct perf_pmu *pmu; global() member
606 struct perf_pmu *pmu; perf_pmus__print_pmu_events() local
721 struct perf_pmu *pmu = NULL; perf_pmus__print_raw_pmu_events() local
770 struct perf_pmu *pmu = perf_pmus__find(pname); perf_pmus__have_event() local
780 struct perf_pmu *pmu = NULL; perf_pmus__num_core_pmus() local
790 struct perf_pmu *pmu = NULL; __perf_pmus__supports_extended_type() local
821 struct perf_pmu *pmu = perf_pmus__find_by_type(attr->type); perf_pmus__find_by_attr() local
846 struct perf_pmu *pmu = evsel->pmu; evsel__find_pmu() local
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H A Dpmu.c22 #include "pmu.h"
28 #include <util/pmu-bison.h>
29 #include <util/pmu-flex.h>
43 /* An event loaded from /sys/bus/event_source/devices/<pmu>/events. */
48 * An event loaded from a /sys/bus/event_source/devices/<pmu>/identifier matched json
56 * pmu-events.c, created by parsing the pmu-events json files.
79 * differ from the PMU name as it won't have suffixes.
111 * PMU need to be checked. If they aren't supported they are marked
121 static int pmu_aliases_parse(struct perf_pmu *pmu);
164 static void perf_pmu_format__load(const struct perf_pmu *pmu, struct perf_pmu_format *format) in perf_pmu_format__load() argument
[all …]
H A Dpmu.h12 #include "pmu-events/pmu-events.h"
42 /* A perf event syscall PMU. */
44 /* A perf tool provided DRM PMU. */
46 /* A perf tool provided HWMON PMU. */
48 /* Perf tool provided PMU for tool events like time. */
50 /* A testing PMU kind. */
69 /** @name: The name of the PMU such as "cpu". */
72 * @alias_name: Optional alternate name for the PMU determined in
77 * @id: Optional PMU identifier read from
87 * @selectable: Can the PMU name be selected as if it were an event?
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/linux/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/
H A Dbase.c32 struct nvkm_pmu *pmu = device->pmu; in nvkm_pmu_fan_controlled() local
34 /* Internal PMU FW does not currently control fans in any way, in nvkm_pmu_fan_controlled()
37 if (pmu && pmu->func->code.size) in nvkm_pmu_fan_controlled()
40 /* Default (board-loaded, or VBIOS PMU/PREOS) PMU FW on Fermi in nvkm_pmu_fan_controlled()
48 nvkm_pmu_pgob(struct nvkm_pmu *pmu, bool enable) in nvkm_pmu_pgob() argument
50 if (pmu && pmu->func->pgob) in nvkm_pmu_pgob()
51 pmu->func->pgob(pmu, enable); in nvkm_pmu_pgob()
57 struct nvkm_pmu *pmu = container_of(work, typeof(*pmu), recv.work); in nvkm_pmu_recv() local
58 return pmu->func->recv(pmu); in nvkm_pmu_recv()
62 nvkm_pmu_send(struct nvkm_pmu *pmu, u32 reply[2], in nvkm_pmu_send() argument
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H A Dgm20b.c28 #include <nvfw/pmu.h>
42 struct nvkm_pmu *pmu = container_of(falcon, typeof(*pmu), falcon); in gm20b_pmu_acr_bootstrap_falcon() local
52 ret = nvkm_falcon_cmdq_send(pmu->hpq, &cmd.cmd.hdr, in gm20b_pmu_acr_bootstrap_falcon()
54 &pmu->subdev, msecs_to_jiffies(1000)); in gm20b_pmu_acr_bootstrap_falcon()
129 struct nvkm_pmu *pmu = priv; in gm20b_pmu_acr_init_wpr_callback() local
130 struct nvkm_subdev *subdev = &pmu->subdev; in gm20b_pmu_acr_init_wpr_callback()
139 complete_all(&pmu->wpr_ready); in gm20b_pmu_acr_init_wpr_callback()
144 gm20b_pmu_acr_init_wpr(struct nvkm_pmu *pmu) in gm20b_pmu_acr_init_wpr() argument
154 return nvkm_falcon_cmdq_send(pmu->hpq, &cmd.cmd.hdr, in gm20b_pmu_acr_init_wpr()
155 gm20b_pmu_acr_init_wpr_callback, pmu, 0); in gm20b_pmu_acr_init_wpr()
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H A Dgt215.c30 gt215_pmu_send(struct nvkm_pmu *pmu, u32 reply[2], in gt215_pmu_send() argument
33 struct nvkm_subdev *subdev = &pmu->subdev; in gt215_pmu_send()
37 mutex_lock(&pmu->send.mutex); in gt215_pmu_send()
45 mutex_unlock(&pmu->send.mutex); in gt215_pmu_send()
50 * on a synchronous reply, take the PMU mutex and tell the in gt215_pmu_send()
54 pmu->recv.message = message; in gt215_pmu_send()
55 pmu->recv.process = process; in gt215_pmu_send()
65 pmu->send.base)); in gt215_pmu_send()
77 wait_event(pmu->recv.wait, (pmu->recv.process == 0)); in gt215_pmu_send()
78 reply[0] = pmu->recv.data[0]; in gt215_pmu_send()
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H A Dgk20a.c51 gk20a_pmu_dvfs_target(struct gk20a_pmu *pmu, int *state) in gk20a_pmu_dvfs_target() argument
53 struct nvkm_clk *clk = pmu->base.subdev.device->clk; in gk20a_pmu_dvfs_target()
59 gk20a_pmu_dvfs_get_cur_state(struct gk20a_pmu *pmu, int *state) in gk20a_pmu_dvfs_get_cur_state() argument
61 struct nvkm_clk *clk = pmu->base.subdev.device->clk; in gk20a_pmu_dvfs_get_cur_state()
67 gk20a_pmu_dvfs_get_target_state(struct gk20a_pmu *pmu, in gk20a_pmu_dvfs_get_target_state() argument
70 struct gk20a_pmu_dvfs_data *data = pmu->data; in gk20a_pmu_dvfs_get_target_state()
71 struct nvkm_clk *clk = pmu->base.subdev.device->clk; in gk20a_pmu_dvfs_get_target_state()
86 nvkm_trace(&pmu->base.subdev, "cur level = %d, new level = %d\n", in gk20a_pmu_dvfs_get_target_state()
95 gk20a_pmu_dvfs_get_dev_status(struct gk20a_pmu *pmu, in gk20a_pmu_dvfs_get_dev_status() argument
98 struct nvkm_falcon *falcon = &pmu->base.falcon; in gk20a_pmu_dvfs_get_dev_status()
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/linux/drivers/soc/dove/
H A Dpmu.c3 * Marvell Dove PMU support
17 #include <linux/soc/dove/pmu.h>
42 * The PMU contains a register to reset various subsystems within the
50 struct pmu_data *pmu = rcdev_to_pmu(rc); in pmu_reset_reset() local
54 spin_lock_irqsave(&pmu->lock, flags); in pmu_reset_reset()
55 val = readl_relaxed(pmu->pmc_base + PMC_SW_RST); in pmu_reset_reset()
56 writel_relaxed(val & ~BIT(id), pmu->pmc_base + PMC_SW_RST); in pmu_reset_reset()
57 writel_relaxed(val | BIT(id), pmu->pmc_base + PMC_SW_RST); in pmu_reset_reset()
58 spin_unlock_irqrestore(&pmu->lock, flags); in pmu_reset_reset()
65 struct pmu_data *pmu = rcdev_to_pmu(rc); in pmu_reset_assert() local
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/linux/drivers/gpu/drm/i915/
H A Di915_pmu.c35 return container_of(event->pmu, struct i915_pmu, base); in event_to_pmu()
38 static struct drm_i915_private *pmu_to_i915(struct i915_pmu *pmu) in pmu_to_i915() argument
40 return container_of(pmu, struct drm_i915_private, pmu); in pmu_to_i915()
151 static bool pmu_needs_timer(struct i915_pmu *pmu) in pmu_needs_timer() argument
153 struct drm_i915_private *i915 = pmu_to_i915(pmu); in pmu_needs_timer()
161 enable = pmu->enable; in pmu_needs_timer()
203 static u64 read_sample(struct i915_pmu *pmu, unsigned int gt_id, int sample) in read_sample() argument
205 return pmu->sample[gt_id][sample].cur; in read_sample()
209 store_sample(struct i915_pmu *pmu, unsigned int gt_id, int sample, u64 val) in store_sample() argument
211 pmu->sample[gt_id][sample].cur = val; in store_sample()
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/linux/drivers/pmdomain/starfive/
H A Djh71xx-pmu.c3 * StarFive JH71XX PMU (Power Management Unit) Controller Driver
15 #include <dt-bindings/power/starfive,jh7110-pmu.h>
26 /* aon pmu register offset */
36 /* pmu int status */
64 struct jh71xx_pmu *pmu);
76 spinlock_t lock; /* protects pmu reg */
81 struct jh71xx_pmu *pmu; member
87 struct jh71xx_pmu *pmu = pmd->pmu; in jh71xx_pmu_get_state() local
92 *is_on = readl(pmu->base + pmu->match_data->pmu_status) & mask; in jh71xx_pmu_get_state()
99 struct jh71xx_pmu *pmu = pmd->pmu; in jh7110_pmu_set_state() local
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/linux/drivers/perf/
H A Dfsl_imx9_ddr_perf.c59 #define to_ddr_pmu(p) container_of(p, struct ddr_pmu, pmu)
79 const char *identifier; /* system PMU identifier for userspace */
84 struct pmu pmu; member
117 static inline bool axi_filter_v1(struct ddr_pmu *pmu) in axi_filter_v1() argument
119 return pmu->devtype_data->filter_ver == DDR_PERF_AXI_FILTER_V1; in axi_filter_v1()
122 static inline bool axi_filter_v2(struct ddr_pmu *pmu) in axi_filter_v2() argument
124 return pmu->devtype_data->filter_ver == DDR_PERF_AXI_FILTER_V2; in axi_filter_v2()
128 { .compatible = "fsl,imx91-ddr-pmu", .data = &imx91_devtype_data },
129 { .compatible = "fsl,imx93-ddr-pmu", .data = &imx93_devtype_data },
130 { .compatible = "fsl,imx94-ddr-pmu", .data = &imx94_devtype_data },
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H A Darm_pmu.c189 if (type == event->pmu->type) in armpmu_map_event()
206 struct arm_pmu *armpmu = to_arm_pmu(event->pmu); in armpmu_event_set_period()
248 struct arm_pmu *armpmu = to_arm_pmu(event->pmu); in armpmu_event_update()
278 struct arm_pmu *armpmu = to_arm_pmu(event->pmu); in armpmu_stop()
282 * ARM pmu always has to update the counter, so ignore in armpmu_stop()
294 struct arm_pmu *armpmu = to_arm_pmu(event->pmu); in armpmu_start()
298 * ARM pmu always has to reprogram the period, so ignore in armpmu_start()
319 struct arm_pmu *armpmu = to_arm_pmu(event->pmu); in armpmu_del()
328 perf_sched_cb_dec(event->pmu); in armpmu_del()
341 struct arm_pmu *armpmu = to_arm_pmu(event->pmu); in armpmu_add()
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/linux/Documentation/devicetree/bindings/arm/rockchip/
H A Dpmu.yaml4 $id: http://devicetree.org/schemas/arm/rockchip/pmu.yaml#
7 title: Rockchip Power Management Unit (PMU)
14 The PMU is used to turn on and off different power domains of the SoCs.
22 - rockchip,px30-pmu
23 - rockchip,rk3066-pmu
24 - rockchip,rk3128-pmu
25 - rockchip,rk3288-pmu
26 - rockchip,rk3368-pmu
27 - rockchip,rk3399-pmu
28 - rockchip,rk3528-pmu
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/linux/drivers/gpu/drm/xe/
H A Dxe_pmu.c20 * DOC: Xe PMU (Performance Monitoring Unit)
93 struct xe_device *xe = container_of(event->pmu, typeof(*xe), pmu.base); in event_to_gt()
101 struct xe_device *xe = container_of(event->pmu, typeof(*xe), pmu.base); in event_to_hwe()
135 struct xe_device *xe = container_of(event->pmu, typeof(*xe), pmu.base); in event_gt_forcewake()
160 static bool event_supported(struct xe_pmu *pmu, unsigned int gt_id, in event_supported() argument
163 struct xe_device *xe = container_of(pmu, typeof(*xe), pmu); in event_supported()
169 return id < sizeof(pmu->supported_events) * BITS_PER_BYTE && in event_supported()
170 pmu->supported_events & BIT_ULL(id); in event_supported()
175 struct xe_device *xe = container_of(event->pmu, typeof(*xe), pmu.base); in event_param_valid()
216 struct xe_device *xe = container_of(event->pmu, typeof(*xe), pmu.base); in xe_pmu_event_destroy()
[all …]
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmarvell,dove-pinctrl.txt9 - reg: register specifiers of MPP, MPP4, and PMU MPP registers
14 Note: pmu* also allows for Power Management functions listed below
18 mpp0 0 gpio, pmu, uart2(rts), sdio0(cd), lcd0(pwm), pmu*
19 mpp1 1 gpio, pmu, uart2(cts), sdio0(wp), lcd1(pwm), pmu*
20 mpp2 2 gpio, pmu, uart2(txd), sdio0(buspwr), sata(prsnt),
21 uart1(rts), pmu*
22 mpp3 3 gpio, pmu, uart2(rxd), sdio0(ledctrl), sata(act),
23 uart1(cts), lcd-spi(cs1), pmu*
24 mpp4 4 gpio, pmu, uart3(rts), sdio1(cd), spi1(miso), pmu*
25 mpp5 5 gpio, pmu, uart3(cts), sdio1(wp), spi1(cs), pmu*
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/linux/arch/x86/events/amd/
H A Duncore.c55 struct pmu pmu; member
96 return container_of(event->pmu, struct amd_uncore_pmu, pmu); in event_to_amd_uncore_pmu()
112 event->pmu->read(event); in amd_uncore_hrtimer()
165 struct amd_uncore_pmu *pmu = event_to_amd_uncore_pmu(event); in amd_uncore_start() local
166 struct amd_uncore_ctx *ctx = *per_cpu_ptr(pmu->ctx, event->cpu); in amd_uncore_start()
183 struct amd_uncore_pmu *pmu = event_to_amd_uncore_pmu(event); in amd_uncore_stop() local
184 struct amd_uncore_ctx *ctx = *per_cpu_ptr(pmu->ctx, event->cpu); in amd_uncore_stop()
191 event->pmu->read(event); in amd_uncore_stop()
204 struct amd_uncore_pmu *pmu = event_to_amd_uncore_pmu(event); in amd_uncore_add() local
205 struct amd_uncore_ctx *ctx = *per_cpu_ptr(pmu->ctx, event->cpu); in amd_uncore_add()
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/linux/tools/perf/tests/
H A Dpmu-events.c4 #include "pmu.h"
12 #include "../pmu-events/pmu-events.h"
22 /* used for matching against events from generated pmu-events.c */
32 /* PMU which we should match against */
45 .pmu = "default_core",
55 .pmu = "default_core",
65 .pmu = "default_core",
75 .pmu = "default_core",
85 .pmu = "default_core",
95 .pmu = "default_core",
[all …]
/linux/tools/perf/pmu-events/
H A DBuild1 EMPTY_PMU_EVENTS_C = pmu-events/empty-pmu-events.c
2 # pmu-events.c will be generated by jevents.py or copied from EMPTY_PMU_EVENTS_C
3 PMU_EVENTS_C = $(OUTPUT)pmu-events/pmu-events.c
4 pmu-events-y += pmu-events.o
6 # pmu-events.c file is generated in the OUTPUT directory so it needs a
8 $(OUTPUT)pmu-events/pmu-events.o: $(PMU_EVENTS_C)
31 SRC_DIR := pmu-events/arch
39 LEGACY_CACHE_PY = pmu-events/make_legacy_cache.py
40 LEGACY_CACHE_JSON = $(OUTPUT)pmu-events/arch/common/common/legacy-cache.json
48 GEN_METRIC_DEPS := pmu-events/metric.py pmu-events/common_metrics.py
[all …]
/linux/tools/perf/arch/arm/util/
H A Dpmu.c8 #include <linux/coresight-pmu.h>
15 #include "../../../util/pmu.h"
19 void perf_pmu__arch_init(struct perf_pmu *pmu) in perf_pmu__arch_init() argument
23 if (!strcmp(pmu->name, CORESIGHT_ETM_PMU_NAME)) { in perf_pmu__arch_init()
25 pmu->auxtrace = true; in perf_pmu__arch_init()
26 pmu->selectable = true; in perf_pmu__arch_init()
27 pmu->perf_event_attr_init_default = cs_etm_get_default_config; in perf_pmu__arch_init()
29 } else if (strstarts(pmu->name, ARM_SPE_PMU_NAME)) { in perf_pmu__arch_init()
30 pmu->auxtrace = true; in perf_pmu__arch_init()
31 pmu->selectable = true; in perf_pmu__arch_init()
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/
H A Dgm200.c28 #include <subdev/bios/pmu.h>
29 #include <subdev/pmu.h>
33 pmu_code(struct nv50_devinit *init, u32 pmu, u32 img, u32 len, bool sec) in pmu_code() argument
39 nvkm_wr32(device, 0x10a180, 0x01000000 | (sec ? 0x10000000 : 0) | pmu); in pmu_code()
42 nvkm_wr32(device, 0x10a188, (pmu + i) >> 8); in pmu_code()
53 pmu_data(struct nv50_devinit *init, u32 pmu, u32 img, u32 len) in pmu_data() argument
59 nvkm_wr32(device, 0x10a1c0, 0x01000000 | pmu); in pmu_data()
88 struct nvbios_pmuR pmu; in pmu_load() local
91 if (!nvbios_pmuRm(bios, type, &pmu)) in pmu_load()
94 if (!post || !subdev->device->pmu) in pmu_load()
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/linux/arch/x86/events/intel/
H A Duncore.c140 struct intel_uncore_box *uncore_pmu_to_box(struct intel_uncore_pmu *pmu, int cpu) in uncore_pmu_to_box() argument
148 return dieid < uncore_max_dies() ? pmu->boxes[dieid] : NULL; in uncore_pmu_to_box()
375 * Using uncore_pmu_event_init pmu event_init callback
382 return &box->pmu->pmu == event->pmu; in is_box_event()
392 max_count = box->pmu->type->num_counters; in uncore_collect_events()
393 if (box->pmu->type->fixed_ctl) in uncore_collect_events()
426 struct intel_uncore_type *type = box->pmu->type; in uncore_get_event_constraint()
451 if (box->pmu->type->ops->put_constraint) in uncore_put_event_constraint()
452 box->pmu->type->ops->put_constraint(box, event); in uncore_put_event_constraint()
688 * PMU if it was the only group available.
[all …]
/linux/tools/perf/arch/x86/util/
H A Dpmu.c17 #include "../../../util/pmu.h"
102 static int uncore_cha_snc(struct perf_pmu *pmu) in num_chas()
118 /* Compute SNC for PMU. */ in uncore_cha_snc()
119 if (sscanf(pmu->name, "uncore_cha_%u", &cha_num) != 1) { in uncore_cha_snc()
120 pr_warning("Unexpected: unable to compute CHA number '%s'\n", pmu->name); in uncore_cha_snc()
130 static int uncore_imc_snc(struct perf_pmu *pmu) in uncore_cha_snc()
154 /* Compute SNC for PMU. */ in uncore_imc_snc()
155 if (sscanf(pmu->name, "uncore_imc_%u", &imc_num) != 1) { in uncore_imc_snc()
156 pr_warning("Unexpected: unable to compute IMC number '%s'\n", pmu->name); in uncore_imc_snc()
203 static void gnr_uncore_cha_imc_adjust_cpumask_for_snc(struct perf_pmu *pmu, boo in uncore_cha_imc_compute_cpu_adjust()
107 uncore_cha_snc(struct perf_pmu * pmu) uncore_cha_snc() argument
135 uncore_imc_snc(struct perf_pmu * pmu) uncore_imc_snc() argument
208 gnr_uncore_cha_imc_adjust_cpumask_for_snc(struct perf_pmu * pmu,bool cha) gnr_uncore_cha_imc_adjust_cpumask_for_snc() argument
272 perf_pmu__arch_init(struct perf_pmu * pmu) perf_pmu__arch_init() argument
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/linux/tools/perf/bench/
H A Dpmu-scan.c3 * Benchmark scanning sysfs files for PMU information.
11 #include "util/pmu.h"
36 "perf bench internals pmu-scan <options>",
45 struct perf_pmu *pmu = NULL; in save_result() local
49 while ((pmu = perf_pmus__scan(pmu)) != NULL) { in save_result()
57 r->name = strdup(pmu->name); in save_result()
58 r->is_core = pmu->is_core; in save_result()
59 r->nr_caps = pmu->nr_caps; in save_result()
61 r->nr_aliases = perf_pmu__num_events(pmu); in save_result()
64 list_for_each(list, &pmu->format) in save_result()
[all …]
/linux/arch/powerpc/perf/
H A DMakefile7 obj64-$(CONFIG_PPC_PERF_CTRS) += ppc970-pmu.o power5-pmu.o \
8 power5+-pmu.o power6-pmu.o power7-pmu.o \
9 isa207-common.o power8-pmu.o power9-pmu.o \
10 generic-compat-pmu.o power10-pmu.o bhrb.o
11 obj32-$(CONFIG_PPC_PERF_CTRS) += mpc7450-pmu.o
13 obj-$(CONFIG_PPC_POWERNV) += imc-pmu.o
15 obj-$(CONFIG_FSL_EMB_PERF_EVENT_E500) += e500-pmu.o e6500-pmu.o
19 obj-$(CONFIG_VPA_PMU) += vpa-pmu.o
21 obj-$(CONFIG_KVM_BOOK3S_HV_PMU) += kvm-hv-pmu.o
23 obj-$(CONFIG_PPC_8xx) += 8xx-pmu.o
H A Dimc-pmu.c13 #include <asm/imc-pmu.h>
22 * Used to avoid races in counting the nest-pmu units during hotplug
61 return container_of(event->pmu, struct imc_pmu, pmu); in imc_event_to_pmu()
105 struct pmu *pmu = dev_get_drvdata(dev); in imc_pmu_cpumask_get_attr() local
106 struct imc_pmu *imc_pmu = container_of(pmu, struct imc_pmu, pmu); in imc_pmu_cpumask_get_attr()
219 * and assign the attr_group to the pmu "pmu".
221 static int update_events_in_group(struct device_node *node, struct imc_pmu *pmu) in update_events_in_group() argument
260 pmu->events = kzalloc_objs(struct imc_events, ct); in update_events_in_group()
261 if (!pmu->events) { in update_events_in_group()
269 ret = imc_parse_event(np, g_scale, g_unit, prefix, base_reg, &pmu->events[ct]); in update_events_in_group()
[all …]

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