/freebsd/crypto/openssl/doc/man1/ |
H A D | build.info | 3 # the additional dependencies on ../perlvars.pm. 5 DEPEND[openssl-asn1parse.pod]=../perlvars.pm 6 DEPEND[openssl-ca.pod]=../perlvars.pm 7 DEPEND[openssl-ciphers.pod]=../perlvars.pm 8 DEPEND[openssl-cmds.pod]=../perlvars.pm 9 DEPEND[openssl-cmp.pod]=../perlvars.pm 10 DEPEND[openssl-cms.pod]=../perlvars.pm 11 DEPEND[openssl-crl2pkcs7.pod]=../perlvars.pm 12 DEPEND[openssl-crl.pod]=../perlvars.pm 13 DEPEND[openssl-dgst.pod]=../perlvars.pm [all …]
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/freebsd/contrib/ofed/opensm/opensm/ |
H A D | osm_perfmgr.c | 125 static void init_monitored_nodes(osm_perfmgr_t * pm) in init_monitored_nodes() argument 127 cl_qmap_init(&pm->monitored_map); in init_monitored_nodes() 128 pm->remove_list = NULL; in init_monitored_nodes() 129 cl_event_construct(&pm->sig_query); in init_monitored_nodes() 130 cl_event_init(&pm->sig_query, FALSE); in init_monitored_nodes() 133 static void mark_for_removal(osm_perfmgr_t * pm, monitored_node_t * node) in mark_for_removal() argument 135 if (pm->remove_list) { in mark_for_removal() 136 node->next = pm->remove_list; in mark_for_removal() 137 pm->remove_list = node; in mark_for_removal() 140 pm->remove_list = node; in mark_for_removal() [all …]
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/freebsd/sys/dev/hwpmc/ |
H A D | hwpmc_mod.c | 202 static int pmc_add_sample(ring_type_t ring, struct pmc *pm, 206 static int pmc_attach_process(struct proc *p, struct pmc *pm); 209 static int pmc_attach_one_process(struct proc *p, struct pmc *pm); 213 static int pmc_can_attach(struct pmc *pm, struct proc *p); 217 static int pmc_detach_process(struct proc *p, struct pmc *pm); 218 static int pmc_detach_one_process(struct proc *p, struct pmc *pm, 221 static void pmc_destroy_pmc_descriptor(struct pmc *pm); 224 static int pmc_find_pmc(pmc_id_t pmcid, struct pmc **pm); 232 static void pmc_link_target_process(struct pmc *pm, 235 static void pmc_log_kernel_mappings(struct pmc *pm); [all …]
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H A D | hwpmc_armv7.c | 135 armv7_allocate_pmc(int cpu, int ri, struct pmc *pm, in armv7_allocate_pmc() argument 151 pm->pm_md.pm_armv7.pm_armv7_evsel = config; in armv7_allocate_pmc() 160 armv7_read_pmc(int cpu, int ri, struct pmc *pm, pmc_value_t *v) in armv7_read_pmc() argument 172 tmp = armv7_pmcn_read(ri, pm->pm_md.pm_armv7.pm_armv7_evsel); in armv7_read_pmc() 175 if (pm->pm_md.pm_armv7.pm_armv7_evsel == PMC_EV_CPU_CYCLES) in armv7_read_pmc() 183 pm->pm_pcpu_state[cpu].pps_overflowcnt++; in armv7_read_pmc() 186 tmp = armv7_pmcn_read(ri, pm->pm_md.pm_armv7.pm_armv7_evsel); in armv7_read_pmc() 188 tmp += 0x100000000llu * pm->pm_pcpu_state[cpu].pps_overflowcnt; in armv7_read_pmc() 192 if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) { in armv7_read_pmc() 209 armv7_write_pmc(int cpu, int ri, struct pmc *pm, pmc_value_t v) in armv7_write_pmc() argument [all …]
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H A D | hwpmc_cmn600.c | 141 cmn600_read_pmc(int cpu, int ri, struct pmc *pm, pmc_value_t *v) in cmn600_read_pmc() argument 155 nodeid = pm->pm_md.pm_cmn600.pm_cmn600_nodeid; in cmn600_read_pmc() 156 local_counter = pm->pm_md.pm_cmn600.pm_cmn600_local_counter; in cmn600_read_pmc() 168 cmn600_write_pmc(int cpu, int ri, struct pmc *pm, pmc_value_t v) in cmn600_write_pmc() argument 182 nodeid = pm->pm_md.pm_cmn600.pm_cmn600_nodeid; in cmn600_write_pmc() 183 local_counter = pm->pm_md.pm_cmn600.pm_cmn600_local_counter; in cmn600_write_pmc() 185 KASSERT(pm != NULL, in cmn600_write_pmc() 197 * pmc 'pm'. 200 cmn600_config_pmc(int cpu, int ri, struct pmc *pm) in cmn600_config_pmc() argument 204 PMCDBG4(MDP, CFG, 1, "%s cpu=%d ri=%d pm=%p", __func__, cpu, ri, pm); in cmn600_config_pmc() [all …]
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H A D | hwpmc_powerpc.c | 181 powerpc_allocate_pmc(int cpu, int ri, struct pmc *pm, in powerpc_allocate_pmc() argument 223 pm->pm_md.pm_powerpc.pm_powerpc_evsel = config; in powerpc_allocate_pmc() 248 powerpc_start_pmc(int cpu, int ri, struct pmc *pm) in powerpc_start_pmc() argument 252 powerpc_set_pmc(cpu, ri, pm->pm_md.pm_powerpc.pm_powerpc_evsel); in powerpc_start_pmc() 258 powerpc_stop_pmc(int cpu, int ri, struct pmc *pm __unused) in powerpc_stop_pmc() 266 powerpc_config_pmc(int cpu, int ri, struct pmc *pm) in powerpc_config_pmc() argument 270 PMCDBG3(MDP,CFG,1, "powerpc-config cpu=%d ri=%d pm=%p", cpu, ri, pm); in powerpc_config_pmc() 279 KASSERT(pm == NULL || phw->phw_pmc == NULL, in powerpc_config_pmc() 280 ("[powerpc,%d] pm=%p phw->pm=%p hwpmc not unconfigured", in powerpc_config_pmc() 281 __LINE__, pm, phw->phw_pmc)); in powerpc_config_pmc() [all …]
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H A D | hwpmc_soft.c | 95 soft_allocate_pmc(int cpu, int ri, struct pmc *pm, in soft_allocate_pmc() argument 111 if ((pm->pm_caps & SOFT_CAPS) == 0) in soft_allocate_pmc() 114 if ((pm->pm_caps & ~SOFT_CAPS) != 0) in soft_allocate_pmc() 117 ev = pm->pm_event; in soft_allocate_pmc() 134 soft_config_pmc(int cpu, int ri, struct pmc *pm) in soft_config_pmc() argument 138 PMCDBG3(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm); in soft_config_pmc() 147 KASSERT(pm == NULL || phw->phw_pmc == NULL, in soft_config_pmc() 148 ("[soft,%d] pm=%p phw->pm=%p hwpmc not unconfigured", __LINE__, in soft_config_pmc() 149 pm, phw->phw_pmc)); in soft_config_pmc() 151 phw->phw_pmc = pm; in soft_config_pmc() [all …]
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H A D | hwpmc_core.c | 222 iaf_allocate_pmc(int cpu, int ri, struct pmc *pm, in iaf_allocate_pmc() argument 233 PMCDBG2(MDP,ALL,1, "iaf-allocate ri=%d reqcaps=0x%x", ri, pm->pm_caps); in iaf_allocate_pmc() 303 pm->pm_md.pm_iaf.pm_iaf_ctrl = (flags << (ri * 4)); in iaf_allocate_pmc() 306 (uintmax_t) pm->pm_md.pm_iaf.pm_iaf_ctrl); in iaf_allocate_pmc() 312 iaf_config_pmc(int cpu, int ri, struct pmc *pm) in iaf_config_pmc() argument 320 PMCDBG3(MDP,CFG,1, "iaf-config cpu=%d ri=%d pm=%p", cpu, ri, pm); in iaf_config_pmc() 325 core_pcpu[cpu]->pc_corepmcs[ri + core_iaf_ri].phw_pmc = pm; in iaf_config_pmc() 371 iaf_read_pmc(int cpu, int ri, struct pmc *pm, pmc_value_t *v) in iaf_read_pmc() argument 382 if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) in iaf_read_pmc() 396 PMCDBG3(MDP,REL,1, "iaf-release cpu=%d ri=%d pm=%p", cpu, ri, pmc); in iaf_release_pmc() [all …]
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H A D | hwpmc_arm64.c | 165 arm64_allocate_pmc(int cpu, int ri, struct pmc *pm, in arm64_allocate_pmc() argument 217 pm->pm_md.pm_arm64.pm_arm64_evsel = config; in arm64_allocate_pmc() 226 arm64_read_pmc(int cpu, int ri, struct pmc *pm, pmc_value_t *v) in arm64_read_pmc() argument 246 pm->pm_pcpu_state[cpu].pps_overflowcnt++; in arm64_read_pmc() 258 tmp += (uint64_t)pm->pm_pcpu_state[cpu].pps_overflowcnt << 32; in arm64_read_pmc() 263 if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) { in arm64_read_pmc() 280 arm64_write_pmc(int cpu, int ri, struct pmc *pm, pmc_value_t v) in arm64_write_pmc() argument 288 if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) in arm64_write_pmc() 294 pm->pm_pcpu_state[cpu].pps_overflowcnt = v >> 32; in arm64_write_pmc() 303 arm64_config_pmc(int cpu, int ri, struct pmc *pm) in arm64_config_pmc() argument [all …]
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H A D | hwpmc_dmc620.c | 192 CLASSDEP_FN4(dmc620_read_pmc, int, cpu, int, ri, struct pmc *, pm, in CLASSDEP_FN4() argument 211 *v = ((uint64_t)pm->pm_pcpu_state[0].pps_overflowcnt << 32) | in CLASSDEP_FN4() 224 CLASSDEP_FN4(dmc620_write_pmc, int, cpu, int, ri, struct pmc *, pm, in CLASSDEP_FN4() argument 245 * pmc 'pm'. 248 CLASSDEP_FN3(dmc620_config_pmc, int, cpu, int, ri, struct pmc *, pm) in CLASSDEP_FN3() argument 252 PMCDBG4(MDP, CFG, 1, "%s cpu=%d ri=%d pm=%p", __func__, cpu, ri, pm); in CLASSDEP_FN3() 261 KASSERT(pm == NULL || phw->phw_pmc == NULL, in CLASSDEP_FN3() 262 ("[dmc620,%d] pm=%p phw->pm=%p hwpmc not unconfigured", in CLASSDEP_FN3() 263 __LINE__, pm, phw->phw_pmc)); in CLASSDEP_FN3() 265 phw->phw_pmc = pm; in CLASSDEP_FN3() [all …]
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/freebsd/sys/contrib/device-tree/Bindings/power/ |
H A D | power_domain.txt | 1 * Generic PM domains 3 System on chip designs are often divided into multiple PM domains that can be 7 This device tree binding can be used to bind PM domain consumer devices with 8 their PM domains provided by PM domain providers. A PM domain provider can be 9 represented by any node in the device tree and can provide one or more PM 11 phandle arguments (so called PM domain specifiers) of length specified by the 12 #power-domain-cells property in the PM domain provider node. 14 ==PM domain providers== 18 ==PM domain consumers== 21 - power-domains : A list of PM domain specifiers, as defined by bindings of [all …]
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H A D | power-domain.yaml | 7 title: Generic PM domains 15 System on chip designs are often divided into multiple PM domains that can be 17 leakage current. Moreover, in some cases the similar PM domains may also be 20 This device tree binding can be used to bind PM domain consumer devices with 21 their PM domains provided by PM domain providers. A PM domain provider can be 22 represented by any node in the device tree and can provide one or more PM 24 phandle arguments (so called PM domain specifiers) of length specified by the 25 \#power-domain-cells property in the PM domai [all...] |
H A D | renesas,sysc-rmobile.txt | 23 - pm-domains: This node contains a hierarchy of PM domain nodes, which should 28 == PM Domain Nodes == 30 Each of the PM domain nodes represents a PM domain, as documented by the 31 generic PM domain bindings in 41 - reg: If the PM domain is not always-on, this property must contain the bit 47 If the PM domain is always-on, this property must be omitted. 52 This shows a subset of the r8a7740 PM domain hierarchy, containing the 60 pm-domains { 87 == PM Domain Consumers == 89 Hardware blocks belonging to a PM domain should contain a "power-domains" [all …]
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/freebsd/sys/contrib/dev/mediatek/mt76/mt7615/ |
H A D | sdio_mcu.c | 59 struct mt76_connac_pm *pm = &dev->pm; in __mt7663s_mcu_drv_pmctrl() local 74 pm->stats.last_wake_event = jiffies; in __mt7663s_mcu_drv_pmctrl() 75 pm->stats.doze_time += pm->stats.last_wake_event - in __mt7663s_mcu_drv_pmctrl() 76 pm->stats.last_doze_event; in __mt7663s_mcu_drv_pmctrl() 88 mutex_lock(&dev->pm.mutex); in mt7663s_mcu_drv_pmctrl() 93 mutex_unlock(&dev->pm.mutex); in mt7663s_mcu_drv_pmctrl() 102 struct mt76_connac_pm *pm = &dev->pm; in mt7663s_mcu_fw_pmctrl() local 106 mutex_lock(&pm->mutex); in mt7663s_mcu_fw_pmctrl() 108 if (mt76_connac_skip_fw_pmctrl(mphy, pm)) in mt7663s_mcu_fw_pmctrl() 121 pm->stats.last_doze_event = jiffies; in mt7663s_mcu_fw_pmctrl() [all …]
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/freebsd/sys/powerpc/powerpc/ |
H A D | copyinout.c | 162 pmap_t pm; in REMAP() local 169 pm = &td->td_proc->p_vmspace->vm_pmap; in REMAP() 181 if (pmap_map_user_ptr(pm, up, (void **)&p, len, &l)) { in REMAP() 201 pmap_t pm; in REMAP() local 208 pm = &td->td_proc->p_vmspace->vm_pmap; in REMAP() 220 if (pmap_map_user_ptr(pm, up, (void **)&p, len, &l)) { in REMAP() 240 pmap_t pm; in REMAP() local 248 pm = &td->td_proc->p_vmspace->vm_pmap; in REMAP() 263 if (pmap_map_user_ptr(pm, up, (void **)&p, len, &l)) { in REMAP() 293 pmap_t pm; in REMAP() local [all …]
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/freebsd/sys/contrib/dev/mediatek/mt76/ |
H A D | mt76_connac.h | 334 int mt76_connac_pm_wake(struct mt76_phy *phy, struct mt76_connac_pm *pm); 336 struct mt76_connac_pm *pm); 337 void mt76_connac_free_pending_tx_skbs(struct mt76_connac_pm *pm, 347 mt76_connac_pm_ref(struct mt76_phy *phy, struct mt76_connac_pm *pm) in mt76_connac_pm_ref() argument 351 spin_lock_bh(&pm->wake.lock); in mt76_connac_pm_ref() 355 pm->wake.count++; in mt76_connac_pm_ref() 358 spin_unlock_bh(&pm->wake.lock); in mt76_connac_pm_ref() 364 mt76_connac_pm_unref(struct mt76_phy *phy, struct mt76_connac_pm *pm) in mt76_connac_pm_unref() argument 366 spin_lock_bh(&pm->wake.lock); in mt76_connac_pm_unref() 368 pm->last_activity = jiffies; in mt76_connac_pm_unref() [all …]
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/freebsd/sys/contrib/device-tree/Bindings/arm/ux500/ |
H A D | power_domain.txt | 1 * ST-Ericsson UX500 PM Domains 3 UX500 supports multiple PM domains which are used to gate power to one or 6 The implementation of PM domains for UX500 are based upon the generic PM domain 9 ==PM domain providers== 12 - compatible: Must be "stericsson,ux500-pm-domains". 17 compatible = "stericsson,ux500-pm-domains"; 21 ==PM domain consumers== 24 - power-domains: A phandle and PM domain specifier. Below are the list of
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/freebsd/crypto/openssl/providers/common/der/ |
H A D | build.info | 8 DEPEND[$DER_DIGESTS_GEN]=oids_to_c.pm NIST.asn1 DIGESTS.asn1 12 DEPEND[$DER_DIGESTS_H]=oids_to_c.pm NIST.asn1 DIGESTS.asn1 22 DEPEND[$DER_RSA_GEN]=oids_to_c.pm NIST.asn1 RSA.asn1 27 DEPEND[$DER_RSA_H]=oids_to_c.pm NIST.asn1 RSA.asn1 36 DEPEND[$DER_DSA_GEN]=oids_to_c.pm DSA.asn1 41 DEPEND[$DER_DSA_H]=oids_to_c.pm DSA.asn1 51 DEPEND[$DER_EC_GEN]=oids_to_c.pm EC.asn1 56 DEPEND[$DER_EC_H]=oids_to_c.pm EC.asn1 66 DEPEND[$DER_ECX_GEN]=oids_to_c.pm ECX.asn1 71 DEPEND[$DER_ECX_H]=oids_to_c.pm ECX.asn1 [all …]
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/freebsd/sys/contrib/dev/mediatek/mt76/mt7921/ |
H A D | debugfs.c | 146 struct mt76_connac_pm *pm = &dev->pm; in mt7921_pm_set() local 153 if (val == pm->enable_user) in mt7921_pm_set() 156 if (!pm->enable_user) { in mt7921_pm_set() 157 pm->stats.last_wake_event = jiffies; in mt7921_pm_set() 158 pm->stats.last_doze_event = jiffies; in mt7921_pm_set() 163 pm->enable = false; in mt7921_pm_set() 164 mt76_connac_pm_wake(&dev->mphy, pm); in mt7921_pm_set() 166 pm->enable_user = val; in mt7921_pm_set() 168 mt76_connac_power_save_sched(&dev->mphy, pm); in mt7921_pm_set() 180 *val = dev->pm.enable_user; in mt7921_pm_get() [all …]
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H A D | sdio.c | 32 if (!mt76_connac_pm_ref(&dev->mphy, &dev->pm)) { in mt7921s_txrx_worker() 33 queue_work(mdev->wq, &dev->pm.wake_work); in mt7921s_txrx_worker() 38 mt76_connac_pm_unref(&dev->mphy, &dev->pm); in mt7921s_txrx_worker() 43 struct mt76_connac_pm *pm = &dev->pm; in mt7921s_unregister_device() local 47 cancel_delayed_work_sync(&pm->ps_work); in mt7921s_unregister_device() 48 cancel_work_sync(&pm->wake_work); in mt7921s_unregister_device() 209 struct mt76_connac_pm *pm = &dev->pm; in mt7921s_suspend() local 213 pm->suspended = true; in mt7921s_suspend() 217 cancel_delayed_work_sync(&pm->ps_work); in mt7921s_suspend() 218 cancel_work_sync(&pm->wake_work); in mt7921s_suspend() [all …]
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/freebsd/sys/contrib/device-tree/Bindings/soc/bcm/ |
H A D | brcm,bcm2835-pm.yaml | 4 $id: http://devicetree.org/schemas/soc/bcm/brcm,bcm2835-pm.yaml# 7 title: BCM2835 PM (Power domains, watchdog) 10 The PM block controls power domains and some reset lines, and includes a 23 - brcm,bcm2835-pm 24 - brcm,bcm2711-pm 25 - const: brcm,bcm2835-pm-wdt 34 - const: pm 74 compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt"; 79 reg-names = "pm", "asb";
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H A D | brcm,bcm2835-pm.txt | 1 BCM2835 PM (Power domains, watchdog) 3 The PM block controls power domains and some reset lines, and includes 4 a watchdog timer. This binding supersedes the brcm,bcm2835-pm-wdt 5 binding which covered some of PM's register range and functionality. 9 - compatible: Should be "brcm,bcm2835-pm" 11 register ranges ("PM" and "ASYNC_BRIDGE" in that 34 pm { 35 compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt";
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/freebsd/sys/powerpc/aim/ |
H A D | slb.c | 230 user_va_to_slb_entry(pmap_t pm, vm_offset_t va) in user_va_to_slb_entry() argument 236 ua = pm->pm_slb_tree_root; in user_va_to_slb_entry() 267 va_to_vsid(pmap_t pm, vm_offset_t va) in va_to_vsid() argument 272 if (pm == kernel_pmap) in va_to_vsid() 280 entry = user_va_to_slb_entry(pm, va); in va_to_vsid() 283 return (allocate_user_vsid(pm, in va_to_vsid() 290 allocate_user_vsid(pmap_t pm, uint64_t esid, int large) in allocate_user_vsid() argument 297 KASSERT(pm != kernel_pmap, ("Attempting to allocate a kernel VSID")); in allocate_user_vsid() 299 PMAP_LOCK_ASSERT(pm, MA_OWNED); in allocate_user_vsid() 306 ua = pm->pm_slb_tree_root; in allocate_user_vsid() [all …]
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/freebsd/sys/contrib/dev/mediatek/mt76/mt7925/ |
H A D | debugfs.c | 185 struct mt76_connac_pm *pm = &dev->pm; in mt7925_pm_set() local 192 if (val == pm->enable_user) in mt7925_pm_set() 195 if (!pm->enable_user) { in mt7925_pm_set() 196 pm->stats.last_wake_event = jiffies; in mt7925_pm_set() 197 pm->stats.last_doze_event = jiffies; in mt7925_pm_set() 202 pm->enable = false; in mt7925_pm_set() 203 mt76_connac_pm_wake(&dev->mphy, pm); in mt7925_pm_set() 205 pm->enable_user = val; in mt7925_pm_set() 207 mt76_connac_power_save_sched(&dev->mphy, pm); in mt7925_pm_set() 219 *val = dev->pm.enable_user; in mt7925_pm_get() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/DirectX/ |
H A D | DirectXTargetMachine.cpp | 71 DirectXPassConfig(DirectXTargetMachine &TM, PassManagerBase &PM) in DirectXPassConfig() argument 72 : TargetPassConfig(TM, PM) {} in DirectXPassConfig() 111 PassManagerBase &PM, raw_pwrite_stream &Out, raw_pwrite_stream *DwoOut, in addPassesToEmitFile() argument 114 TargetPassConfig *PassConfig = createPassConfig(PM); in addPassesToEmitFile() 119 PM.add(createDXILPrettyPrinterPass(Out)); in addPassesToEmitFile() 120 PM.add(createPrintModulePass(Out, "", true)); in addPassesToEmitFile() 124 PM.add(createDXILEmbedderPass()); in addPassesToEmitFile() 127 PM.add(createDXContainerGlobalsPass()); in addPassesToEmitFile() 131 PM.add(MMIWP); in addPassesToEmitFile() 132 if (addAsmPrinter(PM, Out, DwoOut, FileType, in addPassesToEmitFile() [all …]
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