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/linux/drivers/irqchip/
H A Dirq-mvebu-pic.c36 static void mvebu_pic_reset(struct mvebu_pic *pic) in mvebu_pic_reset() argument
39 writel(0, pic->base + PIC_MASK); in mvebu_pic_reset()
40 writel(PIC_MAX_IRQ_MASK, pic->base + PIC_CAUSE); in mvebu_pic_reset()
45 struct mvebu_pic *pic = irq_data_get_irq_chip_data(d); in mvebu_pic_eoi_irq() local
47 writel(1 << d->hwirq, pic->base + PIC_CAUSE); in mvebu_pic_eoi_irq()
52 struct mvebu_pic *pic = irq_data_get_irq_chip_data(d); in mvebu_pic_mask_irq() local
55 reg = readl(pic->base + PIC_MASK); in mvebu_pic_mask_irq()
57 writel(reg, pic->base + PIC_MASK); in mvebu_pic_mask_irq()
62 struct mvebu_pic *pic = irq_data_get_irq_chip_data(d); in mvebu_pic_unmask_irq() local
65 reg = readl(pic->base + PIC_MASK); in mvebu_pic_unmask_irq()
[all …]
H A Dirq-or1k-pic.c13 /* OR1K PIC implementation */
48 * There are two oddities with the OR1200 PIC implementation:
66 .name = "or1k-PIC-level",
76 .name = "or1k-PIC-edge",
88 .name = "or1200-PIC",
123 struct or1k_pic_dev *pic = d->host_data; in or1k_map() local
125 irq_set_chip_and_handler(irq, &pic->chip, pic->handle); in or1k_map()
126 irq_set_status_flags(irq, pic->flags); in or1k_map()
137 * This sets up the IRQ domain for the PIC built in to the OpenRISC
142 struct or1k_pic_dev *pic) in or1k_pic_init() argument
[all …]
/linux/drivers/media/platform/verisilicon/
H A Dhantro_g1_mpeg2_dec.c96 const struct v4l2_ctrl_mpeg2_picture *pic) in hantro_g1_mpeg2_dec_set_buffers() argument
101 switch (pic->picture_coding_type) { in hantro_g1_mpeg2_dec_set_buffers()
103 backward_addr = hantro_get_ref(ctx, pic->backward_ref_ts); in hantro_g1_mpeg2_dec_set_buffers()
106 forward_addr = hantro_get_ref(ctx, pic->forward_ref_ts); in hantro_g1_mpeg2_dec_set_buffers()
117 if (pic->picture_structure == V4L2_MPEG2_PIC_BOTTOM_FIELD) in hantro_g1_mpeg2_dec_set_buffers()
127 if (pic->picture_structure == V4L2_MPEG2_PIC_FRAME || in hantro_g1_mpeg2_dec_set_buffers()
128 pic->picture_coding_type == V4L2_MPEG2_PIC_CODING_TYPE_B || in hantro_g1_mpeg2_dec_set_buffers()
129 (pic->picture_structure == V4L2_MPEG2_PIC_TOP_FIELD && in hantro_g1_mpeg2_dec_set_buffers()
130 pic->flags & V4L2_MPEG2_PIC_FLAG_TOP_FIELD_FIRST) || in hantro_g1_mpeg2_dec_set_buffers()
131 (pic->picture_structure == V4L2_MPEG2_PIC_BOTTOM_FIELD && in hantro_g1_mpeg2_dec_set_buffers()
[all …]
H A Drockchip_vpu2_hw_mpeg2_dec.c99 const struct v4l2_ctrl_mpeg2_picture *pic) in rockchip_vpu2_mpeg2_dec_set_buffers() argument
104 switch (pic->picture_coding_type) { in rockchip_vpu2_mpeg2_dec_set_buffers()
106 backward_addr = hantro_get_ref(ctx, pic->backward_ref_ts); in rockchip_vpu2_mpeg2_dec_set_buffers()
109 forward_addr = hantro_get_ref(ctx, pic->forward_ref_ts); in rockchip_vpu2_mpeg2_dec_set_buffers()
120 if (pic->picture_structure == V4L2_MPEG2_PIC_BOTTOM_FIELD) in rockchip_vpu2_mpeg2_dec_set_buffers()
130 if (pic->picture_structure == V4L2_MPEG2_PIC_FRAME || in rockchip_vpu2_mpeg2_dec_set_buffers()
131 pic->picture_coding_type == V4L2_MPEG2_PIC_CODING_TYPE_B || in rockchip_vpu2_mpeg2_dec_set_buffers()
132 (pic->picture_structure == V4L2_MPEG2_PIC_TOP_FIELD && in rockchip_vpu2_mpeg2_dec_set_buffers()
133 pic->flags & V4L2_MPEG2_PIC_TOP_FIELD) || in rockchip_vpu2_mpeg2_dec_set_buffers()
134 (pic->picture_structure == V4L2_MPEG2_PIC_BOTTOM_FIELD && in rockchip_vpu2_mpeg2_dec_set_buffers()
[all …]
/linux/arch/m68k/virt/
H A Dints.c34 * 6 goldfish-pic for CPU IRQ #1 to IRQ #6
35 * CPU IRQ #1 -> PIC #1
38 * CPU IRQ #2 -> PIC #2
40 * CPU IRQ #3 -> PIC #3
42 * CPU IRQ #4 -> PIC #4
44 * CPU IRQ #5 -> PIC #5
46 * CPU IRQ #6 -> PIC #6
53 static u32 gfpic_read(int pic, int reg) in gfpic_read() argument
55 void __iomem *base = (void __iomem *)(virt_bi_data.pic.mmio + in gfpic_read()
56 pic * 0x1000); in gfpic_read()
[all …]
/linux/Documentation/devicetree/bindings/pci/
H A Dv3,v360epc-pci.yaml69 interrupt-parent = <&pic>;
80 <0x4800 0 0 1 &pic 13>, /* INT A on slot 9 is irq 13 */
81 <0x4800 0 0 2 &pic 14>, /* INT B on slot 9 is irq 14 */
82 <0x4800 0 0 3 &pic 15>, /* INT C on slot 9 is irq 15 */
83 <0x4800 0 0 4 &pic 16>, /* INT D on slot 9 is irq 16 */
85 <0x5000 0 0 1 &pic 14>, /* INT A on slot 10 is irq 14 */
86 <0x5000 0 0 2 &pic 15>, /* INT B on slot 10 is irq 15 */
87 <0x5000 0 0 3 &pic 16>, /* INT C on slot 10 is irq 16 */
88 <0x5000 0 0 4 &pic 13>, /* INT D on slot 10 is irq 13 */
90 <0x5800 0 0 1 &pic 15>, /* INT A on slot 11 is irq 15 */
[all …]
/linux/arch/loongarch/boot/dts/
H A Dloongson-2k2000.dtsi148 pic: interrupt-controller@10000000 { label
149 compatible = "loongson,pch-pic-1.0";
153 loongson,pic-base-vec = <0>;
171 interrupt-parent = <&pic>;
181 interrupt-parent = <&pic>;
191 interrupt-parent = <&pic>;
201 interrupt-parent = <&pic>;
211 interrupt-parent = <&pic>;
221 interrupt-parent = <&pic>;
231 interrupt-parent = <&pic>;
[all …]
/linux/drivers/staging/media/sunxi/cedrus/
H A Dcedrus_mpeg2.c54 const struct v4l2_ctrl_mpeg2_picture *pic; in cedrus_mpeg2_setup() local
64 pic = run->mpeg2.picture; in cedrus_mpeg2_setup()
91 reg = VE_DEC_MPEG_MP12HDR_SLICE_TYPE(pic->picture_coding_type); in cedrus_mpeg2_setup()
92 reg |= VE_DEC_MPEG_MP12HDR_F_CODE(0, 0, pic->f_code[0][0]); in cedrus_mpeg2_setup()
93 reg |= VE_DEC_MPEG_MP12HDR_F_CODE(0, 1, pic->f_code[0][1]); in cedrus_mpeg2_setup()
94 reg |= VE_DEC_MPEG_MP12HDR_F_CODE(1, 0, pic->f_code[1][0]); in cedrus_mpeg2_setup()
95 reg |= VE_DEC_MPEG_MP12HDR_F_CODE(1, 1, pic->f_code[1][1]); in cedrus_mpeg2_setup()
96 reg |= VE_DEC_MPEG_MP12HDR_INTRA_DC_PRECISION(pic->intra_dc_precision); in cedrus_mpeg2_setup()
97 reg |= VE_DEC_MPEG_MP12HDR_INTRA_PICTURE_STRUCTURE(pic->picture_structure); in cedrus_mpeg2_setup()
98 reg |= VE_DEC_MPEG_MP12HDR_TOP_FIELD_FIRST(pic->flags & V4L2_MPEG2_PIC_FLAG_TOP_FIELD_FIRST); in cedrus_mpeg2_setup()
[all …]
/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dloongson,pch-pic.yaml4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,pch-pic.yaml#
7 title: Loongson PCH PIC Controller
19 const: loongson,pch-pic-1.0
24 loongson,pic-base-vec:
27 to PCH PIC.
40 - loongson,pic-base-vec
49 pic: interrupt-controller@10000000 {
50 compatible = "loongson,pch-pic-1.0";
54 loongson,pic-base-vec = <64>;
H A Dopencores,or1k-pic.yaml4 $id: http://devicetree.org/schemas/interrupt-controller/opencores,or1k-pic.yaml#
15 - opencores,or1k-pic-level
16 - opencores,or1k-pic-edge
17 - opencores,or1200-pic
18 - opencores,or1k-pic
35 compatible = "opencores,or1k-pic-level";
/linux/arch/arm/boot/dts/arm/
H A Dintegratorap.dts149 pic: pic@14000000 { label
161 interrupt-parent = <&pic>;
178 0x4800 0 0 1 &pic 13 /* INT A on slot 9 is irq 13 */
179 0x4800 0 0 2 &pic 14 /* INT B on slot 9 is irq 14 */
180 0x4800 0 0 3 &pic 15 /* INT C on slot 9 is irq 15 */
181 0x4800 0 0 4 &pic 16 /* INT D on slot 9 is irq 16 */
183 0x5000 0 0 1 &pic 14 /* INT A on slot 10 is irq 14 */
184 0x5000 0 0 2 &pic 15 /* INT B on slot 10 is irq 15 */
185 0x5000 0 0 3 &pic 16 /* INT C on slot 10 is irq 16 */
186 0x5000 0 0 4 &pic 13 /* INT D on slot 10 is irq 13 */
[all …]
/linux/arch/xtensa/boot/dts/
H A Dvirt.dts8 interrupt-parent = <&pic>;
37 pic: pic { label
38 compatible = "cdns,xtensa-pic";
64 0x0000 0x0 0x0 0x1 &pic 0x0 0x1
65 0x0800 0x0 0x0 0x1 &pic 0x1 0x1
66 0x1000 0x0 0x0 0x1 &pic 0x2 0x1
67 0x1800 0x0 0x0 0x1 &pic 0x3 0x1
/linux/arch/powerpc/boot/dts/
H A Dtqm8xx.dts39 interrupt-parent = <&PIC>;
73 interrupt-parent = <&PIC>;
85 interrupt-parent = <&PIC>;
115 interrupt-parent = <&PIC>;
120 PIC: pic@0 { label
124 compatible = "fsl,mpc860-pic", "fsl,pq1-pic";
156 CPM_PIC: pic@930 {
161 interrupt-parent = <&PIC>;
163 compatible = "fsl,mpc860-cpm-pic",
164 "fsl,cpm1-pic";
H A Dep8248e.dts72 interrupt-parent = <&PIC>;
77 interrupt-parent = <&PIC>;
135 interrupt-parent = <&PIC>;
148 interrupt-parent = <&PIC>;
161 interrupt-parent = <&PIC>;
174 interrupt-parent = <&PIC>;
186 interrupt-parent = <&PIC>;
192 PIC: interrupt-controller@10c00 { label
196 compatible = "fsl,mpc8248-pic", "fsl,pq2-pic";
H A Dmpc866ads.dts32 interrupt-parent = <&PIC>;
83 interrupt-parent = <&PIC>;
88 PIC: pic@0 { label
92 compatible = "fsl,mpc866-pic", "fsl,pq1-pic";
124 CPM_PIC: pic@930 {
129 interrupt-parent = <&PIC>;
131 compatible = "fsl,mpc866-cpm-pic",
132 "fsl,cpm1-pic";
H A Dmpc885ads.dts32 interrupt-parent = <&PIC>;
103 interrupt-parent = <&PIC>;
115 interrupt-parent = <&PIC>;
120 PIC: interrupt-controller@0 { label
124 compatible = "fsl,mpc885-pic", "fsl,pq1-pic";
134 interrupt-parent = <&PIC>;
171 interrupt-parent = <&PIC>;
173 compatible = "fsl,mpc885-cpm-pic",
174 "fsl,cpm1-pic";
228 interrupt-parent = <&PIC>;
H A Dadder875-redboot.dts37 interrupt-parent = <&PIC>;
100 interrupt-parent = <&PIC>;
112 interrupt-parent = <&PIC>;
117 PIC: interrupt-controller@0 { label
121 compatible = "fsl,mpc875-pic", "fsl,pq1-pic";
156 interrupt-parent = <&PIC>;
158 compatible = "fsl,mpc875-cpm-pic",
159 "fsl,cpm1-pic";
H A Dadder875-uboot.dts37 interrupt-parent = <&PIC>;
99 interrupt-parent = <&PIC>;
111 interrupt-parent = <&PIC>;
116 PIC: interrupt-controller@0 { label
120 compatible = "fsl,mpc875-pic", "fsl,pq1-pic";
155 interrupt-parent = <&PIC>;
157 compatible = "fsl,mpc875-cpm-pic",
158 "fsl,cpm1-pic";
H A Dep88xc.dts32 interrupt-parent = <&PIC>;
98 interrupt-parent = <&PIC>;
110 interrupt-parent = <&PIC>;
115 PIC: interrupt-controller@0 { label
119 compatible = "fsl,mpc885-pic", "fsl,pq1-pic";
129 interrupt-parent = <&PIC>;
165 interrupt-parent = <&PIC>;
167 compatible = "fsl,mpc885-cpm-pic",
168 "fsl,cpm1-pic";
/linux/arch/powerpc/platforms/52xx/
H A Dlite5200_pm.c15 static struct mpc52xx_intr __iomem *pic; variable
78 pic = mbar + 0x500; in lite5200_pm_prepare()
100 _memcpy_fromio(&spic, pic, sizeof(*pic)); in lite5200_save_regs()
188 /* PIC */ in lite5200_restore_regs()
189 out_be32(&pic->per_pri1, spic.per_pri1); in lite5200_restore_regs()
190 out_be32(&pic->per_pri2, spic.per_pri2); in lite5200_restore_regs()
191 out_be32(&pic->per_pri3, spic.per_pri3); in lite5200_restore_regs()
193 out_be32(&pic->main_pri1, spic.main_pri1); in lite5200_restore_regs()
194 out_be32(&pic->main_pri2, spic.main_pri2); in lite5200_restore_regs()
196 out_be32(&pic->enc_status, spic.enc_status); in lite5200_restore_regs()
[all …]
/linux/arch/sparc/include/uapi/asm/
H A Dperfctr.h26 * to 64-bit accumulator for D0 counter in PIC, ARG1 is pointer
38 /* Add current D0 and D1 PIC values into user pointers given
39 * in PERFCTR_ON operation. The PIC is cleared before returning.
43 /* Clear the PIC register. */
47 * in ARG0. The PIC is also cleared after the new PCR value is
62 /* Pic.S0 Selection Bit Field Encoding, Ultra-I/II */
76 /* Pic.S0 Selection Bit Field Encoding, Ultra-III */
107 /* Pic.S1 Selection Bit Field Encoding, Ultra-I/II */
121 /* Pic.S1 Selection Bit Field Encoding, Ultra-III */
/linux/arch/alpha/kernel/
H A Dirq_i8259.c76 .name = "XT-PIC",
120 * Generate a PCI interrupt acknowledge cycle. The PIC will in isa_device_interrupt()
135 unsigned long pic; in isa_no_iack_sc_device_interrupt() local
150 pic = inb(0x20) | (inb(0xA0) << 8); /* read isr */ in isa_no_iack_sc_device_interrupt()
151 pic &= 0xFFFB; /* mask out cascade & hibits */ in isa_no_iack_sc_device_interrupt()
153 while (pic) { in isa_no_iack_sc_device_interrupt()
154 int j = ffz(~pic); in isa_no_iack_sc_device_interrupt()
155 pic &= pic - 1; in isa_no_iack_sc_device_interrupt()
/linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/
H A Dpic.txt4 - fsl,cpm1-pic
6 - fsl,pq1-pic
7 - fsl,cpm2-pic
17 compatible = "mpc8272-pic", "fsl,cpm2-pic";
/linux/drivers/media/platform/mediatek/vcodec/decoder/vdec/
H A Dvdec_h264_if.c102 * @pic : picture information (AP-R, VPU-W)
112 struct vdec_pic_info pic; member
164 static int alloc_mv_buf(struct vdec_h264_inst *inst, struct vdec_pic_info *pic) in alloc_mv_buf() argument
169 unsigned int buf_sz = get_mv_buf_size(pic->buf_w, pic->buf_h); in alloc_mv_buf()
243 struct vdec_pic_info *pic) in get_pic_info() argument
245 *pic = inst->vsi->pic; in get_pic_info()
246 mtk_vdec_debug(inst->ctx, "pic(%d, %d), buf(%d, %d)", in get_pic_info()
247 pic->pic_w, pic->pic_h, pic->buf_w, pic->buf_h); in get_pic_info()
248 mtk_vdec_debug(inst->ctx, "fb size: Y(%d), C(%d)", pic->fb_sz[0], pic->fb_sz[1]); in get_pic_info()
393 struct vdec_pic_info pic; in vdec_h264_decode() local
[all …]
/linux/arch/sparc/include/asm/
H A Dpcr.h19 #define PCR_PIC_PRIV 0x00000001 /* PIC access is privileged */
23 #define PCR_N2_TOE_OV0 0x00000010 /* Trap if PIC 0 overflows */
24 #define PCR_N2_TOE_OV1 0x00000020 /* Trap if PIC 1 overflows */
36 #define PCR_N4_OV 0x00000001 /* PIC overflow */
45 #define PCR_N4_PICNPT 0x00010000 /* PIC non-privileged trap */
46 #define PCR_N4_PICNHT 0x00020000 /* PIC non-hypervisor trap */

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