PHY\-viewport\-based (full) in projects: freebsd

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Searched +full:phy +full:- +full:viewport +full:- +full:based (Results 1 – 6 of 6) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/pci/
H A D	socionext,uniphier-pcie.yaml	`1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/socionext,uniphier-pcie.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 UniPhier PCIe host controller is based on the Synopsys DesignWare 13 Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml. 16 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com> 19 - $ref: /schemas/pci/snps,dw-pcie.yaml# 24 - socionext,uniphier-pcie 30 reg-names: [all …]`
H A D	snps,dw-pcie-common.yaml	`1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/snps,dw-pci [all...]`
H A D	uniphier-pcie.txt	6 UniPhier PCIe host controller is based on the Synopsys DesignWare PCI core. 9 Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml. 12 - compatible: Should be "socionext,uniphier-pcie". 13 - reg: Specifies offset and length of the register set for the device. 14 According to the reg-names, appropriate register sets are required. 15 - reg-names: Must include the following entries: 16 "dbi" - controller configuration registers 17 "link" - SoC-specific glue layer registers 18 "config" - PCIe configuration space 19 "atu" - iATU registers for DWC version 4.80 or later [all …]
H A D	nvidia,tegra194-pcie.yaml	1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/nvidia,tegra194-pcie.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NVIDIA Tegra194 (and later) PCIe controller (Synopsys DesignWare Core based) 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 12 - Vidya Sagar <vidyas@nvidia.com> 15 This PCIe controller is based on the Synopsys DesignWare PCIe IP and thus 16 inherits all the common properties defined in snps,dw-pcie.yaml. Some of [all …]
/freebsd/sys/contrib/device-tree/src/arm64/exynos/
H A D	exynos5433.dtsi	`1 // SPDX-License-Identifier: GPL-2.0 8 * Exynos5433 based board files can include this file and provide 16 #include <dt-bindings/clock/exynos5433.h> 17 #include <dt-bindings/interrupt-controller/arm-gic.h> 21 #address-cells = <2>; 22 #size-cells = <2>; 24 interrupt-parent = <&gic>; 26 arm-a53-pmu { 27 compatible = "arm,cortex-a53-pmu"; 32 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; [all …]`
/freebsd/sys/dev/qlnx/qlnxe/
H A D	reg_addr.h	2 * Copyright (c) 2017-2018 Cavium, Inc. 78 …- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl… 79 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea… 80 …s:R DataWidth:0x6 // 0 - RX target read and config sync fifo push overflow 1 - RX header syn… 81 …ataWidth:0x14 // 4:0 - TXCPL sync fifo pop status 9:5 - TXR sync fifo pop status 14:10 - TXW hea… 88 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of … 90 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E… 116 … (0x1<<9) // Fast back-to-back transaction ena… 128 … (0x1<<23) // Fast back-to-back capable. Not ap… 145 …l has_io_bar=0. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E… [all …]