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/linux/drivers/net/fddi/skfp/
H A Dpcmplc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
67 #define GO_STATE(x) (mib->fddiPORTPCMState = (x)|AFLAG)
68 #define ACTIONS_DONE() (mib->fddiPORTPCMState &= ~AFLAG)
109 * PCL-S control register
110 * this register in the PLC-S controls the scrambling parameters
121 * PCL-S control register
122 * this register in the PLC-S controls the scrambling parameters
152 #define PLC_MS(m) ((int)((0x10000L-(m*100000L/2048))))
191 static void pcm_fsm(struct s_smc *smc, struct s_phy *phy, int cmd);
192 static void pc_rcode_actions(struct s_smc *smc, int bit, struct s_phy *phy);
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/linux/Documentation/networking/
H A Dphy.rst2 PHY Abstraction Layer
10 PHY. The PHY concerns itself with negotiating link parameters with the link
17 the PHY management code with the network driver. This has resulted in large
23 accessed are, in fact, busses, the PHY Abstraction Layer treats them as such.
26 #. Increase code-reuse
27 #. Increase overall code-maintainability
30 Basically, this layer is meant to provide an interface to PHY devices which
37 Most network devices are connected to a PHY by means of a management bus.
47 mii_id is the address on the bus for the PHY, and regnum is the register
57 mdiobus_register. Similarly, there's a remove function to undo all of
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H A Dphy-link-topology.rst1 .. SPDX-License-Identifier: GPL-2.0
5 PHY link topology
11 The PHY link topology representation in the networking stack aims at representing
14 An Ethernet interface from userspace's point of view is nothing but a
19 +-----------------------+ +----------+ +--------------+
21 | MAC | ------ | PHY | ---- | Port | ---... to LP
22 +-----------------------+ +----------+ +--------------+
25 Commands that needs to configure the PHY will go through the net_device.phydev
26 field to reach the PHY and perform the relevant configuration.
29 for example, using SFP transceivers (although that's not the only specific case).
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/linux/drivers/scsi/aic94xx/
H A Daic94xx_scb.c1 // SPDX-License-Identifier: GPL-2.0-only
19 /* ---------- EMPTY SCB ---------- */
36 static void get_lrate_mode(struct asd_phy *phy, u8 oob_mode) in get_lrate_mode() argument
38 struct sas_phy *sas_phy = phy->sas_phy.phy; in get_lrate_mode()
43 phy->sas_phy.linkrate = SAS_LINK_RATE_6_0_GBPS; in get_lrate_mode()
44 phy->sas_phy.phy->negotiated_linkrate = SAS_LINK_RATE_6_0_GBPS; in get_lrate_mode()
47 phy->sas_phy.linkrate = SAS_LINK_RATE_3_0_GBPS; in get_lrate_mode()
48 phy->sas_phy.phy->negotiated_linkrate = SAS_LINK_RATE_3_0_GBPS; in get_lrate_mode()
51 phy->sas_phy.linkrate = SAS_LINK_RATE_1_5_GBPS; in get_lrate_mode()
52 phy->sas_phy.phy->negotiated_linkrate = SAS_LINK_RATE_1_5_GBPS; in get_lrate_mode()
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H A Daic94xx_hwi.c1 // SPDX-License-Identifier: GPL-2.0-only
23 /* ---------- Initialization ---------- */
28 if (asd_ha->hw_prof.sas_addr[0]) in asd_get_user_sas_addr()
31 return sas_request_addr(asd_ha->sas_ha.shost, in asd_get_user_sas_addr()
32 asd_ha->hw_prof.sas_addr); in asd_get_user_sas_addr()
40 if (asd_ha->hw_prof.phy_desc[i].sas_addr[0] == 0) in asd_propagate_sas_addr()
42 /* Set a phy's address only if it has none. in asd_propagate_sas_addr()
44 ASD_DPRINTK("setting phy%d addr to %llx\n", i, in asd_propagate_sas_addr()
45 SAS_ADDR(asd_ha->hw_prof.sas_addr)); in asd_propagate_sas_addr()
46 memcpy(asd_ha->hw_prof.phy_desc[i].sas_addr, in asd_propagate_sas_addr()
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/linux/Documentation/devicetree/bindings/phy/
H A Dti,phy-gmii-sel.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: http://devicetree.org/schemas/phy/ti,phy-gmii-sel.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: CPSW Port's Interface Mode Selection PHY
11 - Kishon Vijay Abraham I <kishon@ti.com>
16 The interface mode is selected by configuring the MII mode selection register(s)
17 (GMII_SEL) in the System Control Module chapter (SCM). GMII_SEL register(s) and
20 +--------------+
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/linux/drivers/phy/qualcomm/
H A Dphy-qcom-uniphy-pcie-28lp.c1 // SPDX-License-Identifier: GPL-2.0+
7 #include <linux/clk-provider.h>
15 #include <linux/phy/phy.h>
66 struct phy phy; member
76 #define phy_to_dw_phy(x) container_of((x), struct qca_uni_pcie_phy, phy)
141 static void qcom_uniphy_pcie_init(struct qcom_uniphy_pcie *phy) in qcom_uniphy_pcie_init() argument
143 const struct qcom_uniphy_pcie_data *data = phy->data; in qcom_uniphy_pcie_init()
145 void __iomem *base = phy->base; in qcom_uniphy_pcie_init()
148 for (lane = 0; lane < phy->lanes; lane++) { in qcom_uniphy_pcie_init()
149 init_seq = data->init_seq; in qcom_uniphy_pcie_init()
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H A Dphy-qcom-pcie2.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2014-2017, The Linux Foundation. All rights reserved.
7 #include <linux/clk-provider.h>
11 #include <linux/phy/phy.h>
16 #include <dt-bindings/phy/phy.h>
50 static int qcom_pcie2_phy_init(struct phy *phy) in qcom_pcie2_phy_init() argument
52 struct qcom_phy *qphy = phy_get_drvdata(phy); in qcom_pcie2_phy_init()
55 ret = reset_control_deassert(qphy->phy_reset); in qcom_pcie2_phy_init()
57 dev_err(qphy->dev, "cannot deassert pipe reset\n"); in qcom_pcie2_phy_init()
61 ret = regulator_bulk_enable(ARRAY_SIZE(qphy->vregs), qphy->vregs); in qcom_pcie2_phy_init()
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H A Dphy-qcom-qmp-pcie-msm8996.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
16 #include <linux/phy/phy.h>
22 #include "phy-qcom-qmp-common.h"
24 #include "phy-qcom-qmp.h"
36 /* set of registers with offsets different per-PHY */
139 /* struct qmp_phy_cfg - per-PHY initialization config */
144 /* Init sequence for PHY blocks - serdes, tx, rx, pcs */
169 * struct qmp_phy - per-lane phy descriptor
171 * @phy: generic phy
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/linux/drivers/phy/samsung/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # Phy drivers for Samsung platforms
6 tristate "Exynos SoC series Display Port PHY driver"
12 Support for Display Port PHY found on Samsung Exynos SoCs.
15 tristate "S5P/Exynos SoC series MIPI CSI-2/DSI PHY driver"
21 Support for MIPI CSI-2 and MIPI DSI DPHY found on Samsung S5P
25 bool "Exynos PCIe PHY driver"
29 Enable PCIe PHY support for Exynos SoC series.
30 This driver provides PHY interface for Exynos PCIe controller.
33 tristate "Exynos SoC series UFS PHY driver"
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H A Dphy-samsung-usb2.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Samsung SoC USB 1.1/2.0 PHY driver
13 #include <linux/phy/phy.h>
16 #include "phy-samsung-usb2.h"
18 static int samsung_usb2_phy_power_on(struct phy *phy) in samsung_usb2_phy_power_on() argument
20 struct samsung_usb2_phy_instance *inst = phy_get_drvdata(phy); in samsung_usb2_phy_power_on()
21 struct samsung_usb2_phy_driver *drv = inst->drv; in samsung_usb2_phy_power_on()
24 dev_dbg(drv->dev, "Request to power_on \"%s\" usb phy\n", in samsung_usb2_phy_power_on()
25 inst->cfg->label); in samsung_usb2_phy_power_on()
27 if (drv->vbus) { in samsung_usb2_phy_power_on()
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/linux/net/ieee802154/
H A Dnl-phy.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
25 #include "rdev-ops.h"
29 u32 seq, int flags, struct wpan_phy *phy) in ieee802154_nl_fill_phy() argument
35 pr_debug("%s\n", __func__); in ieee802154_nl_fill_phy()
38 return -EMSGSIZE; in ieee802154_nl_fill_phy()
46 if (nla_put_string(msg, IEEE802154_ATTR_PHY_NAME, wpan_phy_name(phy)) || in ieee802154_nl_fill_phy()
77 struct wpan_phy *phy; ieee802154_list_phy() local
119 ieee802154_dump_phy_iter(struct wpan_phy * phy,void * _data) ieee802154_dump_phy_iter() argument
164 struct wpan_phy *phy; ieee802154_add_iface() local
269 struct wpan_phy *phy; ieee802154_del_iface() local
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/linux/drivers/scsi/hisi_sas/
H A Dhisi_sas_main.c1 // SPDX-License-Identifier: GPL-2.0-or-later
21 ((!dev) || (dev->dev_type == SAS_PHY_UNUSED))
39 switch (qc->tf.protocol) { in hisi_sas_get_ata_protocol_from_tf()
56 struct host_to_dev_fis *fis = &task->ata_task.fis; in hisi_sas_get_ata_protocol()
57 struct ata_queued_cmd *qc = task->uldd_task; in hisi_sas_get_ata_protocol()
58 int direction = task->data_dir; in hisi_sas_get_ata_protocol()
60 switch (fis->command) { in hisi_sas_get_ata_protocol()
113 switch (fis->features) { in hisi_sas_get_ata_protocol()
137 struct task_status_struct *ts = &task->task_status; in hisi_sas_sata_done()
138 struct ata_task_resp *resp = (struct ata_task_resp *)ts->buf; in hisi_sas_sata_done()
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/linux/drivers/net/phy/
H A Dphylink.c1 // SPDX-License-Identifier: GPL-2.0
3 * phylink models the MAC to optional PHY connection, supporting
4 * technologies such as SFP cages where the PHY is hot-pluggable.
15 #include <linux/phy.h>
23 #include "phy-caps.h"
38 * struct phylink - internal data type for phylink
55 u8 link_port; /* The current non-phy ethtool port */
98 if ((pl)->config->type == PHYLINK_NETDEV) \
99 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \
100 else if ((pl)->config->type == PHYLINK_DEV) \
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/linux/drivers/scsi/isci/
H A Dport.c7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
75 int i = iport->physical_port_index; in sciport_to_dev()
82 table = iport - i; in sciport_to_dev()
85 return &ihost->pdev->dev; in sciport_to_dev()
92 proto->all = 0; in sci_port_get_protocols()
94 struct isci_phy *iphy = iport->phy_table[index]; in sci_port_get_protocols()
109 if (iport->phy_table[index]) in sci_port_get_phys()
116 * sci_port_get_properties() - This method simply returns the properties
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H A Dphy.c7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
58 #include "phy.h"
72 /* Maximum arbitration wait time in micro-seconds */
77 return iphy->max_negotiated_speed; in sci_phy_linkrate()
82 struct isci_phy *table = iphy - iphy->phy_index; in phy_to_host()
90 return &phy_to_host(iphy)->pdev->dev; in sciphy_to_dev()
99 iphy->transport_layer_registers = reg; in sci_phy_transport_layer_initialization()
102 &iphy->transport_layer_registers->stp_rni); in sci_phy_transport_layer_initialization()
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/linux/drivers/net/ethernet/chelsio/cxgb/
H A Dsubr.c1 // SPDX-License-Identifier: GPL-2.0-only
14 * Copyright (c) 2003 - 2005 Chelsio Communications, Inc. *
40 * t1_wait_op_done - wait until an operation is completed
43 * @mask: a single-bit field within @reg that indicates completion
56 u32 val = readl(adapter->regs + reg) & mask; in t1_wait_op_done()
60 if (--attempts == 0) in t1_wait_op_done()
76 writel(addr, adapter->regs + A_TPI_ADDR); in __t1_tpi_write()
77 writel(value, adapter->regs + A_TPI_WR_DATA); in __t1_tpi_write()
78 writel(F_TPIWR, adapter->regs + A_TPI_CSR); in __t1_tpi_write()
83 pr_alert("%s: TPI write to 0x%x failed\n", in __t1_tpi_write()
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/linux/net/caif/
H A Dcfcnfg.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) ST-Ericsson AB 2010
7 #define pr_fmt(fmt) KBUILD_MODNAME ":%s(): " fmt, __func__
83 this->mux = cfmuxl_create(); in cfcnfg_create()
84 if (!this->mux) in cfcnfg_create()
86 this->ctrl = cfctrl_create(); in cfcnfg_create()
87 if (!this->ctrl) in cfcnfg_create()
90 resp = cfctrl_get_respfuncs(this->ctrl); in cfcnfg_create()
91 resp->enum_rsp = cfctrl_enum_resp; in cfcnfg_create()
92 resp->linkerror_ind = cfctrl_resp_func; in cfcnfg_create()
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/linux/rust/kernel/net/
H A Dphy.rs1 // SPDX-License-Identifier: GPL-2.0
5 //! Network PHY device.
7 //! C headers: [`include/linux/phy.h`](srctree/include/linux/phy.h).
14 /// PHY state machine states.
16 /// Corresponds to the kernel's [`enum phy_state`].
18 /// Some of PHY drivers access to the state of PHY'
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/linux/drivers/phy/hisilicon/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # Phy drivers for Hisilicon platforms
6 tristate "hi6220 USB PHY support"
12 Enable this to support the HISILICON HI6220 USB PHY.
17 tristate "hi3660 USB PHY support"
22 Enable this to support the HISILICON HI3660 USB PHY.
27 tristate "hi3670 USB PHY support"
32 Enable this to support the HISILICON HI3670 USB PHY.
37 tristate "hi3670 PCIe PHY support"
42 Enable this to support the HiSilicon hi3670 PCIe PHY.
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/linux/drivers/net/wireless/mediatek/mt76/mt7615/
H A Ddebugfs.c1 // SPDX-License-Identifier: ISC
11 mt76_wr(dev, dev->mt76.debugfs_reg, val); in mt7615_reg_set()
23 *val = mt76_rr(dev, dev->mt76.debugfs_reg); in mt7615_reg_get()
57 ret = mt76_connac_mcu_chip_config(&dev->mt76); in mt7615_config()
74 mt7615_mac_set_scs(&dev->phy, val); in mt7615_scs_set()
87 *val = dev->phy.scs_en; in mt7615_scs_get()
99 struct mt76_connac_pm *pm = &dev->pm; in mt7615_pm_set()
105 if (!mt7615_firmware_offload(dev) || mt76_is_usb(&dev->mt76)) in mt7615_pm_set()
106 return -EOPNOTSUPP; in mt7615_pm_set()
108 mutex_lock(&dev->mt76.mutex); in mt7615_pm_set()
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/linux/Documentation/devicetree/bindings/net/
H A Dethernet-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - David S. Miller <davem@davemloft.net>
19 max-speed:
22 Specifies maximum speed in Mbit/s supported by the device.
24 nvmem-cells:
29 nvmem-cell-names:
30 const: mac-address
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/linux/drivers/phy/rockchip/
H A Dphy-rockchip-usb.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Rockchip usb PHY driver
5 * Copyright (C) 2014 Yunzhi Li <lyz@rock-chips.com>
10 #include <linux/clk-provider.h>
16 #include <linux/phy/phy.h>
73 struct phy *phy; member
79 static int rockchip_usb_phy_power(struct rockchip_usb_phy *phy, in rockchip_usb_phy_power() argument
84 return regmap_write(phy->base->reg_base, phy->reg_offset, val); in rockchip_usb_phy_power()
95 struct rockchip_usb_phy *phy = container_of(hw, in rockchip_usb_phy480m_disable() local
99 if (phy->vbus) in rockchip_usb_phy480m_disable()
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/linux/include/linux/phy/
H A Dulpi_phy.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 #include <linux/phy/phy.h>
5 * Helper that registers PHY for a ULPI device and adds a lookup for binding it
6 * and it's controller, which is always the parent.
8 static inline struct phy
11 struct phy *phy; in ulpi_phy_create() local
14 phy = phy_create(&ulpi->dev, NULL, ops); in ulpi_phy_create()
15 if (IS_ERR(phy)) in ulpi_phy_create()
16 return phy; in ulpi_phy_create()
18 ret = phy_create_lookup(phy, "usb2-phy", dev_name(ulpi->dev.parent)); in ulpi_phy_create()
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/linux/drivers/gpu/drm/omapdrm/dss/
H A Dhdmi_phy.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * HDMI PHY
5 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
19 void hdmi_phy_dump(struct hdmi_phy_data *phy, struct seq_file *s) in hdmi_phy_dump() argument
21 #define DUMPPHY(r) seq_printf(s, "%-35s %08x\n", #r,\ in hdmi_phy_dump()
22 hdmi_read_reg(phy->base, r)) in hdmi_phy_dump()
28 if (phy->features->bist_ctrl) in hdmi_phy_dump()
32 int hdmi_phy_parse_lanes(struct hdmi_phy_data *phy, const u32 *lanes) in hdmi_phy_parse_lanes() argument
44 return -EINVAL; in hdmi_phy_parse_lanes()
47 return -EINVAL; in hdmi_phy_parse_lanes()
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