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Searched full:pdma (Results 1 – 25 of 70) sorted by relevance

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/linux/include/linux/dma/
H A Dk3-psil.h31 * @PSIL_EP_PDMA_XY: XY mode PDMA
32 * @PSIL_EP_PDMA_MCAN: MCAN mode PDMA
33 * @PSIL_EP_PDMA_AASRC: AASRC mode PDMA
50 * @pdma_acc32: ACC32 must be enabled on the PDMA side
51 * @pdma_burst: BURST must be enabled on the PDMA side
70 /* PDMA properties, valid for PSIL_EP_PDMA_* */
/linux/arch/mips/boot/dts/ingenic/
H A Dx1000.dtsi274 dmas = <&pdma X1000_DMA_SSI0_RX 0xffffffff>,
275 <&pdma X1000_DMA_SSI0_TX 0xffffffff>;
323 pdma: dma-controller@13420000 { label
349 dmas = <&pdma X1000_DMA_MSC0_RX 0xffffffff>,
350 <&pdma X1000_DMA_MSC0_TX 0xffffffff>;
370 dmas = <&pdma X1000_DMA_MSC1_RX 0xffffffff>,
371 <&pdma X1000_DMA_MSC1_TX 0xffffffff>;
434 dmas = <&pdma X1000_DMA_I2S0_RX 0xffffffff>,
435 <&pdma X1000_DMA_I2S0_TX 0xffffffff>;
H A Dx1830.dtsi256 dmas = <&pdma X1830_DMA_SSI0_RX 0xffffffff>,
257 <&pdma X1830_DMA_SSI0_TX 0xffffffff>;
275 dmas = <&pdma X1830_DMA_SSI1_RX 0xffffffff>,
276 <&pdma X1830_DMA_SSI1_TX 0xffffffff>;
333 pdma: dma-controller@13420000 { label
359 dmas = <&pdma X1830_DMA_MSC0_RX 0xffffffff>,
360 <&pdma X1830_DMA_MSC0_TX 0xffffffff>;
380 dmas = <&pdma X1830_DMA_MSC1_RX 0xffffffff>,
381 <&pdma X1830_DMA_MSC1_TX 0xffffffff>;
/linux/arch/arm/boot/dts/intel/pxa/
H A Dpxa3xx.dtsi121 pdma: dma-controller@40000000 { label
122 compatible = "marvell,pdma-1.0";
150 dmas = <&pdma 97 3>;
188 dmas = <&pdma 21 3
189 &pdma 22 3>;
199 dmas = <&pdma 93 3
200 &pdma 94 3>;
210 dmas = <&pdma 46 3
211 &pdma 47 3>;
H A Dpxa27x.dtsi11 pdma: dma-controller@40000000 { label
12 compatible = "marvell,pdma-1.0";
107 dmas = <&pdma 68 0 /* Y channel */
108 &pdma 69 0 /* U channel */
109 &pdma 70 0>; /* V channel */
H A Dpxa300-raumfeld-common.dtsi53 dmas = <&pdma 13 3
54 &pdma 14 3>;
65 dmas = <&pdma 15 3
66 &pdma 16 3>;
H A Dpxa25x.dtsi37 pdma: dma-controller@40000000 { label
38 compatible = "marvell,pdma-1.0";
H A Dpxa2xx.dtsi142 dmas = <&pdma 21 3
143 &pdma 22 3>;
/linux/Documentation/devicetree/bindings/crypto/
H A Dartpec6-crypto.txt1 Axis crypto engine with PDMA interface.
7 - reg: Base address and size for the PDMA register area.
8 - interrupts: Interrupt handle for the PDMA interrupt line.
/linux/Documentation/devicetree/bindings/dma/
H A Dmarvell,mmp-dma.yaml18 - marvell,pdma-1.0
54 - marvell,pdma-1.0
67 compatible = "marvell,pdma-1.0";
/linux/drivers/video/fbdev/riva/
H A Dnvreg.h84 #define PDMA_Write(reg,value) DEVICE_WRITE(PDMA,reg,value)
85 #define PDMA_Read(reg) DEVICE_READ(PDMA,reg)
86 #define PDMA_Print(reg) DEVICE_PRINT(PDMA,reg)
87 #define PDMA_Def(mask,value) DEVICE_DEF(PDMA,mask,value)
88 #define PDMA_Val(mask,value) DEVICE_VALUE(PDMA,mask,value)
89 #define PDMA_Mask(mask) DEVICE_MASK(PDMA,mask)
/linux/drivers/dma/sf-pdma/
H A DKconfig2 tristate "Sifive PDMA controller driver"
7 Support the SiFive PDMA controller.
H A Dsf-pdma.h12 * - Chapter 12 "Platform DMA Engine (PDMA)" of
57 #define SF_PDMA_REG_BASE(ch) (pdma->membase + (PDMA_CHAN_OFFSET * (ch)))
96 struct sf_pdma *pdma; member
/linux/arch/arm/boot/dts/rockchip/
H A Drk3128.dtsi432 dmas = <&pdma 14>, <&pdma 15>;
444 dmas = <&pdma 13>;
468 dmas = <&pdma 10>;
484 dmas = <&pdma 11>;
500 dmas = <&pdma 12>;
515 dmas = <&pdma 0>, <&pdma 1>;
767 dmas = <&pdma 2>, <&pdma 3>;
783 dmas = <&pdma 4>, <&pdma 5>;
799 dmas = <&pdma 6>, <&pdma 7>;
839 dmas = <&pdma 8>, <&pdma 9>;
[all …]
H A Drv1108.dtsi105 dmas = <&pdma 6>, <&pdma 7>;
120 dmas = <&pdma 4>, <&pdma 5>;
135 dmas = <&pdma 2>, <&pdma 3>;
189 dmas = <&pdma 8>, <&pdma 9>;
240 pdma: dma-controller@102a0000 { label
/linux/Documentation/devicetree/bindings/net/
H A Dairoha,en7581-eth.yaml44 - description: PDMA irq
52 - const: pdma
120 reset-names = "fe", "pdma", "qdma", "xsi-mac",
/linux/drivers/net/ethernet/mediatek/
H A Dmtk_eth_soc.h100 /* PDMA HW LRO Alter Flow Timer Register */
170 /* PDMA HW LRO Control Registers */
191 /* PDMA Global Configuration Register */
195 /* PDMA Reset Index Register */
199 /* PDMA Delay Interrupt Register */
213 /* PDMA HW LRO Alter Flow Delta Register */
216 /* PDMA HW LRO IP Setting Registers */
221 /* PDMA HW LRO Ring Control Registers */
345 /* PDMA on MT7628 */
378 #define RX_DMA_L4_VALID_PDMA BIT(30) /* when PDMA is used */
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/engine/dma/
H A Dnv04.c34 struct nvkm_dma **pdma) in nv04_dma_new() argument
36 return nvkm_dma_new_(&nv04_dma, device, type, inst, pdma); in nv04_dma_new()
H A Dnv50.c34 struct nvkm_dma **pdma) in nv50_dma_new() argument
36 return nvkm_dma_new_(&nv50_dma, device, type, inst, pdma); in nv50_dma_new()
H A Dgf100.c34 struct nvkm_dma **pdma) in gf100_dma_new() argument
36 return nvkm_dma_new_(&gf100_dma, device, type, inst, pdma); in gf100_dma_new()
H A Dgf119.c34 struct nvkm_dma **pdma) in gf119_dma_new() argument
36 return nvkm_dma_new_(&gf119_dma, device, type, inst, pdma); in gf119_dma_new()
H A Dgv100.c32 struct nvkm_dma **pdma) in gv100_dma_new() argument
34 return nvkm_dma_new_(&gv100_dma, device, type, inst, pdma); in gv100_dma_new()
H A Dbase.c107 enum nvkm_subdev_type type, int inst, struct nvkm_dma **pdma) in nvkm_dma_new_() argument
111 if (!(dma = *pdma = kzalloc(sizeof(*dma), GFP_KERNEL))) in nvkm_dma_new_()
/linux/arch/mips/ralink/
H A Dill_acc.c29 "cpu", "dma", "ppe", "pdma rx", "pdma tx", "pci/e", "wmac", "usb",
/linux/drivers/net/wireless/mediatek/mt76/mt7615/
H A Ddma.c114 dev_err(mdev->dev, "PDMA engine busy\n"); in mt7615_wait_pdma_busy()
123 dev_err(mdev->dev, "PDMA engine tx busy\n"); in mt7615_wait_pdma_busy()
135 dev_err(mdev->dev, "PDMA engine busy\n"); in mt7615_wait_pdma_busy()

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