/linux/Documentation/devicetree/bindings/soc/mobileye/ |
H A D | mobileye,eyeq5-olb.yaml | 84 items: # PA0 - PA28, PB0 - PB22 94 enum: [PA0, PA1]
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/linux/Documentation/driver-api/media/drivers/ |
H A D | saa7134-devel.rst | 45 - nc MDT2005 PA0 pin 17 strap low
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/linux/arch/arm64/boot/dts/qcom/ |
H A D | sm6125-xiaomi-laurel-sprout.dts | 86 rf-pa0-thermal { 171 rf-pa0-therm@0 {
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H A D | sm6125-sony-xperia-seine-pdx201.dts | 92 rf-pa0-thermal { 259 rf-pa0-therm@0 {
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H A D | sm7225-fairphone-fp4.dts | 135 pa0-thermal {
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/linux/drivers/pinctrl/ |
H A D | pinctrl-eyeq5.c | 78 PINCTRL_PIN(0, "PA0"), /* A0_TIMER0_CK */ 138 "PA0", "PA1", "PA2", "PA3", "PA4", "PA5", "PA6", "PA7", 150 static const char * const timer0_groups[] = { "PA0", "PA1" };
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/linux/arch/mips/boot/dts/mobileye/ |
H A D | eyeq5-pins.dtsi | 11 pins = "PA0", "PA1";
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/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | atmel,at91rm9200-pinctrl.yaml | 72 PA0 MCDB0
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H A D | ingenic,pinctrl.yaml | 19 pin within that GPIO port. For example PA0 is the first pin in GPIO port A,
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H A D | st,stm32-pinctrl.yaml | 154 - line: The line offset within the port (PA0 = 0, PA1 = 1, ..., PA15 = 15)
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/linux/arch/arm/boot/dts/allwinner/ |
H A D | sun5i-a10s.dtsi | 141 pins = "PA0", "PA1", "PA2",
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H A D | sun7i-a20.dtsi | 844 pins = "PA0", "PA1", "PA2", 864 pins = "PA0", "PA1", "PA2", 874 pins = "PA0", "PA1", "PA2", 1093 pins = "PA0", "PA1";
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H A D | sun6i-a31.dtsi | 625 pins = "PA0", "PA1", "PA2", "PA3", 641 pins = "PA0", "PA1", "PA2", "PA3", 650 pins = "PA0", "PA1", "PA2", "PA3",
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H A D | sun4i-a10-inet9f-rev03.dts | 111 gpios = <&pio 0 0 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA0 */
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H A D | sunxi-h3-h5.dtsi | 501 pins = "PA0", "PA1";
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/linux/drivers/mtd/nand/raw/ |
H A D | rockchip-nand-controller.c | 550 * PA0 PA1 PA2 PA3 | BBM OOB1 OOB2 OOB3 | ... in rk_nfc_write_page_raw() 561 * BBM OOB1 OOB2 OOB3 |......| PA0 PA1 PA2 PA3 in rk_nfc_write_page_raw() 620 * PA0 PA1 PA2 PA3 | BBM OOB1 OOB2 OOB3 | ... in rk_nfc_write_page_hwecc() 632 * BBM OOB1 OOB2 OOB3 |......| PA0 PA1 PA2 PA3 in rk_nfc_write_page_hwecc()
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/linux/arch/arm/boot/dts/microchip/ |
H A D | at91sam9260.dtsi | 370 AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA0 periph B with pullup */ 400 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */
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H A D | at91sam9263.dtsi | 294 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA0 periph A with pullup */ 386 <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA0 periph B SPI0_MISO pin */
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H A D | at91rm9200.dtsi | 546 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */
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H A D | at91sam9n12.dtsi | 296 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA0 periph A */
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/linux/arch/arm64/boot/dts/allwinner/ |
H A D | sun50i-h700-anbernic-rg35xx-2024.dts | 39 gpios = <&pio 0 0 GPIO_ACTIVE_LOW>; /* PA0 */
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/linux/arch/m68k/include/asm/ |
H A D | MC68EZ328.h | 1162 #define DRAMMC_COL10 0x0080 /* Col address bit for MD10 PA11/PA0 */ 1163 #define DRAMMC_COL9 0x0040 /* Col address bit for MD9 PA10/PA0 */ 1164 #define DRAMMC_COL8 0x0020 /* Col address bit for MD8 PA9/PA0 */
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H A D | MC68VZ328.h | 1257 #define DRAMMC_COL10 0x0080 /* Col address bit for MD10 PA11/PA0 */ 1258 #define DRAMMC_COL9 0x0040 /* Col address bit for MD9 PA10/PA0 */ 1259 #define DRAMMC_COL8 0x0020 /* Col address bit for MD8 PA9/PA0 */
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/linux/drivers/pinctrl/renesas/ |
H A D | pfc-shx3.c | 293 PINMUX_GPIO(PA0),
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H A D | pfc-sh7786.c | 415 PINMUX_GPIO(PA0),
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