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/linux/include/soc/mscc/
H A Docelot.h34 * ocelot->num_phys_ports - 1, or a multicast set: the PGIDs from
35 * ocelot->num_phys_ports to 63. By convention, a unicast PGID corresponds to
73 #define for_each_unicast_dest_pgid(ocelot, pgid) \ argument
75 (pgid) < (ocelot)->num_phys_ports; \
78 #define for_each_nonreserved_multicast_dest_pgid(ocelot, pgid) \ argument
79 for ((pgid) = (ocelot)->num_phys_ports + 1; \
83 #define for_each_aggr_pgid(ocelot, pgid) \ argument
648 struct ocelot;
652 struct net_device *(*port_to_netdev)(struct ocelot *ocelot, int port);
654 int (*reset)(struct ocelot *ocelot);
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H A Docelot_vcap.h2 * Microsemi Ocelot Switch driver
9 #include <soc/mscc/ocelot.h>
14 #define OCELOT_VCAP_ES0_TAG_8021Q_RXVLAN(ocelot, port, upstream) ((upstream) << 16 | (port)) argument
15 #define OCELOT_VCAP_IS1_TAG_8021Q_TXVLAN(ocelot, port) (port) argument
16 #define OCELOT_VCAP_IS1_VLAN_RECLASSIFY(ocelot, port) ((ocelot)->num_phys_ports + (port)) argument
17 #define OCELOT_VCAP_IS2_TAG_8021Q_TXVLAN(ocelot, port) (port) argument
18 #define OCELOT_VCAP_IS2_MRP_REDIRECT(ocelot, port) ((ocelot)->num_phys_ports + (port)) argument
19 #define OCELOT_VCAP_IS2_MRP_TRAP(ocelot) ((ocelot)->num_phys_ports * 2) argument
20 #define OCELOT_VCAP_IS2_L2_PTP_TRAP(ocelot) ((ocelot)->num_phys_ports * 2 + 1) argument
21 #define OCELOT_VCAP_IS2_IPV4_GEN_PTP_TRAP(ocelot) ((ocelot)->num_phys_ports * 2 + 2) argument
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H A Docelot_ptp.h3 * Microsemi Ocelot Switch driver
14 #include <soc/mscc/ocelot.h>
57 int ocelot_init_timestamp(struct ocelot *ocelot,
59 int ocelot_deinit_timestamp(struct ocelot *ocelot);
/linux/drivers/net/ethernet/mscc/
H A Docelot.c3 * Microsemi Ocelot Switch driver
7 #include <linux/dsa/ocelot.h>
14 #include "ocelot.h"
30 /* Caller must hold &ocelot->mact_lock */
31 static inline u32 ocelot_mact_read_macaccess(struct ocelot *ocelot) in ocelot_mact_read_macaccess() argument
33 return ocelot_read(ocelot, ANA_TABLES_MACACCESS); in ocelot_mact_read_macaccess()
36 /* Caller must hold &ocelot->mact_lock */
37 static inline int ocelot_mact_wait_for_completion(struct ocelot *ocelot) in ocelot_mact_wait_for_completion() argument
42 ocelot, val, in ocelot_mact_wait_for_completion()
48 /* Caller must hold &ocelot->mact_lock */
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H A Docelot_vsc7514.c3 * Microsemi Ocelot Switch driver
7 #include <linux/dsa/ocelot.h>
20 #include <soc/mscc/ocelot.h>
24 #include "ocelot.h"
29 static int ocelot_chip_init(struct ocelot *ocelot, const struct ocelot_ops *ops) in ocelot_chip_init() argument
33 ocelot->map = vsc7514_regmap; in ocelot_chip_init()
34 ocelot->num_mact_rows = 1024; in ocelot_chip_init()
35 ocelot->ops = ops; in ocelot_chip_init()
37 ret = ocelot_regfields_init(ocelot, vsc7514_regfields); in ocelot_chip_init()
41 ocelot_pll5_init(ocelot); in ocelot_chip_init()
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H A Docelot_ptp.c2 /* Microsemi Ocelot PTP clock driver
9 #include <linux/dsa/ocelot.h>
14 #include <soc/mscc/ocelot.h>
15 #include "ocelot.h"
21 struct ocelot *ocelot = container_of(ptp, struct ocelot, ptp_info); in ocelot_ptp_gettime64() local
27 spin_lock_irqsave(&ocelot->ptp_clock_lock, flags); in ocelot_ptp_gettime64()
29 val = ocelot_read_rix(ocelot, PTP_PIN_CFG, TOD_ACC_PIN); in ocelot_ptp_gettime64()
32 ocelot_write_rix(ocelot, val, PTP_PIN_CFG, TOD_ACC_PIN); in ocelot_ptp_gettime64()
34 s = ocelot_read_rix(ocelot, PTP_PIN_TOD_SEC_MSB, TOD_ACC_PIN) & 0xffff; in ocelot_ptp_gettime64()
36 s += ocelot_read_rix(ocelot, PTP_PIN_TOD_SEC_LSB, TOD_ACC_PIN); in ocelot_ptp_gettime64()
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H A Docelot_fdma.c13 #include <linux/dsa/ocelot.h>
22 static void ocelot_fdma_writel(struct ocelot *ocelot, u32 reg, u32 data) in ocelot_fdma_writel() argument
24 regmap_write(ocelot->targets[FDMA], reg, data); in ocelot_fdma_writel()
27 static u32 ocelot_fdma_readl(struct ocelot *ocelot, u32 reg) in ocelot_fdma_readl() argument
31 regmap_read(ocelot->targets[FDMA], reg, &retval); in ocelot_fdma_readl()
85 static void ocelot_fdma_activate_chan(struct ocelot *ocelot, dma_addr_t dma, in ocelot_fdma_activate_chan() argument
88 ocelot_fdma_writel(ocelot, MSCC_FDMA_DCB_LLP(chan), dma); in ocelot_fdma_activate_chan()
93 ocelot_fdma_writel(ocelot, MSCC_FDMA_CH_ACTIVATE, BIT(chan)); in ocelot_fdma_activate_chan()
96 static u32 ocelot_fdma_read_ch_safe(struct ocelot *ocelot) in ocelot_fdma_read_ch_safe() argument
98 return ocelot_fdma_readl(ocelot, MSCC_FDMA_CH_SAFE); in ocelot_fdma_read_ch_safe()
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H A Docelot_mrp.c2 /* Microsemi Ocelot Switch driver
12 #include "ocelot.h"
18 static int ocelot_mrp_find_partner_port(struct ocelot *ocelot, in ocelot_mrp_find_partner_port() argument
23 for (i = 0; i < ocelot->num_phys_ports; ++i) { in ocelot_mrp_find_partner_port()
24 struct ocelot_port *ocelot_port = ocelot->ports[i]; in ocelot_mrp_find_partner_port()
36 static int ocelot_mrp_del_vcap(struct ocelot *ocelot, int id) in ocelot_mrp_del_vcap() argument
41 block_vcap_is2 = &ocelot->block[VCAP_IS2]; in ocelot_mrp_del_vcap()
47 return ocelot_vcap_filter_del(ocelot, filter); in ocelot_mrp_del_vcap()
50 static int ocelot_mrp_redirect_add_vcap(struct ocelot *ocelot, int src_port, in ocelot_mrp_redirect_add_vcap() argument
63 filter->id.cookie = OCELOT_VCAP_IS2_MRP_REDIRECT(ocelot, src_port); in ocelot_mrp_redirect_add_vcap()
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H A Docelot_io.c3 * Microsemi Ocelot Switch driver
11 #include "ocelot.h"
13 int __ocelot_bulk_read_ix(struct ocelot *ocelot, enum ocelot_reg reg, in __ocelot_bulk_read_ix() argument
19 ocelot_reg_to_target_addr(ocelot, reg, &target, &addr); in __ocelot_bulk_read_ix()
22 return regmap_bulk_read(ocelot->targets[target], addr + offset, in __ocelot_bulk_read_ix()
27 u32 __ocelot_read_ix(struct ocelot *ocelot, enum ocelot_reg reg, u32 offset) in __ocelot_read_ix() argument
32 ocelot_reg_to_target_addr(ocelot, reg, &target, &addr); in __ocelot_read_ix()
35 regmap_read(ocelot->targets[target], addr + offset, &val); in __ocelot_read_ix()
40 void __ocelot_write_ix(struct ocelot *ocelot, u32 val, enum ocelot_reg reg, in __ocelot_write_ix() argument
46 ocelot_reg_to_target_addr(ocelot, reg, &target, &addr); in __ocelot_write_ix()
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H A Docelot_mm.c9 #include <soc/mscc/ocelot.h>
13 #include "ocelot.h"
52 void ocelot_port_update_active_preemptible_tcs(struct ocelot *ocelot, int port) in ocelot_port_update_active_preemptible_tcs() argument
54 struct ocelot_port *ocelot_port = ocelot->ports[port]; in ocelot_port_update_active_preemptible_tcs()
55 struct ocelot_mm_state *mm = &ocelot->mm[port]; in ocelot_port_update_active_preemptible_tcs()
58 lockdep_assert_held(&ocelot->fwd_domain_lock); in ocelot_port_update_active_preemptible_tcs()
76 ocelot->ops->tas_guard_bands_update(ocelot, port); in ocelot_port_update_active_preemptible_tcs()
78 dev_dbg(ocelot->dev, in ocelot_port_update_active_preemptible_tcs()
85 ocelot_rmw_rix(ocelot, QSYS_PREEMPTION_CFG_P_QUEUES(val), in ocelot_port_update_active_preemptible_tcs()
90 void ocelot_port_change_fp(struct ocelot *ocelot, int port, in ocelot_port_change_fp() argument
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H A Docelot_devlink.c5 #include "ocelot.h"
221 static u32 ocelot_wm_read(struct ocelot *ocelot, int index) in ocelot_wm_read() argument
223 int wm = ocelot_read_gix(ocelot, QSYS_RES_CFG, index); in ocelot_wm_read()
225 return ocelot->ops->wm_dec(wm); in ocelot_wm_read()
228 static void ocelot_wm_write(struct ocelot *ocelot, int index, u32 val) in ocelot_wm_write() argument
230 u32 wm = ocelot->ops->wm_enc(val); in ocelot_wm_write()
232 ocelot_write_gix(ocelot, wm, QSYS_RES_CFG, index); in ocelot_wm_write()
235 static void ocelot_wm_status(struct ocelot *ocelot, int index, u32 *inuse, in ocelot_wm_status() argument
238 int res_stat = ocelot_read_gix(ocelot, QSYS_RES_STAT, index); in ocelot_wm_status()
240 return ocelot->ops->wm_stat(res_stat, inuse, maxuse); in ocelot_wm_status()
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H A Docelot.h3 * Microsemi Ocelot Switch driver
25 #include <soc/mscc/ocelot.h>
54 /* A (PGID) port mask structure, encoding the 2^ocelot->num_phys_ports
77 static inline void ocelot_reg_to_target_addr(struct ocelot *ocelot, in ocelot_reg_to_target_addr() argument
83 *addr = ocelot->map[*target][reg & REG_MASK]; in ocelot_reg_to_target_addr()
86 int ocelot_bridge_num_find(struct ocelot *ocelot,
89 int ocelot_mact_learn(struct ocelot *ocelot, int port,
92 int ocelot_mact_forget(struct ocelot *ocelot,
94 struct net_device *ocelot_port_to_netdev(struct ocelot *ocelot, int port);
97 int ocelot_probe_port(struct ocelot *ocelot, int port, struct regmap *target,
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H A Docelot_vcap.c2 /* Microsemi Ocelot Switch driver
49 static u32 vcap_read_update_ctrl(struct ocelot *ocelot, in vcap_read_update_ctrl() argument
52 return ocelot_target_read(ocelot, vcap->target, VCAP_CORE_UPDATE_CTRL); in vcap_read_update_ctrl()
55 static void vcap_cmd(struct ocelot *ocelot, const struct vcap_props *vcap, in vcap_cmd() argument
74 ocelot_target_write(ocelot, vcap->target, value, VCAP_CORE_UPDATE_CTRL); in vcap_cmd()
78 10, 100000, false, ocelot, vcap); in vcap_cmd()
82 static void vcap_row_cmd(struct ocelot *ocelot, const struct vcap_props *vcap, in vcap_row_cmd() argument
85 vcap_cmd(ocelot, vcap, vcap->entry_count - row - 1, cmd, sel); in vcap_row_cmd()
88 static void vcap_entry2cache(struct ocelot *ocelot, in vcap_entry2cache() argument
97 ocelot_target_write_rix(ocelot, vcap->target, data->entry[i], in vcap_entry2cache()
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H A Docelot_police.c2 /* Microsemi Ocelot Switch driver
7 #include <soc/mscc/ocelot.h>
21 #define POL_ORDER 0x1d3 /* Ocelot policer order: Serial (QoS -> Port -> VCAP) */
23 int qos_policer_conf_set(struct ocelot *ocelot, u32 pol_ix, in qos_policer_conf_set() argument
105 dev_err(ocelot->dev, in qos_policer_conf_set()
112 dev_err(ocelot->dev, in qos_policer_conf_set()
119 dev_err(ocelot->dev, in qos_policer_conf_set()
126 dev_err(ocelot->dev, in qos_policer_conf_set()
138 ocelot_write_gix(ocelot, value, ANA_POL_MODE_CFG, pol_ix); in qos_policer_conf_set()
140 ocelot_write_gix(ocelot, in qos_policer_conf_set()
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H A Docelot_fdma.h10 #include "ocelot.h"
144 * @ocelot: Back-pointer to ocelot struct
154 struct ocelot *ocelot; member
157 void ocelot_fdma_init(struct platform_device *pdev, struct ocelot *ocelot);
158 void ocelot_fdma_start(struct ocelot *ocelot);
159 void ocelot_fdma_deinit(struct ocelot *ocelot);
160 int ocelot_fdma_inject_frame(struct ocelot *fdma, int port, u32 rew_op,
162 void ocelot_fdma_netdev_init(struct ocelot *ocelot, struct net_device *dev);
163 void ocelot_fdma_netdev_deinit(struct ocelot *ocelot,
H A Docelot_vcap.h2 /* Microsemi Ocelot Switch driver
9 #include "ocelot.h"
15 int ocelot_vcap_filter_stats_update(struct ocelot *ocelot,
18 int ocelot_vcap_init(struct ocelot *ocelot);
/linux/drivers/net/dsa/ocelot/
H A Dfelix_vsc9959.c13 #include <soc/mscc/ocelot.h>
14 #include <linux/dsa/ocelot.h>
879 static int vsc9959_gcb_soft_rst_status(struct ocelot *ocelot) in vsc9959_gcb_soft_rst_status() argument
883 ocelot_field_read(ocelot, GCB_SOFT_RST_SWC_RST, &val); in vsc9959_gcb_soft_rst_status()
888 static int vsc9959_sys_ram_init_status(struct ocelot *ocelot) in vsc9959_sys_ram_init_status() argument
890 return ocelot_read(ocelot, SYS_RAM_INIT); in vsc9959_sys_ram_init_status()
896 static int vsc9959_reset(struct ocelot *ocelot) in vsc9959_reset() argument
901 ocelot_field_write(ocelot, GCB_SOFT_RST_SWC_RST, 1); in vsc9959_reset()
903 err = readx_poll_timeout(vsc9959_gcb_soft_rst_status, ocelot, val, !val, in vsc9959_reset()
906 dev_err(ocelot->dev, "timeout: switch core reset\n"); in vsc9959_reset()
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H A Dfelix.h7 #define ocelot_to_felix(o) container_of((o), struct felix, ocelot)
43 /* Some Ocelot switches are integrated into the SoC without the
55 int (*mdio_bus_alloc)(struct ocelot *ocelot);
56 void (*mdio_bus_free)(struct ocelot *ocelot);
59 void (*port_sched_speed_set)(struct ocelot *ocelot, int port,
61 void (*phylink_mac_config)(struct ocelot *ocelot, int port,
64 int (*configure_serdes)(struct ocelot *ocelot, int port,
66 int (*request_irq)(struct ocelot *ocelot);
70 * protocol (like the NPI port, for "ocelot" or "seville", or the VCAP TCAMs,
71 * for "ocelot-8021q").
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H A DKconfig6 register-compatible with Ocelot and that perform I/O to their host
12 tristate "Ocelot External Ethernet switch support"
26 The Ocelot switch family is a set of multi-port networking chips. All
33 tristate "Ocelot / Felix Ethernet switch support"
51 tristate "Ocelot / Seville Ethernet switch support"
/linux/drivers/mfd/
H A Docelot-core.c3 * Core driver for the Ocelot chip family.
22 #include <linux/mfd/ocelot.h>
27 #include <soc/mscc/ocelot.h>
29 #include "ocelot.h"
164 .name = "ocelot-pinctrl",
165 .of_compatible = "mscc,ocelot-pinctrl",
169 .name = "ocelot-sgpio",
170 .of_compatible = "mscc,ocelot-sgpio",
174 .name = "ocelot-miim0",
175 .of_compatible = "mscc,ocelot-miim",
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/linux/Documentation/devicetree/bindings/mfd/
H A Dmscc,ocelot.yaml4 $id: http://devicetree.org/schemas/mfd/mscc,ocelot.yaml#
7 title: Ocelot Externally-Controlled Ethernet Switch
13 The Ocelot ethernet switch family contains chips that have an internal CPU
42 $ref: /schemas/pinctrl/mscc,ocelot-pinctrl.yaml
50 - mscc,ocelot-sgpio
58 - mscc,ocelot-miim
79 ocelot_clock: ocelot-clock {
97 compatible = "mscc,ocelot-miim";
108 compatible = "mscc,ocelot-miim";
121 compatible = "mscc,ocelot-pinctrl";
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/linux/arch/mips/boot/dts/mscc/
H A Docelot.dtsi7 compatible = "mscc,ocelot";
55 compatible = "mscc,ocelot-cpu-syscon", "syscon";
60 compatible = "mscc,ocelot-icpu-intr";
82 compatible = "mscc,ocelot-i2c", "snps,designware-i2c";
108 compatible = "mscc,ocelot-spi", "snps,dw-apb-ssi";
200 compatible = "mscc,ocelot-chip-reset";
205 compatible = "mscc,ocelot-pinctrl";
239 compatible = "mscc,ocelot-miim";
261 compatible = "mscc,ocelot-miim";
270 compatible = "mscc,ocelot-hsio", "syscon", "simple-mfd";
/linux/Documentation/devicetree/bindings/mips/
H A Dmscc.txt7 - compatible: "mscc,ocelot", "mscc,luton", "mscc,serval" or "mscc,jr2"
19 - compatible: Should be "mscc,ocelot-chip-regs", "simple-mfd", "syscon"
24 compatible = "mscc,ocelot-chip-regs", "simple-mfd", "syscon";
35 - compatible: Should be "mscc,ocelot-hsio", "syscon", "simple-mfd"
40 compatible = "mscc,ocelot-hsio", "syscon", "simple-mfd";
/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dmscc,ocelot-icpu-intr.yaml4 $id: http://devicetree.org/schemas/interrupt-controller/mscc,ocelot-icpu-intr.yaml#
7 title: Microsemi Ocelot SoC ICPU Interrupt Controller
16 the Microsemi Ocelot interrupt controller that is part of the
26 - mscc,ocelot-icpu-intr
56 compatible = "mscc,ocelot-icpu-intr";
/linux/Documentation/devicetree/bindings/phy/
H A Dmscc,vsc7514-serdes.yaml7 title: Microsemi Ocelot SerDes muxing
14 On Microsemi Ocelot, there is a handful of registers in HSIO address
29 This is a child of the HSIO syscon ("mscc,ocelot-hsio", see
30 Documentation/devicetree/bindings/mips/mscc.txt) on the Microsemi Ocelot.
42 dt-bindings/phy/phy-ocelot-serdes.h

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