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/linux/drivers/irqchip/
H A Dirq-mvebu-odmi.c11 #define pr_fmt(fmt) "GIC-ODMI: " fmt
55 struct odmi_data *odmi; in odmi_compose_msi_msg() local
62 odmi = &odmis[d->hwirq >> NODMIS_SHIFT]; in odmi_compose_msi_msg()
65 addr = odmi->res.start + GICP_ODMIN_SET; in odmi_compose_msi_msg()
73 .name = "ODMI",
84 struct odmi_data *odmi = NULL; in odmi_irq_domain_alloc() local
100 odmi = &odmis[hwirq >> NODMIS_SHIFT]; in odmi_irq_domain_alloc()
106 fwspec.param[1] = odmi->spi_base - 32 + odmin; in odmi_irq_domain_alloc()
163 .prefix = "ODMI-",
178 if (of_property_read_u32(node, "marvell,odmi-frames", &odmis_count)) in mvebu_odmi_init()
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/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dmarvell,odmi-controller.yaml4 $id: http://devicetree.org/schemas/interrupt-controller/marvell,odmi-controller.yaml#
7 title: Marvell ODMI controller
13 Some Marvell SoCs have an On-Die Message Interrupt (ODMI) controller which can
18 const: marvell,odmi-controller
21 description: List of register definitions, one for each ODMI frame.
25 marvell,odmi-frames:
26 description: Number of ODMI frames available. Each frame provides a number of events.
31 List of GIC base SPI interrupts, one for each ODMI frame. Those SPI
41 - marvell,odmi-frames
49 compatible = "marvell,odmi-controller";
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/linux/arch/arm64/boot/dts/marvell/
H A Darmada-ap80x.dtsi140 odmi: odmi@300000 { label
141 compatible = "marvell,odmi-controller";
143 marvell,odmi-frames = <4>;