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Searched full:nvenc (Results 1 – 19 of 19) sorted by relevance

/linux/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/
H A Dbase.c29 struct nvkm_nvenc *nvenc = nvkm_nvenc(engine); in nvkm_nvenc_dtor() local
30 nvkm_falcon_dtor(&nvenc->falcon); in nvkm_nvenc_dtor()
31 return nvenc; in nvkm_nvenc_dtor()
44 struct nvkm_nvenc *nvenc; in nvkm_nvenc_new_() local
47 if (!(nvenc = *pnvenc = kzalloc(sizeof(*nvenc), GFP_KERNEL))) in nvkm_nvenc_new_()
51 &nvenc->engine); in nvkm_nvenc_new_()
55 fwif = nvkm_firmware_load(&nvenc->engine.subdev, fwif, "Nvenc", nvenc); in nvkm_nvenc_new_()
59 nvenc->func = fwif->func; in nvkm_nvenc_new_()
61 return nvkm_falcon_ctor(nvenc->func->flcn, &nvenc->engine.subdev, in nvkm_nvenc_new_()
62 nvenc->engine.subdev.name, 0, &nvenc->falcon); in nvkm_nvenc_new_()
H A DKbuild2 nvkm-y += nvkm/engine/nvenc/base.o
3 nvkm-y += nvkm/engine/nvenc/gm107.o
4 nvkm-y += nvkm/engine/nvenc/tu102.o
5 nvkm-y += nvkm/engine/nvenc/ga102.o
6 nvkm-y += nvkm/engine/nvenc/ad102.o
8 nvkm-y += nvkm/engine/nvenc/r535.o
H A Dr535.c78 struct nvkm_nvenc *nvenc = nvkm_nvenc(engine); in r535_nvenc_dtor() local
80 kfree(nvenc->engine.func); in r535_nvenc_dtor()
81 return nvenc; in r535_nvenc_dtor()
H A Dpriv.h4 #include <engine/nvenc.h>
H A Dgm107.c35 gm107_nvenc_nofw(struct nvkm_nvenc *nvenc, int ver, in gm107_nvenc_nofw() argument
/linux/Documentation/devicetree/bindings/gpu/host1x/
H A Dnvidia,tegra210-nvenc.yaml4 $id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra210-nvenc.yaml#
7 title: NVIDIA Tegra NVENC
10 NVENC is the hardware video encoder present on NVIDIA Tegra210
20 pattern: "^nvenc@[0-9a-f]*$"
24 - nvidia,tegra210-nvenc
25 - nvidia,tegra186-nvenc
26 - nvidia,tegra194-nvenc
36 - const: nvenc
43 - const: nvenc
83 - nvidia,tegra210-nvenc
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/engine/device/
H A Dbase.c1908 .nvenc = { 0x00000001, gm107_nvenc_new },
1976 .nvenc = { 0x00000003, gm107_nvenc_new },
2011 .nvenc = { 0x00000003, gm107_nvenc_new },
2046 .nvenc = { 0x00000001, gm107_nvenc_new },
2104 .nvenc = { 0x00000007, gm107_nvenc_new },
2137 .nvenc = { 0x00000003, gm107_nvenc_new },
2171 .nvenc = { 0x00000003, gm107_nvenc_new },
2205 .nvenc = { 0x00000001, gm107_nvenc_new },
2239 .nvenc = { 0x00000003, gm107_nvenc_new },
2332 .nvenc = { 0x00000007, gm107_nvenc_new },
[all …]
H A Dpriv.h44 #include <engine/nvenc.h>
/linux/drivers/gpu/drm/nouveau/nvkm/engine/
H A DKbuild18 include $(src)/nvkm/engine/nvenc/Kbuild
/linux/drivers/gpu/drm/nouveau/include/nvkm/core/
H A Dlayout.h46 NVKM_LAYOUT_INST(NVKM_ENGINE_NVENC , struct nvkm_nvenc , nvenc, 3)
/linux/drivers/gpu/host1x/
H A Dcontext.c50 * Due to an issue with T194 NVENC, only 38 bits can be used. in host1x_memory_context_list_init()
/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra194.dtsi2086 nvenc@154c0000 {
2087 compatible = "nvidia,tegra194-nvenc";
2090 clock-names = "nvenc";
2092 reset-names = "nvenc";
2241 nvenc@15a80000 {
2242 compatible = "nvidia,tegra194-nvenc";
2245 clock-names = "nvenc";
2247 reset-names = "nvenc";
H A Dtegra186.dtsi1728 nvenc@154c0000 {
1729 compatible = "nvidia,tegra186-nvenc";
1732 clock-names = "nvenc";
1734 reset-names = "nvenc";
H A Dtegra210.dtsi283 nvenc@544c0000 {
284 compatible = "nvidia,tegra210-nvenc";
/linux/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
H A Dbase.c212 CASE(NVENC ); in nvkm_fifo_info()
/linux/drivers/memory/tegra/
H A Dtegra210.c1174 { .name = "nvenc", .swgroup = TEGRA_SWGROUP_NVENC, .reg = 0x264 },
1252 TEGRA210_MC_RESET(NVENC, 0x200, 0x204, 11),
/linux/include/dt-bindings/clock/
H A Dtegra186-clock.h878 /** @brief NAFLL clock source for NVENC */
H A Dtegra234-clock.h396 /** @brief NAFLL clock source for NVENC */
/linux/drivers/clk/tegra/
H A Dclk-tegra-periph.c756 MUX8("nvenc", mux_pllc2_c_c3_pllp_plla1_clkm, CLK_SOURCE_NVENC, 219, 0, tegra_clk_nvenc),