| /linux/Documentation/arch/arm/ |
| H A D | kernel_mode_neon.rst | 2 Kernel mode NEON 7 * Use only NEON instructions, or VFP instructions that don't rely on support 9 * Isolate your NEON code in a separate compilation unit, and compile it with 10 '-march=armv7-a -mfpu=neon -mfloat-abi=softfp' 12 NEON code 13 * Don't sleep in your NEON code, and be aware that it will be executed with 19 It is possible to use NEON instructions (and in some cases, VFP instructions) in 20 code that runs in kernel mode. However, for performance reasons, the NEON/VFP 24 may call schedule()], as NEON or VFP instructions will be executed in a 30 The NEON/VFP register file is managed using lazy preserve (on UP systems) and [all …]
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| /linux/arch/arm64/crypto/ |
| H A D | Makefile | 11 obj-$(CONFIG_CRYPTO_SM3_NEON) += sm3-neon.o 12 sm3-neon-y := sm3-neon-glue.o sm3-neon-core.o 29 obj-$(CONFIG_CRYPTO_SM4_ARM64_NEON_BLK) += sm4-neon.o 30 sm4-neon-y := sm4-neon-glue.o sm4-neon-core.o 47 obj-$(CONFIG_CRYPTO_AES_ARM64_NEON_BLK) += aes-neon-blk.o 48 aes-neon-blk-y := aes-glue-neon.o aes-neon.o 50 obj-$(CONFIG_CRYPTO_NHPOLY1305_NEON) += nhpoly1305-neon.o 51 nhpoly1305-neon-y := nh-neon-core.o nhpoly1305-neon-glue.o 56 obj-$(CONFIG_CRYPTO_AES_ARM64_BS) += aes-neon-bs.o 57 aes-neon-bs-y := aes-neonbs-core.o aes-neonbs-glue.o
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| H A D | nhpoly1305-neon-glue.c | 4 * (ARM64 NEON accelerated version) 9 #include <asm/neon.h> 47 .base.cra_driver_name = "nhpoly1305-neon", 76 MODULE_DESCRIPTION("NHPoly1305 ε-almost-∆-universal hash function (NEON-accelerated)"); 80 MODULE_ALIAS_CRYPTO("nhpoly1305-neon");
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| H A D | sm4-neon-glue.c | 3 * SM4 Cipher Algorithm, using ARMv8 NEON 15 #include <asm/neon.h> 192 .cra_driver_name = "ecb-sm4-neon", 206 .cra_driver_name = "cbc-sm4-neon", 221 .cra_driver_name = "ctr-sm4-neon", 250 MODULE_DESCRIPTION("SM4 ECB/CBC/CTR using ARMv8 NEON"); 251 MODULE_ALIAS_CRYPTO("sm4-neon");
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| /linux/arch/arm/crypto/ |
| H A D | Kconfig | 6 tristate "Hash functions: GHASH (PMULL/NEON/ARMv8 Crypto Extensions)" 18 - NEON (Advanced SIMD) extensions 24 uses the vmull.p8 instruction that is part of the basic NEON ISA. 27 tristate "Hash functions: NHPoly1305 (NEON)" 34 - NEON (Advanced SIMD) extensions 37 tristate "Hash functions: BLAKE2b (NEON)" 44 - NEON (Advanced SIMD) extensions 46 BLAKE2b digest algorithm optimized with ARM NEON instructions. 47 On ARM processors that have NEON support but not the ARMv8 63 blocks, the NEON bit-sliced implementation is usually faster. [all …]
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| H A D | Makefile | 8 obj-$(CONFIG_CRYPTO_BLAKE2B_NEON) += blake2b-neon.o 9 obj-$(CONFIG_CRYPTO_NHPOLY1305_NEON) += nhpoly1305-neon.o 16 blake2b-neon-y := blake2b-neon-core.o blake2b-neon-glue.o 19 nhpoly1305-neon-y := nh-neon-core.o nhpoly1305-neon-glue.o
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| H A D | nhpoly1305-neon-glue.c | 4 * (NEON accelerated version) 9 #include <asm/neon.h> 47 .base.cra_driver_name = "nhpoly1305-neon", 76 MODULE_DESCRIPTION("NHPoly1305 ε-almost-∆-universal hash function (NEON-accelerated)"); 80 MODULE_ALIAS_CRYPTO("nhpoly1305-neon");
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| H A D | blake2b-neon-core.S | 3 * BLAKE2b digest algorithm, NEON accelerated 13 .fpu neon 28 // NEON registers which contain the message words of the current block. 50 // rotation amounts with NEON. (On Cortex-A53 it's the same speed as 64 // NEON registers q0-q7. The message block is in q8..q15 (M_0-M_15). The stack 274 // 'v'. Fortunately, there are exactly enough NEON registers to fit the
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| H A D | nh-neon-core.S | 3 * NH - ε-almost-universal hash function, NEON accelerated version 13 .fpu neon
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| /linux/arch/arm/include/asm/ |
| H A D | neon.h | 3 * linux/arch/arm/include/asm/neon.h 16 * using NEON code /and/ calling the kernel_neon_begin() function from the same 18 * generating(1) NEON instructions outside of these begin/end functions, the 19 * only supported way of using NEON code in the kernel is by isolating it in a 23 * (1) Current GCC (4.7) might generate NEON instructions at O3 level if 24 * -mpfu=neon is set. 28 BUILD_BUG_ON_MSG(1, "kernel_neon_begin() called from NEON code")
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| /linux/lib/raid6/ |
| H A D | neon.c | 3 * linux/lib/raid6/neon.c - RAID6 syndrome calculation using ARM NEON intrinsics 11 #include <asm/neon.h> 20 * from the actual implementations in neonN.c (generated from neon.uc by 22 * - the actual implementations use NEON intrinsics, and the GCC support header 24 * - the neonN.c files are compiled with -mfpu=neon and optimization enabled, 25 * and we have to make sure that we never use *any* NEON/VFP instructions
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| H A D | neon.uc | 3 * neon.uc - RAID-6 syndrome calculation using ARM NEON instructions 20 * neon$#.c 22 * $#-way unrolled NEON intrinsics math RAID-6 instruction set 28 #include "neon.h"
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| H A D | recov_neon.c | 10 #include <asm/neon.h> 11 #include "neon.h" 98 .name = "neon",
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| H A D | Makefile | 10 raid6_pq-$(CONFIG_KERNEL_MODE_NEON) += neon.o neon1.o neon2.o neon4.o neon8.o recov_neon.o recov_ne… 71 $(obj)/neon%.c: $(src)/neon.uc $(src)/unroll.awk FORCE
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| /linux/lib/raid6/test/ |
| H A D | Makefile | 30 CFLAGS += -I../../../arch/arm/include -mfpu=neon 58 OBJS += neon.o neon1.o neon2.o neon4.o neon8.o recov_neon.o recov_neon_inner.o 87 neon1.c: neon.uc ../unroll.awk 88 $(AWK) ../unroll.awk -vN=1 < neon.uc > $@ 90 neon2.c: neon.uc ../unroll.awk 91 $(AWK) ../unroll.awk -vN=2 < neon.uc > $@ 93 neon4.c: neon.uc ../unroll.awk 94 $(AWK) ../unroll.awk -vN=4 < neon.uc > $@ 96 neon8.c: neon.uc ../unroll.awk 97 $(AWK) ../unroll.awk -vN=8 < neon.uc > $@ [all …]
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| /linux/crypto/ |
| H A D | Makefile | 106 CFLAGS_aegis128-neon-inner.o += -ffreestanding -march=armv8-a -mfloat-abi=softfp 107 CFLAGS_aegis128-neon-inner.o += -mfpu=crypto-neon-fp-armv8 108 aegis128-$(CONFIG_CRYPTO_AEGIS128_SIMD) += aegis128-neon.o aegis128-neon-inner.o 118 CFLAGS_aegis128-neon-inner.o += $(aegis128-cflags-y) 119 CFLAGS_REMOVE_aegis128-neon-inner.o += -mgeneral-regs-only 120 aegis128-$(CONFIG_CRYPTO_AEGIS128_SIMD) += aegis128-neon.o aegis128-neon-inner.o 123 CFLAGS_aegis128-neon-inner.o += -isystem $(shell $(CC) -print-file-name=include)
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| H A D | aegis128-neon.c | 7 #include <asm/neon.h> 10 #include "aegis-neon.h"
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| /linux/arch/arm/lib/ |
| H A D | xor-neon.c | 3 * linux/arch/arm/lib/xor-neon.c 11 MODULE_DESCRIPTION("NEON accelerated XOR implementation"); 15 #error You should compile this file with '-march=armv7-a -mfloat-abi=softfp -mfpu=neon' 21 * NEON instructions. Clang does this by default at O2 so no pragma is
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| H A D | Makefile | 43 CFLAGS_xor-neon.o += $(CC_FLAGS_FPU) 44 obj-$(CONFIG_XOR_BLOCKS) += xor-neon.o
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| /linux/arch/arm64/lib/ |
| H A D | Makefile | 9 obj-$(CONFIG_XOR_BLOCKS) += xor-neon.o 10 CFLAGS_xor-neon.o += $(CC_FLAGS_FPU) 11 CFLAGS_REMOVE_xor-neon.o += $(CC_FLAGS_NO_FPU)
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| /linux/arch/arm/mach-imx/ |
| H A D | cpu-imx5.c | 71 * All versions of the silicon before Rev. 3 have broken NEON implementations. 80 pr_info("Turning off NEON support, detected broken NEON implementation\n"); in mx51_neon_fixup()
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| /linux/arch/arm/mach-bcm/ |
| H A D | bcm63xx_smp.c | 72 * Since we will not be able to trap kernel-mode NEON to force in scu_a9_enable() 76 * all, for kernel-mode NEON, we do not want to introduce any in scu_a9_enable() 85 WARN(1, "SMP: kernel-mode NEON enabled, restricting to UP\n"); in scu_a9_enable()
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| /linux/lib/crc/arm/ |
| H A D | crc-t10dif.h | 3 * Accelerated CRC-T10DIF using ARM NEON and Crypto Extensions instructions 8 #include <asm/neon.h>
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| /linux/lib/crc/arm64/ |
| H A D | crc-t10dif.h | 3 * Accelerated CRC-T10DIF using arm64 NEON and Crypto Extensions instructions 10 #include <asm/neon.h>
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| /linux/include/crypto/ |
| H A D | nhpoly1305.h | 15 /* Word size: 32 bits (works well on NEON, SSE2, AVX2) */ 17 /* Stride: 2 words (optimal on ARM32 NEON; works okay on other CPUs too) */
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