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/linux/Documentation/arch/arm/
H A Dkernel_mode_neon.rst2 Kernel mode NEON
7 * Use only NEON instructions, or VFP instructions that don't rely on support
9 * Isolate your NEON code in a separate compilation unit, and compile it with
10 '-march=armv7-a -mfpu=neon -mfloat-abi=softfp'
12 NEON code
13 * Don't sleep in your NEON code, and be aware that it will be executed with
19 It is possible to use NEON instructions (and in some cases, VFP instructions) in
20 code that runs in kernel mode. However, for performance reasons, the NEON/VFP
24 may call schedule()], as NEON or VFP instructions will be executed in a
30 The NEON/VFP register file is managed using lazy preserve (on UP systems) and
[all …]
/linux/arch/arm/include/asm/
H A Dneon.h3 * linux/arch/arm/include/asm/neon.h
16 * using NEON code /and/ calling the kernel_neon_begin() function from the same
18 * generating(1) NEON instructions outside of these begin/end functions, the
19 * only supported way of using NEON code in the kernel is by isolating it in a
23 * (1) Current GCC (4.7) might generate NEON instructions at O3 level if
24 * -mpfu=neon is set.
28 BUILD_BUG_ON_MSG(1, "kernel_neon_begin() called from NEON code")
H A Dsimd.h10 #include <asm/neon.h>
/linux/lib/raid6/test/
H A DMakefile30 CFLAGS += -I../../../arch/arm/include -mfpu=neon
63 OBJS += neon.o neon1.o neon2.o neon4.o neon8.o recov_neon.o recov_neon_inner.o
95 neon1.c: neon.uc ../unroll.awk
96 $(AWK) ../unroll.awk -vN=1 < neon.uc > $@
98 neon2.c: neon.uc ../unroll.awk
99 $(AWK) ../unroll.awk -vN=2 < neon.uc > $@
101 neon4.c: neon.uc ../unroll.awk
102 $(AWK) ../unroll.awk -vN=4 < neon.uc > $@
104 neon8.c: neon.uc ../unroll.awk
105 $(AWK) ../unroll.awk -vN=8 < neon.uc > $@
[all …]
H A D.gitignore2 /neon.uc
/linux/lib/raid6/
H A Dneon.c3 * linux/lib/raid6/neon.c - RAID6 syndrome calculation using ARM NEON intrinsics
19 * from the actual implementations in neonN.c (generated from neon.uc by
21 * - the actual implementations use NEON intrinsics, and the GCC support header
23 * - the neonN.c files are compiled with -mfpu=neon and optimization enabled,
24 * and we have to make sure that we never use *any* NEON/VFP instructions
H A Dneon.uc3 * neon.uc - RAID-6 syndrome calculation using ARM NEON instructions
20 * neon$#.c
22 * $#-way unrolled NEON intrinsics math RAID-6 instruction set
28 #include "neon.h"
H A DMakefile10 raid6_pq-$(CONFIG_KERNEL_MODE_NEON) += neon.o neon1.o neon2.o neon4.o neon8.o recov_neon.o recov_ne…
71 $(obj)/neon%.c: $(src)/neon.uc $(src)/unroll.awk FORCE
H A Drecov_neon.c11 #include "neon.h"
95 .name = "neon",
H A D.gitignore6 neon?.c
/linux/arch/arm64/crypto/
H A Dsm4-neon-glue.c3 * SM4 Cipher Algorithm, using ARMv8 NEON
15 #include <asm/neon.h>
183 .cra_driver_name = "ecb-sm4-neon",
197 .cra_driver_name = "cbc-sm4-neon",
212 .cra_driver_name = "ctr-sm4-neon",
241 MODULE_DESCRIPTION("SM4 ECB/CBC/CTR using ARMv8 NEON");
242 MODULE_ALIAS_CRYPTO("sm4-neon");
H A Daes-neonbs-glue.c3 * Bit sliced AES using NEON instructions
8 #include <asm/neon.h>
19 MODULE_DESCRIPTION("Bit sliced AES using NEON instructions");
162 /* fall back to the non-bitsliced NEON implementation */ in cbc_encrypt()
/linux/lib/crypto/
H A DMakefile33 arm64/aes-neon.o
80 libblake2b-$(CONFIG_ARM) += arm/blake2b-neon-core.o
106 libchacha-$(CONFIG_KERNEL_MODE_NEON) += arm/chacha-neon-core.o
109 libchacha-$(CONFIG_ARM64) += arm64/chacha-neon-core.o
164 libgf128hash-$(CONFIG_ARM) += arm/ghash-neon-core.o
165 libgf128hash-$(CONFIG_ARM64) += arm64/ghash-neon-core.o \
206 libnh-$(CONFIG_ARM) += arm/nh-neon-core.o
207 libnh-$(CONFIG_ARM64) += arm64/nh-neon-core.o
228 # massage the perlasm code a bit so we only get the NEON routine if we need it
290 libsha1-$(CONFIG_KERNEL_MODE_NEON) += arm/sha1-armv7-neon.o \
[all …]
/linux/arch/arm/mach-imx/
H A Dcpu-imx5.c71 * All versions of the silicon before Rev. 3 have broken NEON implementations.
80 pr_info("Turning off NEON support, detected broken NEON implementation\n"); in mx51_neon_fixup()
/linux/lib/crypto/arm/
H A Dblake2b.h3 * BLAKE2b digest algorithm, NEON accelerated
8 #include <asm/neon.h>
H A Dblake2b-neon-core.S3 * BLAKE2b digest algorithm optimized with ARM NEON instructions. On ARM
4 * processors that have NEON support but not the ARMv8 Crypto Extensions,
16 .fpu neon
31 // NEON registers which contain the message words of the current block.
53 // rotation amounts with NEON. (On Cortex-A53 it's the same speed as
67 // NEON registers q0-q7. The message block is in q8..q15 (M_0-M_15). The stack
277 // 'v'. Fortunately, there are exactly enough NEON registers to fit the
/linux/arch/arm/mach-bcm/
H A Dbcm63xx_smp.c72 * Since we will not be able to trap kernel-mode NEON to force in scu_a9_enable()
76 * all, for kernel-mode NEON, we do not want to introduce any in scu_a9_enable()
85 WARN(1, "SMP: kernel-mode NEON enabled, restricting to UP\n"); in scu_a9_enable()
/linux/arch/arm/vfp/
H A Dvfpmodule.c29 #include <asm/neon.h>
680 * while running in kernel mode. If the NEON/VFP unit was enabled at the in vfp_kmode_exception()
684 * If the NEON/VFP unit was disabled, and the location pointed to below in vfp_kmode_exception()
864 * Kernel-side NEON support functions
875 * Kernel mode NEON is only allowed outside of hardirq context with in kernel_neon_begin()
877 * the kernel mode NEON register contents never need to be preserved. in kernel_neon_begin()
887 * Save the userland NEON/VFP state. Under UP, in kernel_neon_begin()
902 /* Disable the NEON/VFP unit. */ in kernel_neon_end()
964 * for NEON if the hardware has the MVFR registers. in vfp_init()
/linux/arch/arm/mach-omap2/
H A Dpowerdomains54xx_data.c101 /* cpu0_54xx_pwrdm: MPU0 processor and Neon coprocessor power domain */
118 /* cpu1_54xx_pwrdm: MPU1 processor and Neon coprocessor power domain */
151 /* mpu_54xx_pwrdm: Modena processor and the Neon coprocessor power domain */
H A Dpowerdomains44xx_data.c149 /* cpu0_44xx_pwrdm: MPU0 processor and Neon coprocessor power domain */
166 /* cpu1_44xx_pwrdm: MPU1 processor and Neon coprocessor power domain */
199 /* mpu_44xx_pwrdm: Modena processor and the Neon coprocessor power domain */
H A Dpowerdomains7xx_data.c163 /* cpu0_7xx_pwrdm: MPU0 processor and Neon coprocessor power domain */
179 /* cpu1_7xx_pwrdm: MPU1 processor and Neon coprocessor power domain */
208 /* mpu_7xx_pwrdm: Modena processor and the Neon coprocessor power domain */
/linux/tools/testing/selftests/arm64/fp/
H A Dkernel-test.c51 "sha224-arm64-neon",
54 "sha256-arm64-neon",
63 "sm3-neon",
/linux/tools/perf/pmu-events/arch/arm64/arm/cortex-a55/
H A Dpipeline.json39 …cle that issue is stalled and there is an interlock that is due to an FPU/NEON instruction. Stall …
42 …cle that issue is stalled and there is an interlock that is due to an FPU/NEON instruction. Stall …
/linux/arch/arm64/include/asm/
H A Dfpu.h10 #include <asm/neon.h>
H A Dneon.h3 * linux/arch/arm64/include/asm/neon.h

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