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/linux/Documentation/driver-api/gpio/
H A Ddriver.rst26 between 0 and n-1, n being the number of GPIOs managed by the chip.
29 example if a system uses a memory-mapped set of I/O-registers where 32 GPIO
30 lines are handled by one bit per line in a 32-bit register, it makes sense to
44 So for example one platform could use global numbers 32-159 for GPIOs, with a
46 global numbers 0..63 with one set of GPIO controllers, 64-79 with another type
47 of GPIO controller, and on one particular board 80-95 with an FPGA. The legacy
49 2000-2063 to identify GPIO lines in a bank of I2C GPIO expanders.
60 - methods to establish GPIO line direction
61 - methods used to access GPIO line values
62 - method to set electrical configuration for a given GPIO line
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/linux/drivers/power/supply/
H A Drt9467-charger.c1 // SPDX-License-Identifier: GPL-2.0-only
69 #define RT9467_NUM_VOTG (RT9467_OTG_MAX_uV - RT9467_OTG_MIN_uV + 1)
173 .name = "rt9467-irqs",
289 struct rt9467_chg_data *data = cfg->driver_data; in rt9467_otg_of_parse_cb()
291 cfg->ena_gpiod = fwnode_gpiod_get_index(of_fwnode_handle(of), in rt9467_otg_of_parse_cb()
294 desc->name); in rt9467_otg_of_parse_cb()
295 if (IS_ERR(cfg->ena_gpiod)) { in rt9467_otg_of_parse_cb()
296 cfg->ena_gpiod = NULL; in rt9467_otg_of_parse_cb()
300 return regmap_field_write(data->rm_field[F_OTG_PIN_EN], 1); in rt9467_otg_of_parse_cb()
319 .name = "rt9476-usb-otg-vbus",
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/linux/arch/arm64/boot/dts/qcom/
H A Dsc7280-qcard.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
14 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
15 #include <dt-bindings/iio/qcom,spmi-adc7-pmr735a.h>
16 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
17 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
34 wcd9385: audio-codec-1 {
35 compatible = "qcom,wcd9385-codec";
36 pinctrl-names = "default", "sleep";
37 pinctrl-0 = <&wcd_reset_n>, <&us_euro_hs_sel>;
38 pinctrl-1 = <&wcd_reset_n_sleep>, <&us_euro_hs_sel>;
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/linux/drivers/isdn/hardware/mISDN/
H A DmISDNipac.c1 // SPDX-License-Identifier: GPL-2.0-only
27 #define ReadISAC(is, o) (is->read_reg(is->dch.hw, o + is->off))
28 #define WriteISAC(is, o, v) (is->write_reg(is->dch.hw, o + is->off, v))
29 #define ReadHSCX(h, o) (h->ip->read_reg(h->ip->hw, h->off + o))
30 #define WriteHSCX(h, o, v) (h->ip->write_reg(h->ip->hw, h->off + o, v))
31 #define ReadIPAC(ip, o) (ip->read_reg(ip->hw, o))
32 #define WriteIPAC(ip, o, v) (ip->write_reg(ip->hw, o, v))
37 pr_debug("%s: ph_command %x\n", isac->name, command); in ph_command()
38 if (isac->type & IPAC_TYPE_ISACX) in ph_command()
47 switch (isac->state) { in isac_ph_state_change()
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