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/linux/tools/perf/pmu-events/arch/x86/amdzen1/
H A Dfloating-point.json5 "BriefDescription": "Total number multi-pipe uOps assigned to all pipes.",
6 …-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the F…
12 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 3.",
13 …-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the F…
19 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 2.",
20 …-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the F…
26 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 1.",
27 …-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the F…
33 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 0.",
34 …-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the F…
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/linux/drivers/ata/
H A Dpata_ftide010.c1 // SPDX-License-Identifier: GPL-2.0-only
24 * struct ftide010 - state container for the Faraday FTIDE010
48 /* Gemini-specific properties */
102 * mdma_50_active_time: array of 4 elements for Td timing for multi
103 * word DMA, Mode 0, 1, and 2 at 50 MHz. Range 0..15.
105 * multi word DMA, Mode 0, 1 and 2 at 50 MHz. Range 0..15.
106 * mdma_66_active_time: array of 4 elements for Td timing for multi
107 * word DMA, Mode 0, 1 and 2 at 66 MHz. Range 0..15.
109 * multi word DMA, Mode 0, 1 and 2 at 66 MHz. Range 0..15.
113 * multi word DMA, Mode 0, 1, 2, 3, 4 and 5 at 50 MHz, Range 0..7.
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/linux/sound/soc/sh/rcar/
H A Dssi.c1 // SPDX-License-Identifier: GPL-2.0
3 // Renesas R-Car SSIU/SSI support
38 #define DWL_MASK (7u << 19) /* Data Word Length mask */
39 #define DWL_8 (0u << 19) /* Data Word Length */
40 #define DWL_16 (1u << 19) /* Data Word Length */
41 #define DWL_18 (2u << 19) /* Data Word Length */
42 #define DWL_20 (3u << 19) /* Data Word Length */
43 #define DWL_22 (4u << 19) /* Data Word Length */
44 #define DWL_24 (5u << 19) /* Data Word Length */
45 #define DWL_32 (6u << 19) /* Data Word Length */
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/linux/Documentation/i2c/
H A Dslave-testunit-backend.rst1 .. SPDX-License-Identifier: GPL-2.0
7 by Wolfram Sang <wsa@sang-engineering.com> in 2020
11 easy to obtain). Examples include multi-master testing, and SMBus Host Notify
21 # echo "slave-testunit 0x1030" > /sys/bus/i2c/devices/i2c-0/new_device
30 compatible = "slave-testunit";
39 When writing, the device consists of 4 8-bit registers and, except for some
43 .. csv-table::
51 Using 'i2cset' from the i2c-tools package, the generic command looks like::
53 # i2cset -y <bus_num> <testunit_address> <CMD> <DATAL> <DATAH> <DELAY> i
63 --------
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/linux/drivers/hwmon/pmbus/
H A Dmp2993.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Hardware monitoring driver for MPS Multi-phase Digital VR Controllers(MP2993)
37 static u16 mp2993_linear11_exponent_transfer(u16 word, u16 expect_exponent) in mp2993_linear11_exponent_transfer() argument
41 exponent = ((s16)word) >> 11; in mp2993_linear11_exponent_transfer()
42 mantissa = ((s16)((word & 0x7ff) << 5)) >> 5; in mp2993_linear11_exponent_transfer()
46 mantissa = mantissa << (exponent - target_exponent); in mp2993_linear11_exponent_transfer()
48 mantissa = mantissa >> (target_exponent - exponent); in mp2993_linear11_exponent_transfer()
132 ret = -ENODATA; in mp2993_read_word_data()
135 ret = -EINVAL; in mp2993_read_word_data()
143 u16 word) in mp2993_write_word_data() argument
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H A Dmp2888.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Hardware monitoring driver for MPS Multi-phase Digital VR Controllers
46 return -ENODATA; in mp2888_read_byte_data()
57 * , bits 0-2. The value is selected as below: in mp2888_current_sense_gain_and_resolution_get()
58 * 00b - 5µA/A, 01b - 8.5µA/A, 10b - 9.7µA/A, 11b - 10µA/A. Other in mp2888_current_sense_gain_and_resolution_get()
67 data->curr_sense_gain = 85; in mp2888_current_sense_gain_and_resolution_get()
70 data->curr_sense_gain = 97; in mp2888_current_sense_gain_and_resolution_get()
73 data->curr_sense_gain = 100; in mp2888_current_sense_gain_and_resolution_get()
76 data->curr_sense_gain = 50; in mp2888_current_sense_gain_and_resolution_get()
79 return -EINVAL; in mp2888_current_sense_gain_and_resolution_get()
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H A Dmp9941.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Hardware monitoring driver for MPS Multi-phase Digital VR Controllers(MP9941)
87 data->vid_resolution = 5; in mp9941_identify_vid_resolution()
89 data->vid_resolution = 10; in mp9941_identify_vid_resolution()
197 ret = ret * data->vid_resolution; in mp9941_read_word_data()
206 ret = -ENODATA; in mp9941_read_word_data()
209 ret = -EINVAL; in mp9941_read_word_data()
217 u16 word) in mp9941_write_word_data() argument
227 DIV_ROUND_CLOSEST(word * MP9941_VIN_LIMIT_DIV, in mp9941_write_word_data()
234 DIV_ROUND_CLOSEST(word, data->vid_resolution)); in mp9941_write_word_data()
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H A Dmp2891.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Hardware monitoring driver for MPS Multi-phase Digital VR Controllers(MP2891)
63 static u16 mp2891_reg2data_linear11(u16 word) in mp2891_reg2data_linear11() argument
69 exponent = ((s16)word) >> 11; in mp2891_reg2data_linear11()
70 mantissa = ((s16)((word & 0x7ff) << 5)) >> 5; in mp2891_reg2data_linear11()
76 val >>= -exponent; in mp2891_reg2data_linear11()
99 * Obtain vout scale from the register MFR_VOUT_LOOP_CTRL, bits 15-14,bit 13. in mp2891_identify_vout_scale()
104 * 00b - 6.25mV/LSB, 01b - 5mV/LSB, 10b - 2mV/LSB, 11b - 1mV in mp2891_identify_vout_scale()
107 data->vout_scale[page] = 250; in mp2891_identify_vout_scale()
111 data->vout_scale[page] = 625; in mp2891_identify_vout_scale()
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/linux/arch/arm/common/
H A Dmcpm_head.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * arch/arm/common/mcpm_head.S -- kernel entry point for multi-cluster PM
6 * Copyright: (C) 2012-2013 Linaro Limited
8 * Refer to Documentation/arch/arm/cluster-pm-race-avoidance.rst
18 .arch armv7-a
128 @ Wait for any previously-pending cluster teardown operations to abort
168 @ In the contended case, non-first men wait here for cluster setup
178 @ If a platform-specific CPU setup hook is needed, it is
205 3: .word mcpm_entry_early_pokes - .
206 .word mcpm_entry_vectors - 3b
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/linux/sound/pci/ice1712/
H A Dice1712.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
16 #include <sound/ak4xxx-adda.h>
27 #define ICEREG(ice, x) ((ice)->port + ICE1712_REG_##x)
31 #define ICE1712_SERR_ASSERT_DS_DMA 0x40 /* disabled SERR# assertion for the DS DMA Ch-C irq ot…
40 #define ICE1712_IRQ_PROPCM 0x10 /* professional multi-track */
41 #define ICE1712_IRQ_FM 0x08 /* FM/MIDI - legacy */
47 #define ICE1712_REG_INDEX 0x03 /* byte - indirect CCIxx regs */
48 #define ICE1712_REG_DATA 0x04 /* byte - indirect CCIxx regs */
61 #define ICE1712_REG_AC97_DATA 0x0a /* word (little endian) */
71 #define ICE1712_REG_CONCAP_ADDR 0x14 /* dword - consumer capture */
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H A Denvy24ht.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
39 #define ICEREG1724(ice, x) ((ice)->port + VT1724_REG_##x)
49 #define VT1724_REG_SYS_CFG 0x04 /* byte - system configuration PCI60 on Envy24*/
60 #define VT1724_CFG_AC97_PACKED 0x01 /* split or packed mode - AC'97 */
65 #define VT1724_CFG_I2S_RESMASK 0x30 /* resolution mask, 16,18,20,24-bit */
103 #define VT1724_REG_GPIO_DATA 0x14 /* word */
104 #define VT1724_REG_GPIO_WRITE_MASK 0x16 /* word */
106 bit3 - during reset used for Eeprom power-on strapping
114 * Professional multi-track direct control registers
117 #define ICEMT1724(ice, x) ((ice)->profi_port + VT1724_MT_##x)
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/linux/drivers/spi/
H A Dspi-omap2-mcspi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
15 #include <linux/dma-mapping.h>
32 #include <linux/platform_data/spi-omap2-mcspi.h>
49 /* per-channel banks, 0x14 bytes each, first is: */
56 /* per-register bitmasks: */
154 writel_relaxed(val, mcspi->base + idx); in mcspi_write_reg()
161 return readl_relaxed(mcspi->base + idx); in mcspi_read_reg()
167 struct omap2_mcspi_cs *cs = spi->controller_state; in mcspi_write_cs_reg()
169 writel_relaxed(val, cs->base + idx); in mcspi_write_cs_reg()
174 struct omap2_mcspi_cs *cs = spi->controller_state; in mcspi_read_cs_reg()
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/linux/include/linux/dma/
H A Dqcom-gpi-dma.h1 /* SPDX-License-Identifier: GPL-2.0 */
10 * enum spi_transfer_cmd - spi transfer commands
19 * struct gpi_spi_config - spi config for peripheral
25 * @word_len: spi word length
55 * struct gpi_i2c_config - i2c config for peripheral
67 * @muli-msg: is part of multi i2c r-w msgs
/linux/Documentation/devicetree/bindings/ata/
H A Dfaraday,ftide010.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
15 platform. The controller can do PIO modes 0 through 4, Multi-word DMA
22 The timing properties are unique per-SoC, not per-board.
27 - const: faraday,ftide010
28 - items:
29 - const: cortina,gemini-pata
30 - const: faraday,ftide010
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/linux/arch/riscv/kernel/
H A Dcpufeature.c1 // SPDX-License-Identifier: GPL-2.0-only
29 #define NUM_ALPHA_EXTS ('z' - 'a' + 1)
36 /* Per-cpu ISA extensions. */
40 * riscv_isa_extension_base() - Get base extension word
43 * Return: base extension word as unsigned long value
56 * __riscv_isa_extension_available() - Check whether given extension
80 pr_err("Zicbom detected in ISA string, disabling as no cbom-block-size found\n"); in riscv_ext_zicbom_validate()
81 return -EINVAL; in riscv_ext_zicbom_validate()
84 pr_err("Zicbom disabled as cbom-block-size present, but is not a power-of-2\n"); in riscv_ext_zicbom_validate()
85 return -EINVAL; in riscv_ext_zicbom_validate()
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/linux/Documentation/gpu/amdgpu/display/
H A Dmulti-display-hdcp-mpo.svg1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
2 <!-- Created with Inkscape (http://www.inkscape.org/) -->
7 xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
10 xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
17 inkscape:version="0.92.5 (2060ec1f9f, 2020-04-08)"
18 sodipodi:docname="multi-display-hdcp-mpo.svg">
31 d="M 5.77,0 -2.88,5 V -5 Z"
32 …style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1.00000003pt;stro…
34 inkscape:connector-curvature="0" />
41 id="TriangleOutL-6"
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H A Dmulti-display-hdcp-mpo-less-pipe-ex.svg1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
2 <!-- Created with Inkscape (http://www.inkscape.org/) -->
7 xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
10 xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
17 inkscape:version="0.92.5 (2060ec1f9f, 2020-04-08)"
18 sodipodi:docname="multi-display-hdcp-mpo-less-pipe-ex.svg">
31 d="M 5.77,0 -2.88,5 V -5 Z"
32 …style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1.00000003pt;stro…
34 inkscape:connector-curvature="0" />
41 id="TriangleOutL-6"
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/linux/Documentation/userspace-api/media/v4l/
H A Dpixfmt-inzi.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-PIX-FMT-INZI:
9 Infrared 10-bit linked with Depth 16-bit images
15 Proprietary multi-planar format used by Intel SR300 Depth cameras, comprise of
16 Infrared image followed by Depth data. The pixel definition is 32-bpp,
22 The first plane - Infrared data - is stored according to
23 :ref:`V4L2_PIX_FMT_Y10 <V4L2-PIX-FMT-Y10>` greyscale format.
24 Each pixel is 16-bit cell, with actual data stored in the 10 LSBs
29 The second plane provides 16-bit per-pixel Depth data arranged in
30 :ref:`V4L2-PIX-FMT-Z16 <V4L2-PIX-FMT-Z16>` format.
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/linux/drivers/base/regmap/
H A Dregmap-sdw.c1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright(c) 2015-17 Intel Corporation.
16 /* First word of buffer contains the destination address */ in regmap_sdw_write()
20 return sdw_nwrite_no_pm(slave, addr, val_size - sizeof(addr), val + sizeof(addr)); in regmap_sdw_write()
56 if (config->reg_bits != 32) in regmap_sdw_config_check()
57 return -ENOTSUPP; in regmap_sdw_config_check()
59 if (config->pad_bits != 0) in regmap_sdw_config_check()
60 return -ENOTSUPP; in regmap_sdw_config_check()
62 /* Only bulk writes are supported not multi-register writes */ in regmap_sdw_config_check()
63 if (config->can_multi_write) in regmap_sdw_config_check()
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/linux/Documentation/hwmon/
H A Dpmbus-core.rst9 power-management protocol with a fully defined command language that facilitates
11 protocol is implemented over the industry-standard SMBus serial interface and
12 enables programming, control, and real-time monitoring of compliant power
18 promoted by the PMBus Implementers Forum (PMBus-IF), comprising 30+ adopters
22 commands, and manufacturers can add as many non-standard commands as they like.
23 Also, different PMBUs devices act differently if non-supported commands are
43 PMBus device capabilities auto-detection
46 For generic PMBus devices, code in pmbus.c attempts to auto-detect all supported
47 PMBus commands. Auto-detection is somewhat limited, since there are simply too
50 pages (see the PMBus specification for details on multi-page PMBus devices).
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/linux/include/linux/spi/
H A Dspi.h1 /* SPDX-License-Identifier: GPL-2.0-or-later
36 * INTERFACES between SPI master-side drivers and SPI slave protocol handlers,
42 * struct spi_statistics - statistics for spi transfers
43 * @syncp: seqcount to protect members in this struct for per-cpu update
44 * on 32-bit systems
46 * @messages: number of spi-messages handled
95 u64_stats_update_begin(&__lstats->syncp); \
96 u64_stats_add(&__lstats->field, count); \
97 u64_stats_update_end(&__lstats->syncp); \
106 u64_stats_update_begin(&__lstats->syncp); \
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/linux/drivers/scsi/csiostor/
H A Dcsio_hw_t5.c4 * Copyright (c) 2008-2013 Chelsio Communications, Inc. All rights reserved.
15 * - Redistributions of source code must retain the above
19 * - Redistributions in binary form must reproduce the above
42 * Truncation intentional: we only read the bottom 32-bits of the in csio_t5_set_mem_win()
43 * 64-bit BAR0/BAR1 ... We use the hardware backdoor mechanism to in csio_t5_set_mem_win()
46 * accesses to our Configuration Space and we need to set up the PCI-E in csio_t5_set_mem_win()
48 * coming across the PCI-E link. in csio_t5_set_mem_win()
60 WINDOW_V(ilog2(MEMWIN_APERTURE) - 10), in csio_t5_set_mem_win()
76 -1, 1 }, in csio_t5_pcie_intr_handler()
77 { MSTTIMEOUTPERR_F, "Master Timeout FIFO parity error", -1, 1 }, in csio_t5_pcie_intr_handler()
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/linux/scripts/
H A DMakefile.build1 # SPDX-License-Identifier: GPL-2.0
14 obj-y :=
15 obj-m :=
16 lib-y :=
17 lib-m :=
18 always-y :=
19 always-m :=
21 subdir-y :=
22 subdir-m :=
27 asflags-y :=
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/linux/drivers/net/fddi/skfp/h/
H A Dfplustm.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
50 __le32 txd_txdscr ; /* transmit frame status word */
59 struct s_txd_os txd_os ; /* OS - specific struct */
67 __le32 rxd_rfsw ; /* receive frame status word */
76 struct s_rxd_os rxd_os ; /* OS - specific struct */
125 #define RX_FIFO_SPACE 0x4000 - RX_FIFO_OFF
130 #define TX_LARGE_FIFO TX_FIFO_SPACE - TX_SMALL_FIFO
133 #define RX_LARGE_FIFO RX_FIFO_SPACE - RX_SMALL_FIFO
155 u_short rx_mode ; /* address mode broad/multi/promisc */
228 /* used by the os-specific module */
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/linux/drivers/firmware/efi/libstub/
H A Dprintk.c1 // SPDX-License-Identifier: GPL-2.0
17 * efi_char16_puts() - Write a UCS-2 encoded string to the console
18 * @str: UCS-2 encoded string
35 * The position of the most-significant 0 bit gives us the length of in utf8_to_utf32()
36 * a multi-octet encoding. in utf8_to_utf32()
41 * If the 0 bit is in position 8, this is a valid single-octet in utf8_to_utf32()
42 * encoding. If the 0 bit is in position 7 or positions 1-3, the in utf8_to_utf32()
49 c32 = cx >> clen--; in utf8_to_utf32()
59 * - The character must be in the Unicode range. in utf8_to_utf32()
60 * - It must not be a surrogate. in utf8_to_utf32()
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