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/linux/Documentation/arch/arm64/
H A Dlegacy_instructions.rst11 The emulation mode can be controlled by writing to sysctl nodes
13 behaviours and the corresponding values of the sysctl nodes -
24 Uses software emulation. To aid migration of software, in this mode
38 The default mode depends on the status of the instruction in the
46 -----------------------------
65 Note: All the cpus on the system must have mixed endian support at EL0
66 for this feature to be enabled. If a new CPU - which doesn't support mixed
67 endian - is hotplugged in after this feature has been enabled, there could
/linux/Documentation/hwmon/
H A Dpcf8591.rst17 - Aurelien Jarno <aurelien@aurel32.net>
18 - valuable contributions by Jan M. Sendler <sendler@sendler.de>,
19 - Jean Delvare <jdelvare@suse.de>
23 -----------
25 The PCF8591 is an 8-bit A/D and D/A converter (4 analog inputs and one
29 The PCF8591 has 4 analog inputs programmable as single-ended or
32 - mode 0 : four single ended inputs
35 - mode 1 : three differential inputs
39 - mode 2 : single ended and differential mixed
44 - mode 3 : two differential inputs
[all …]
H A Dg760a.rst6 * Global Mixed-mode Technology Inc. G760A
12 http://www.gmt.com.tw/product/datasheet/EDS-760A.pdf
17 -----------
20 and performs closed-loop control of the fan speed.
31 source and a 2 pulse-per-revolution fan.
/linux/Documentation/ABI/testing/
H A Dsysfs-bus-i3c1 What: /sys/bus/i3c/devices/i3c-<bus-id>
3 Contact: linux-i3c@vger.kernel.org
5 An I3C bus. This directory will contain one sub-directory per
8 What: /sys/bus/i3c/devices/i3c-<bus-id>/current_master
10 Contact: linux-i3c@vger.kernel.org
12 Expose the master that owns the bus (<bus-id>-<master-pid>) at
17 What: /sys/bus/i3c/devices/i3c-<bus-id>/mode
19 Contact: linux-i3c@vger.kernel.org
21 I3C bus mode. Can be "pure", "mixed-fast" or "mixed-slow". See
25 What: /sys/bus/i3c/devices/i3c-<bus-id>/i3c_scl_frequency
[all …]
/linux/tools/tracing/rtla/src/
H A Dtimerlat.h1 // SPDX-License-Identifier: GPL-2.0
5 * Define timerlat tracing mode.
8 * - tracefs-only, used when BPF is unavailable.
9 * - BPF-only, used when BPF is available and neither trace saving nor
10 * auto-analysis are enabled.
11 * - mixed mode, used when BPF is available and either trace saving or
12 * auto-analysis is enabled (which rely on sample collection through
29 enum timerlat_tracing_mode mode; member
/linux/tools/testing/selftests/x86/
H A Dthunks_32.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * thunks_32.S - assembly helpers for mixed-bitness code
21 // Save registers which are callee-clobbered by 64-bit ABI
27 // Switch to long mode
34 // Switch to compatibility mode
36 .code32; push $1f; .code64 /* hack: can't have X86_64_32S relocation in 32-bit ELF */
47 .size call64_from_32, .-call64_from_32
49 .section .note.GNU-stack,"",%progbits
H A Dthunks.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * thunks.S - assembly helpers for mixed-bitness code
31 // Switch to compatibility mode
40 // Switch back to long mode
59 .size call32_from_64, .-call32_from_64
61 .section .note.GNU-stack,"",%progbits
/linux/Documentation/admin-guide/device-mapper/
H A Ddm-integrity.rst2 dm-integrity
5 The dm-integrity target emulates a block device that has additional
6 per-sector tags that can be used for storing integrity information.
9 writing the sector and the integrity tag must be atomic - i.e. in case of
12 To guarantee write atomicity, the dm-integrity target uses journal, it
16 The dm-integrity target can be used with the dm-crypt target - in this
17 situation the dm-crypt target creates the integrity data and passes them
18 to the dm-integrity target via bio_integrity_payload attached to the bio.
19 In this mode, the dm-crypt and dm-integrity targets provide authenticated
20 disk encryption - if the attacker modifies the encrypted device, an I/O
[all …]
/linux/drivers/hwmon/
H A Dpcf8591.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2001-2004 Aurelien Jarno <aurelien@aurel32.net>
24 "Analog input mode:\n"
27 " 2 = single ended and differential mixed\n"
43 * 0x20 = single ended and differential mixed
65 #define REG_TO_SIGNED(reg) (((reg) & 0x80) ? ((reg) - 256) : (reg))
98 return sprintf(buf, "%d\n", data->aout * 10); in out0_output_show()
116 return -EINVAL; in out0_output_store()
118 data->aout = val; in out0_output_store()
119 i2c_smbus_write_byte_data(client, data->control, data->aout); in out0_output_store()
[all …]
/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dxlnx,versal-net-ddrmc5.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/xlnx,versal-net-ddrmc5.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
17 MMCM (Mixed-Mode Clock Manager) errors and General software errors.
21 const: xlnx,versal-net-ddrmc5
31 - compatible
32 - amd,rproc
37 - |
[all …]
/linux/Documentation/devicetree/bindings/net/
H A Dsmsc,lan91c111.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Smart Mixed-Signal Connectivity (SMSC) LAN91C9x/91C1xx Controller
10 - Nicolas Pitre <nico@fluxnic.net>
13 - $ref: ethernet-controller.yaml#
25 reg-shift: true
27 reg-io-width:
31 reset-gpios:
35 power-gpios:
[all …]
H A Dsti-dwmac.txt10 - compatible : "st,stih407-dwmac"
11 - st,syscon : Should be phandle/offset pair. The phandle to the syscon node which
13 - st,gmac_en: this is to enable the gmac into a dedicated sysctl control
15 - pinctrl-0: pin-control for all the MII mode supported.
18 - resets : phandle pointing to the system reset controller with correct
20 - st,ext-phyclk: valid only for RMII where PHY can generate 50MHz clock or
22 - st,tx-retime-src: This specifies which clk is wired up to the mac for
26 - sti-ethclk: this is the phy clock.
27 - sti-clkconf: this is an extra sysconfig register, available in new SoCs,
29 - st,gmac_en: to enable the GMAC, this only is present in some SoCs; e.g.
[all …]
H A Dqcom,qca807x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Christian Marangi <ansuelsmth@gmail.com>
11 - Robert Marko <robert.marko@sartura.hr>
15 IEEE 802.3 clause 22 compliant 10BASE-Te, 100BASE-TX and
16 1000BASE-T PHY-s.
21 Both models have a combo port that supports 1000BASE-X and
22 100BASE-FX fiber.
25 output only pins that natively drive LED-s for up to 2 attached
[all …]
H A Dstm32-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/stm32-dwmac.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Alexandre Torgue <alexandre.torgue@foss.st.com>
12 - Christophe Roullier <christophe.roullier@foss.st.com>
23 - st,stm32-dwmac
24 - st,stm32mp1-dwmac
25 - st,stm32mp13-dwmac
26 - st,stm32mp25-dwmac
[all …]
/linux/tools/power/acpi/man/
H A Dacpidump.83 acpidump \- dump a system's ACPI tables to an ASCII file
22 .B \-b
25 .B \-h \-?
28 .B \-o <File>
31 .B \-r <Address>
34 .B \-s
37 .B \-v
40 .B \-z
41 Verbose mode
45 .B \-a <Address>
[all …]
/linux/drivers/media/dvb-frontends/cxd2880/
H A Dcxd2880_dvbt2.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Sony CXD2880 DVB-T2/T tuner + demodulator driver
5 * DVB-T2 related definitions
296 u8 mixed; member
360 u8 mixed; member
362 enum cxd2880_dvbt2_mode mode; member
/linux/lib/
H A Dpercpu-refcount.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/percpu-refcount.h>
13 * don't try to detect the ref hitting 0 - which means that get/put can just
15 * particular cpu can (and will) wrap - this is fine, when we go to shutdown the
24 * the ref hitting 0 on every put - this would require global synchronization
29 * convert to non percpu mode before the initial ref is dropped everything
32 * Converting to non percpu mode is done with some RCUish stuff in
37 #define PERCPU_COUNT_BIAS (1LU << (BITS_PER_LONG - 1))
45 (ref->percpu_count_ptr & ~__PERCPU_REF_ATOMIC_DEAD); in percpu_count_ptr()
49 * percpu_ref_init - initialize a percpu refcount
[all …]
/linux/Documentation/sound/hd-audio/
H A Dcontrols.rst2 HD-Audio Codec-Specific Mixer Controls
6 This file explains the codec-specific mixer controls.
9 --------------
11 Channel Mode
12 This is an enum control to change the surround-channel setup,
16 jack-retasking of multi-I/O jacks.
18 Auto-Mute Mode
19 This is an enum control to change the auto-mute behavior of the
20 headphone and line-out jacks. If built-in speakers and headphone
21 and/or line-out jacks are available on a machine, this controls
[all …]
/linux/drivers/leds/
H A DTODO1 -*- org -*-
11 Calls that may and that may not block are mixed in same structure, and
12 semantics is sometimes non-intuitive. (For example blink callback may
35 Green-Magenta-Ultraviolet LED, but so far all the LEDs we support are
36 RGB, and not even RGB-White or RGB-Yellow variants emerged.
44 Proposal: let's add "rgb" to led_colors in drivers/leds/led-core.c,
53 have that ability from kernel, too... to allow full-color triggers.
67 It would be also nice to have useful listing mode -- name, type,
73 And probably user-friendly interface to access LEDs for particular
/linux/arch/x86/platform/efi/
H A Defi_thunk_64.S1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Support for invoking 32-bit EFI runtime services from a 64-bit
11 * intact (GDT, IDT, etc) and simply invoke the 32-bit EFI runtime
13 * interrupts across an EFI mixed mode call.
16 * 64-bit virtual address space. Things like the stack and instruction
17 * addresses need to be accessible by the 32-bit firmware, so we rely on
35 * Switch to 1:1 mapped 32-bit stack pointer.
70 /* Switch to 32-bit descriptor */
/linux/arch/powerpc/platforms/85xx/
H A Dcorenet_generic.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Copyright 2009-2011 Freescale Semiconductor Inc.
19 #include <asm/pci-bridge.h>
20 #include <asm/ppc-pci.h>
62 .compatible = "simple-bus"
65 .compatible = "mdio-mux-gpio"
68 .compatible = "fsl,fpga-ngpixis"
71 .compatible = "fsl,fpga-qixis"
77 .compatible = "fsl,p4080-pcie",
80 .compatible = "fsl,qoriq-pcie-v2.2",
[all …]
/linux/drivers/gpu/drm/amd/display/dc/inc/
H A Dclock_source.h2 * Copyright 2012-15 Advanced Micro Devices, Inc.
75 * (not to be mixed with DP IDCLK SS from PLL Settings)*/
83 * (based on Video Timing standard used for requested mode)*/
87 /*> DP reference clock - calculated only for DP signal for specific cases*/
89 /*> Encoder object Id - needed by VBIOS Exec table*/
91 /*> signalType -> Encoder Mode - needed by VBIOS Exec table*/
93 /*> ControllerId - which controller using this PLL*/
96 /*> de-spread info, relevant only for on-the-fly tune-up pixel rate*/
/linux/Documentation/filesystems/
H A Dvfat.rst10 mount -t vfat /dev/fd0 /mnt
42 **-20**: If current process is in group of file's group ID,
45 **-2**: Other users can change timestamp.
69 There is also an option of doing UTF-8 translations
76 UTF-8 is the filesystem safe version of Unicode that
79 If 'uni_xlate' gets set, UTF-8 gets disabled.
125 **shortname=lower|win95|winnt|mixed**
135 **mixed**: emulate the Windows NT rule for display,
138 Default setting is `mixed`.
156 cases in presence of DST - time stamps in a different DST
[all …]
/linux/tools/perf/Documentation/
H A Dperf-top.txt1 perf-top(1)
5 ----
6 perf-top - System profiling tool.
9 --------
11 'perf top' [-e <EVENT> | --event=EVENT] [<options>]
14 -----------
19 -------
20 -a::
21 --all-cpus::
22 System-wide collection. (default)
[all …]
/linux/Documentation/devicetree/bindings/net/dsa/
H A Dqca8k.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - John Crispin <john@phrozen.org>
13 If the QCA8K switch is connect to an SoC's external mdio-bus, each subnode
16 ID. To declare the internal mdio-bus configuration, declare an MDIO node in
18 PHY it is connected to. In this config, an internal mdio-bus is registered and
19 the MDIO master is used for communication. Mixed external and internal
20 mdio-bus configurations are not supported by the hardware.
27 - enum:
[all …]

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