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Searched full:macroblock (Results 1 – 22 of 22) sorted by relevance

/linux/drivers/media/test-drivers/vicodec/
H A Dcodec-fwht.h22 * Each compressed plane consists of macroblocks and each macroblock
23 * is run-length-encoded. Each macroblock starts with a 16 bit value.
24 * Bit 15 indicates if this is a P-coded macroblock (1) or not (0).
27 * Bits 1-12 contain a number. If non-zero, then this same macroblock
31 * Following this macroblock header the MB coefficients are run-length
34 * that the remainder of the macroblock should be filled with zeroes.
H A Dcodec-fwht.c864 * When decoding each macroblock the rlco pointer will be increased in decode_plane()
/linux/drivers/media/platform/chips-media/coda/
H A Dcoda-gdi.c61 * RA[15:0], CA[15:8] are hardwired to contain the 24-bit macroblock
62 * start offset (macroblock size is 16x16 for luma, 16x8 for chroma).
H A Dcoda-bit.c1405 * If visible width or height are not aligned to macroblock in coda_start_encoding()
H A Dcoda-common.c1704 * macroblock tiling only works for to NV12 pixel format. in set_default_params()
/linux/drivers/media/platform/verisilicon/
H A Drockchip_vpu2_hw_jpeg_enc.c42 * The format width and height are already macroblock aligned in rockchip_vpu2_set_src_img_ctrl()
57 * from the right/bottom within the last macroblock. The offset from the in rockchip_vpu2_set_src_img_ctrl()
H A Dhantro_g1_vp8_dec.c38 /* Macroblock loop filter level adjustment regs */
268 /* Macroblock data aligned base addr */ in cfg_parts()
272 /* Macroblock data start bits */ in cfg_parts()
278 /* Macroblock aligned data length */ in cfg_parts()
H A Dhantro_h1_jpeg_enc.c25 * The format width and height are already macroblock aligned in hantro_h1_set_src_img_ctrl()
H A Drockchip_vpu2_hw_vp8_dec.c380 /* Macroblock data aligned base addr */ in cfg_parts()
/linux/Documentation/userspace-api/media/v4l/
H A Dext-ctrls-codec.rst1175 Cyclic intra macroblock refresh. This is the number of continuous
1207 Intra macroblock refresh period. This sets the period to refresh
1230 Macroblock level rate control enable. Applicable to the MPEG4 and
1348 pixels to search and match for the present Macroblock (MB) in the
1356 to search and match for the present Macroblock (MB) in the reference
1481 Enables flexible macroblock ordering in the encoded bitstream. It is
1759 macroblock level RC is enabled
1765 macroblock level RC is enabled
1771 macroblock level RC is enabled
1777 macroblock level RC is enabled
H A Dselection-api-vs-crop-api.rst28 macroblock and Bayer formats and mmap buffers.
H A Dpixfmt-reserved.rst269 one to decide which macroblock's data is changed, and only the changed
H A Ddev-encoder.rst364 video with a resolution that is not a multiple of a macroblock,
366 buffers to be aligned to 1920x1088 for codecs with 16x16 macroblock
H A Dpixfmt-yuv-planar.rst226 .. [3] Macroblock size in pixels
383 Semi-planar YUV 4:2:0 formats, using macroblock tiling. The chroma plane is
409 V4L2_PIX_FMT_NV12MT macroblock Z shape memory layout
/linux/Documentation/devicetree/bindings/media/
H A Dnvidia,tegra-vde.yaml99 <0x6001c000 0x100>, /* Macroblock Engine */
/linux/drivers/staging/media/sunxi/cedrus/
H A Dcedrus_mpeg2.c160 /* Macroblock address: start at the beginning. */ in cedrus_mpeg2_setup()
H A Dcedrus_regs.h26 * * MB: Macroblock
/linux/drivers/staging/media/meson/vdec/
H A Dcodec_h264.c38 /* Size of Motion Vector per macroblock */
340 /* Number of macroblock lines */ in codec_h264_src_change()
/linux/drivers/media/platform/samsung/s5p-mfc/
H A Ds5p_mfc_opr_v5.c826 /* macroblock level rate control */ in s5p_mfc_set_enc_params_h264()
848 /* macroblock adaptive scaling features */ in s5p_mfc_set_enc_params_h264()
/linux/drivers/media/platform/st/sti/hva/
H A Dhva-h264.c275 * @max_air_intra_mb_nb: Maximum number of intra macroblock in a frame
/linux/arch/arm/boot/dts/nvidia/
H A Dtegra114.dtsi336 <0x6001c000 0x100>, /* Macroblock Engine */
/linux/drivers/media/platform/allegro-dvt/
H A Dallegro-core.c3444 * up the width and height to macroblock alignment and does not in allegro_try_fmt_vid_out()