Home
last modified time | relevance | path

Searched full:mx8mq (Results 1 – 25 of 28) sorted by relevance

12

/linux/tools/perf/pmu-events/arch/arm64/freescale/imx8mq/sys/
H A Dddrc.json7 "Compat": "i.MX8MQ"
14 "Compat": "i.MX8MQ"
21 "Compat": "i.MX8MQ"
28 "Compat": "i.MX8MQ"
35 "Compat": "i.MX8MQ"
H A Dmetrics.json8 "Compat": "i.MX8MQ"
16 "Compat": "i.MX8MQ"
/linux/drivers/gpu/drm/imx/dcss/
H A DKconfig2 tristate "i.MX8MQ DCSS"
12 Choose this if you have a NXP i.MX8MQ based system and want to use the
H A Ddcss-drv.c127 MODULE_DESCRIPTION("DCSS driver for i.MX8MQ");
/linux/Documentation/devicetree/bindings/soc/imx/
H A Dfsl,imx8mq-vpu-blk-ctrl.yaml7 title: NXP i.MX8MQ VPU blk-ctrl
13 The i.MX8MQ VPU blk-ctrl is a top-level peripheral providing access to
/linux/drivers/media/platform/nxp/
H A DKconfig21 tristate "NXP i.MX8MQ MIPI CSI-2 receiver"
28 Video4Linux2 driver for the MIPI CSI-2 receiver found on the i.MX8MQ
H A Dimx8mq-mipi-csi2.c3 * NXP i.MX8MQ SoC series MIPI-CSI2 receiver driver
45 /* i.MX8MQ CSI-2 controller CSR */
966 MODULE_DESCRIPTION("i.MX8MQ MIPI CSI-2 receiver driver");
/linux/Documentation/devicetree/bindings/media/
H A Dnxp,imx8mq-mipi-csi2.yaml7 title: NXP i.MX8MQ MIPI CSI-2 receiver
14 NXP i.MX8MQ SoC. It handles the sensor/image input and process for all the
H A Dnxp,imx8mq-vpu.yaml14 Hantro G1/G2 video decode accelerators present on i.MX8MQ SoCs.
/linux/drivers/interconnect/imx/
H A DKconfig16 tristate "i.MX8MQ interconnect driver"
/linux/Documentation/devicetree/bindings/arm/
H A Dfsl.yaml1215 - description: i.MX8MQ based Boards
1218 - boundary,imx8mq-nitrogen8m # i.MX8MQ NITROGEN Board
1219 - boundary,imx8mq-nitrogen8m-som # i.MX8MQ NITROGEN SoM
1220 - einfochips,imx8mq-thor96 # i.MX8MQ Thor96 Board
1221 - fsl,imx8mq-evk # i.MX8MQ EVK Board
1229 - description: i.MX8MQ NITROGEN SoM based Boards
1232 - const: boundary,imx8mq-nitrogen8m-som # i.MX8MQ NITROGEN SoM
1245 TQMa8Mx is a series of SOM featuring NXP i.MX8MQ system-on-chip
1249 - tq,imx8mq-tqma8mq-mba8mx # TQ-Systems GmbH i.MX8MQ TQMa8Mx SOM on MBa8Mx
1250 - const: tq,imx8mq-tqma8mq # TQ-Systems GmbH i.MX8MQ TQMa8Mx SOM
/linux/Documentation/devicetree/bindings/reset/
H A Dfsl,imx7-src.yaml20 <dt-bindings/reset/imx8mq-reset.h> for i.MX8MQ, i.MX8MM and i.MX8MN,
/linux/drivers/clk/imx/
H A DKconfig93 Build the driver for i.MX8MQ CCM Clock Driver
/linux/Documentation/devicetree/bindings/nvmem/
H A Dimx-ocotp.yaml17 i.MX7D/S, i.MX7ULP, i.MX8MQ, i.MX8MM, i.MX8MN i.MX8MP and i.MX93/5 SoCs.
/linux/Documentation/devicetree/bindings/phy/
H A Dfsl,imx8mq-usb-phy.yaml7 title: Freescale i.MX8MQ USB3 PHY
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mq-hummingboard-pulse.dts12 model = "SolidRun i.MX8MQ HummingBoard Pulse";
H A Dimx8mq-nitrogen-som.dtsi10 model = "Boundary Devices i.MX8MQ Nitrogen8M";
H A Dimx8mq-tqma8mq-mba8mx.dts12 model = "TQ-Systems GmbH i.MX8MQ TQMa8MQ on MBa8Mx";
H A Dimx8mq-tqma8mq.dtsi9 model = "TQ-Systems GmbH i.MX8MQ TQMa8MQ";
H A Dimx8mq-phanbell.dts12 model = "Google i.MX8MQ Phanbell";
H A Dimx8mq-thor96.dts12 model = "Einfochips i.MX8MQ Thor96";
H A Dimx8mq-nitrogen.dts12 model = "Boundary Devices i.MX8MQ Nitrogen8M";
/linux/drivers/pinctrl/freescale/
H A Dpinctrl-imx8mq.c357 MODULE_DESCRIPTION("NXP i.MX8MQ pinctrl driver");
/linux/drivers/gpu/drm/bridge/
H A Dnwl-dsi.c39 /* i.MX8MQ errata E11418 */
100 * hardware bug: the i.MX8MQ needs this clock on during reset
1141 { .soc_id = "i.MX8MQ", .revision = "2.0",
/linux/drivers/net/ethernet/freescale/
H A Dfec.h492 /* i.MX8MQ ENET IP version add new feature to support IEEE 802.3az EEE
505 /* i.MX8MQ SoC integration mix wakeup interrupt signal into "int2" interrupt line. */

12