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/linux/tools/perf/pmu-events/arch/arm64/freescale/imx8mp/sys/
H A Dmetrics.json8 "Compat": "i.MX8MP"
16 "Compat": "i.MX8MP"
24 "Compat": "i.MX8MP"
32 "Compat": "i.MX8MP"
40 "Compat": "i.MX8MP"
48 "Compat": "i.MX8MP"
56 "Compat": "i.MX8MP"
64 "Compat": "i.MX8MP"
72 "Compat": "i.MX8MP"
80 "Compat": "i.MX8MP"
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H A Dddrc.json7 "Compat": "i.MX8MP"
14 "Compat": "i.MX8MP"
21 "Compat": "i.MX8MP"
28 "Compat": "i.MX8MP"
35 "Compat": "i.MX8MP"
/linux/Documentation/devicetree/bindings/arm/
H A Dfsl.yaml1084 - description: i.MX8MP based Boards
1087 - beacon,imx8mp-beacon-kit # i.MX8MP Beacon Development Kit
1088 - dmo,imx8mp-data-modul-edm-sbc # i.MX8MP eDM SBC
1089 - emcraft,imx8mp-navqp # i.MX8MP Emcraft Systems NavQ+ Kit
1090 - fsl,imx8mp-evk # i.MX8MP EVK Board
1091 - fsl,imx8mp-evk-revb4 # i.MX8MP EVK Rev B4 Board
1092 - gateworks,imx8mp-gw71xx-2x # i.MX8MP Gateworks Board
1093 - gateworks,imx8mp-gw72xx-2x # i.MX8MP Gateworks Board
1094 - gateworks,imx8mp-gw73xx-2x # i.MX8MP Gateworks Board
1095 - gateworks,imx8mp-gw74xx # i.MX8MP Gateworks Board
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/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mp-var-som-symphony.dts10 compatible = "variscite,var-som-mx8mp-symphony", "variscite,var-som-mx8mp", "fsl,imx8mp";
H A Dimx8mp-icore-mx8mp-edimm2.2.dts11 #include "imx8mp-icore-mx8mp.dtsi"
16 compatible = "engicam,icore-mx8mp-edimm2.2", "engicam,icore-mx8mp",
H A Dimx8mp-venice-gw71xx-2x.dts13 model = "Gateworks Venice GW71xx-2x i.MX8MP Development Kit";
H A Dimx8mp-venice-gw73xx-2x.dts13 model = "Gateworks Venice GW73xx-2x i.MX8MP Development Kit";
H A Dimx8mp-venice-gw72xx-2x.dts13 model = "Gateworks Venice GW72xx-2x i.MX8MP Development Kit";
H A Dimx8mp-venice-gw75xx-2x.dts13 model = "Gateworks Venice GW75xx-2x i.MX8MP Development Kit";
H A Dimx8mp-icore-mx8mp.dtsi9 compatible = "engicam,icore-mx8mp", "fsl,imx8mp";
/linux/Documentation/devicetree/bindings/display/imx/
H A Dfsl,imx8mp-hdmi-pvi.yaml7 title: Freescale i.MX8MP HDMI Parallel Video Interface
14 i.MX8MP SoC, that sits between the video source and the HDMI TX controller.
/linux/Documentation/devicetree/bindings/soc/imx/
H A Dfsl,imx8mp-hsio-blk-ctrl.yaml7 title: NXP i.MX8MP HSIO blk-ctrl
13 The i.MX8MP HSIO blk-ctrl is a top-level peripheral providing access to
H A Dfsl,imx8mp-hdmi-blk-ctrl.yaml7 title: NXP i.MX8MP HDMI blk-ctrl
13 The i.MX8MP HDMMI blk-ctrl is a top-level peripheral providing access to
H A Dfsl,imx8mp-media-blk-ctrl.yaml7 title: NXP i.MX8MP Media Block Control
13 The i.MX8MP Media Block Control (MEDIA BLK_CTRL) is a top-level peripheral
/linux/Documentation/devicetree/bindings/nvmem/
H A Dimx-ocotp.yaml17 i.MX7D/S, i.MX7ULP, i.MX8MQ, i.MX8MM, i.MX8MN i.MX8MP and i.MX93/5 SoCs.
44 # i.MX8MP not really compatible with fsl,imx8mm-ocotp, however
/linux/Documentation/devicetree/bindings/display/bridge/
H A Dfsl,ldb.yaml7 title: Freescale i.MX8MP DPI to LVDS bridge chip
13 The i.MX8MP mediamix contains two registers which are responsible
/linux/drivers/interconnect/imx/
H A DKconfig20 tristate "i.MX8MP interconnect driver"
/linux/drivers/gpu/drm/mxsfb/
H A Dlcdif_drv.h5 * i.MX8MP/i.MXRT LCDIFv3 LCD controller driver.
/linux/Documentation/devicetree/bindings/media/
H A Dnxp,dw100.yaml7 title: NXP i.MX8MP DW100 Dewarper core
/linux/Documentation/devicetree/bindings/reset/
H A Dfsl,imx7-src.yaml21 <dt-bindings/reset/imx8mp-reset.h> for i.MX8MP.
/linux/drivers/clk/imx/
H A DKconfig86 Build the driver for i.MX8MP CCM Clock Driver
/linux/drivers/reset/
H A DKconfig116 tristate "i.MX8MP AudioMix Reset Driver"
121 This enables the reset controller driver for i.MX8MP AudioMix
/linux/drivers/media/platform/nxp/imx8-isi/
H A Dimx8-isi-gasket.c13 * i.MX8MN and i.MX8MP gasket
/linux/drivers/gpu/drm/bridge/imx/
H A Dimx8mp-hdmi-tx.c157 MODULE_DESCRIPTION("i.MX8MP HDMI encoder driver");
/linux/Documentation/userspace-api/media/drivers/
H A Ddw100.rst6 The Vivante DW100 Dewarp Processor IP core found on i.MX8MP SoC applies a

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