Searched full:mx7 (Results 1 – 23 of 23) sorted by relevance
/linux/drivers/media/platform/nxp/ |
H A D | Kconfig | 18 is found in the i.MX6UL/L, i.MX7 and i.MX8M[MQ] SoCs. 32 tristate "NXP MIPI CSI-2 CSIS receiver found on i.MX7 and i.MX8 models" 40 v3.3/v3.6.3 found on some i.MX7 and i.MX8 SoCs.
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H A D | imx-mipi-csis.c | 5 * The Samsung CSIS IP is a MIPI CSI-2 receiver found in various NXP i.MX7 and 6 * i.MX8 SoCs. The i.MX7 features version 3.3 of the IP, while i.MX8 features 1583 MODULE_DESCRIPTION("i.MX7 & i.MX8 MIPI CSI-2 receiver driver");
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/linux/arch/arm/mach-imx/ |
H A D | Kconfig | 201 bool "i.MX7 Dual support" 206 This enables support for Freescale i.MX7 Dual processor. 214 This enables support for Freescale i.MX7 Ultra Low Power processor.
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H A D | mach-imx7d-cm4.c | 15 DT_MACHINE_START(IMX7D, "Freescale i.MX7 Dual Cortex-M4 (Device Tree)")
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H A D | mach-imx7d.c | 82 DT_MACHINE_START(IMX7D, "Freescale i.MX7 Dual (Device Tree)")
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/linux/Documentation/devicetree/bindings/clock/ |
H A D | imx7d-clock.yaml | 7 title: Freescale i.MX7 Dual Clock Controller 15 for the full list of i.MX7 Dual clock IDs.
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/linux/Documentation/devicetree/bindings/reset/ |
H A D | fsl,imx7-src.yaml | 7 title: Freescale i.MX7 System Reset Controller 19 <dt-bindings/reset/imx7-reset.h> for i.MX7,
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/linux/Documentation/devicetree/bindings/media/ |
H A D | nxp,imx-mipi-csi2.yaml | 7 title: NXP i.MX7 and i.MX8 MIPI CSI-2 receiver 14 The NXP i.MX7 and i.MX8 families contain SoCs that include a MIPI CSI-2 16 compatible with some of the Exynos4 and S5P SoCs. i.MX7 SoCs use CSIS version
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H A D | nxp,imx7-csi.yaml | 7 title: i.MX7 and i.MX8 CSI bridge (CMOS Sensor Interface)
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H A D | fsl,imx6ull-pxp.yaml | 18 i.MX SoCs from i.MX23 to i.MX7.
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/linux/Documentation/admin-guide/media/ |
H A D | imx7.rst | 3 i.MX7 Video Capture Driver 9 The i.MX7 contrary to the i.MX5/6 family does not contain an Image Processing 13 For image capture the i.MX7 has three units: 30 For additional information, please refer to the latest versions of the i.MX7
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/linux/arch/arm/boot/dts/nxp/imx/ |
H A D | imx7d-sdb-reva.dts | 10 model = "Freescale i.MX7 SabreSD RevA Board";
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H A D | imx7s-warp.dts | 13 model = "Element14 Warp i.MX7 Board";
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H A D | imx7d-nitrogen7.dts | 11 model = "Boundary Devices i.MX7 Nitrogen7 Board";
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H A D | imx7d-sdb.dts | 10 model = "Freescale i.MX7 SabreSD Board";
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/linux/drivers/nvmem/ |
H A D | imx-ocotp.c | 359 * In banked/i.MX7 mode the OTP register bank goes into waddr in imx_ocotp_write() 399 * Note: on i.MX7 there are four data fields to write for banked write in imx_ocotp_write() 405 /* Banked/i.MX7 mode */ in imx_ocotp_write() 640 MODULE_DESCRIPTION("i.MX6/i.MX7 OCOTP fuse box driver");
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H A D | snvs_lpgpr.c | 156 MODULE_DESCRIPTION("Low Power General Purpose Register in i.MX6 and i.MX7 Secure Non-Volatile Stora…
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/linux/drivers/reset/ |
H A D | Kconfig | 100 tristate "i.MX7/8 Reset Driver" 106 This enables the reset controller driver for i.MX7 SoCs.
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H A D | reset-imx7.c | 5 * i.MX7 System Reset Controller (SRC) driver 406 MODULE_DESCRIPTION("NXP i.MX7 reset driver");
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/linux/drivers/cpufreq/ |
H A D | Kconfig.arm | 105 This adds cpufreq driver support for Freescale i.MX7/i.MX8M
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/linux/Documentation/devicetree/bindings/arm/ |
H A D | fsl.yaml | 858 - element14,imx7s-warp # Element14 Warp i.MX7 Board 883 - fsl,imx7d-sdb # i.MX7 SabreSD Board 884 - fsl,imx7d-sdb-reva # i.MX7 SabreSD Rev-A Board 887 - novtech,imx7d-meerkat96 # i.MX7 Meerkat96 Board 908 Freescale i.MX7 system-on-chip. SBC-iMX7 is implemented with
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/linux/drivers/crypto/caam/ |
H A D | ctrl.c | 573 { .soc_id = "i.MX7*", .data = &caam_imx7_data },
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/linux/drivers/mtd/nand/raw/gpmi-nand/ |
H A D | gpmi-nand.c | 934 * during the change of the divide factor on i.MX6Q/UL/SX. On i.MX7/8, in gpmi_nfc_apply_timings()
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