Searched full:mx6ull (Results 1 – 19 of 19) sorted by relevance
/linux/Documentation/devicetree/bindings/arm/ |
H A D | fsl.yaml | 726 - description: i.MX6ULL based Boards 731 - kontron,sl-imx6ull # Kontron SL i.MX6ULL SoM 739 - description: i.MX6ULL Armadeus Systems OPOS6ULDev Board 741 - const: armadeus,imx6ull-opos6uldev # OPOS6UL (i.MX6ULL) SoM on OPOS6ULDev board 742 - const: armadeus,imx6ull-opos6ul # OPOS6UL (i.MX6ULL) SoM 745 - description: i.MX6ULL chargebyte Tarragon Boards 754 - description: i.MX6ULL DHCOM SoM based Boards 764 - description: i.MX6ULL DHCOR SoM based Boards 770 - description: i.MX6ULL PHYTEC phyBOARD-Segin 779 - description: i.MX6ULL PHYTEC phyGATE-Tauri [all …]
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/linux/arch/arm/boot/dts/nxp/imx/ |
H A D | imx6ull-dhcom-drc02.dts | 17 model = "DH electronics i.MX6ULL DHCOM on DRC02"; 55 * GPIO line, however the i.MX6ULL UART driver assumes RX happens
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H A D | imx6ull-pinfunc.h | 14 /* signals common for i.MX6UL and i.MX6ULL */ 26 /* signals for i.MX6ULL only */
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H A D | imx6ull-kontron-sl.dtsi | 11 model = "Kontron SL i.MX6ULL (N641X SOM)";
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H A D | imx6ull-kontron-bl.dts | 13 model = "Kontron BL i.MX6ULL (N641X S)";
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H A D | imx6ull-myir-mys-6ulx-eval.dts | 12 model = "MYiR i.MX6ULL MYS-6ULX Single Board Computer with NAND";
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H A D | imx6ull-opos6uldev.dts | 10 model = "Armadeus Systems OPOS6UL SoM (i.MX6ULL) on OPOS6ULDev board";
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H A D | imx6ull-dhcom-picoitx.dts | 17 model = "DH electronics i.MX6ULL DHCOM on PicoITX";
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H A D | imx6ull-dhcom-pdk2.dts | 16 model = "DH electronics i.MX6ULL DHCOM on Premium Developer Kit (2)";
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H A D | imx6ull-dhcor-som.dtsi | 33 * environment, set the maximum frequency for each DHCOM i.MX6ULL
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H A D | imx6ull-dhcor-maveo-box.dts | 17 model = "DH electronics i.MX6ULL DHCOR on maveo box";
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/linux/arch/arm/mach-imx/ |
H A D | mach-imx6ul.c | 15 imx_print_silicon_rev(cpu_is_imx6ull() ? "i.MX6ULL" : "i.MX6UL", in imx6ul_init_machine()
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/linux/Documentation/devicetree/bindings/nvmem/ |
H A D | imx-ocotp.yaml | 16 i.MX6Q/D, i.MX6DL/S, i.MX6SL, i.MX6SX, i.MX6UL, i.MX6ULL/ULZ, i.MX6SLL,
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/linux/drivers/soc/imx/ |
H A D | soc-imx.c | 107 soc_id = "i.MX6ULL"; in imx_soc_device_init()
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/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | fsl,imx35-pinctrl.yaml | 122 i.MX6SLL/i.MX6SX/i.MX6UL/i.MX6ULL specific bits
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/linux/drivers/pinctrl/freescale/ |
H A D | pinctrl-imx6ul.c | 297 /* pad for i.MX6ULL lpsr pinmux */
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/linux/Documentation/admin-guide/media/ |
H A D | imx7.rst | 158 i.MX6ULL-EVK with OV5640
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/linux/Documentation/security/keys/ |
H A D | trusted-encrypted.rst | 159 so the kernel default RNG is used. SoCs with DCP like the i.MX6ULL do have
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/linux/drivers/clk/imx/ |
H A D | clk-imx6ul.c | 60 /* epdc_pre_sels, epdc_sels, esai_sels only exists on i.MX6ULL */
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