Searched full:msdc (Results 1 – 8 of 8) sorted by relevance
7 title: MTK MSDC Storage Host Controller61 Should at least contain MSDC GIC interrupt. To support SDIO in-band wakeup, an extended68 - const: msdc268 - description: msdc subsys clock gate334 - description: msdc subsys clock gate381 interrupt-names = "msdc", "sdio_wakeup";
61 .name = "clk-mt8192-msdc",
884 tristate "Clock driver for MediaTek MT8192 msdc"888 This driver supports MediaTek MT8192 msdc and msdc_top clocks.
135 obj-$(CONFIG_COMMON_CLK_MT8192_MSDC) += clk-mt8192-msdc.o
496 struct clk *src_clk; /* msdc source clock */497 struct clk *h_clk; /* msdc h_clk */499 struct clk *src_clk_cg; /* msdc source clock control gate */500 struct clk *sys_clk_cg; /* msdc subsys clock control gate */501 struct clk *crypto_clk; /* msdc crypto clock control gate */1932 /* Set low power DCM, use HCLK for GDMA, use MSDC CLK for everything else */ in msdc_init_hw()2470 * MSDC IP which supports data tune + async fifo can do CMD/DAT tune2729 * On MediaTek SoCs the MSDC controller's CQE uses msdc_hclk as ITCFVAL in msdc_cqe_cit_cal()3354 .name = "mtk-msdc",
412 /* MSDC */
812 /* MSDC */1353 PINCTRL_PIN_FUNCTION("msdc", mt7623_msdc),
506 interrupt-names = "msdc", "sdio_wakeup";