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/linux/Documentation/devicetree/bindings/mmc/
H A Dmtk-sd.yaml7 title: MTK MSDC Storage Host Controller
58 Should at least contain MSDC GIC interrupt. To support SDIO in-band wakeup, an extended
65 - const: msdc
256 - description: msdc subsys clock gate
300 - description: msdc subsys clock gate
347 interrupt-names = "msdc", "sdio_wakeup";
/linux/drivers/clk/mediatek/
H A DKconfig847 tristate "Clock driver for MediaTek MT8192 msdc"
851 This driver supports MediaTek MT8192 msdc and msdc_top clocks.
912 tristate "Clock driver for MediaTek MT8195 msdc"
917 msdc and msdc_top clocks.
H A Dclk-mt8192-msdc.c61 .name = "clk-mt8192-msdc",
H A DMakefile130 obj-$(CONFIG_COMMON_CLK_MT8192_MSDC) += clk-mt8192-msdc.o
/linux/drivers/mmc/host/
H A Dmtk-sd.c453 struct clk *src_clk; /* msdc source clock */
454 struct clk *h_clk; /* msdc h_clk */
456 struct clk *src_clk_cg; /* msdc source clock control gate */
457 struct clk *sys_clk_cg; /* msdc subsys clock control gate */
458 struct clk *crypto_clk; /* msdc crypto clock control gate */
2255 * MSDC IP which supports data tune + async fifo can do CMD/DAT tune
2512 * On MediaTek SoCs the MSDC controller's CQE uses msdc_hclk as ITCFVAL in msdc_cqe_cit_cal()
3117 .name = "mtk-msdc",
/linux/include/dt-bindings/clock/
H A Dmt8192-clk.h412 /* MSDC */
/linux/drivers/pinctrl/mediatek/
H A Dpinctrl-mt7623.c812 /* MSDC */
1353 PINCTRL_PIN_FUNCTION("msdc", mt7623_msdc),
/linux/fs/ceph/
H A Dsuper.h402 * or msdc->cap_dirty_lock. List presence can also be checked while
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8186-corsola.dtsi505 interrupt-names = "msdc", "sdio_wakeup";