Searched full:mpidr_el1 (Results 1 – 7 of 7) sorted by relevance
| /linux/arch/arm64/kernel/ |
| H A D | sleep.S | 10 * Implementation of MPIDR_EL1 hash algorithm through shifting
18 * @mpidr: register containing MPIDR_EL1 value
79 mrs x7, mpidr_el1
120 mrs x1, mpidr_el1
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| /linux/tools/arch/arm64/include/asm/ |
| H A D | cputype.h | 328 return read_cpuid(MPIDR_EL1); in read_cpuid_mpidr()
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| /linux/drivers/perf/hisilicon/ |
| H A D | hisi_uncore_sllc_pmu.c | 339 * while SCCL_ID is from MPIDR_EL1 by CPU. in hisi_sllc_pmu_init_data()
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| H A D | hisi_uncore_pmu.c | 439 * determined from the MPIDR_EL1, but the encoding varies by CPU:
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| /linux/tools/testing/selftests/kvm/arm64/ |
| H A D | vgic_init.c | 832 /* Assume MPIDR_EL1.Aff*=0 */ in test_sysreg_array()
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| H A D | get-reg-list.c | 441 ARM64_SYS_REG(3, 0, 0, 0, 5), /* MPIDR_EL1 */
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| /linux/arch/arm64/include/asm/ |
| H A D | sysreg.h | 965 /* Safe value for MPIDR_EL1: Bit31:RES1, Bit30:U:0, Bit24:MT:0 */
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