/linux/Documentation/devicetree/bindings/iommu/ |
H A D | samsung,sysmmu.yaml | 13 Samsung's Exynos architecture contains System MMUs that enables scattered 23 System MMUs are in many to one relation with peripheral devices, i.e. single 24 peripheral device might have multiple System MMUs (usually one for each bus 30 MMUs.
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H A D | ti,omap-iommu.txt | 28 instance number should be 0 for DSP MDMA MMUs and 1 for 29 DSP EDMA MMUs. 42 /* DRA74x DSP2 MMUs */
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/linux/Documentation/arch/powerpc/ |
H A D | kasan.txt | 6 KASAN is supported on both hash and nohash MMUs on 32-bit.
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/linux/Documentation/translations/zh_TW/arch/arm/ |
H A D | Booting | 164 - 緩存,MMUs
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/linux/Documentation/translations/zh_CN/arch/arm/ |
H A D | Booting | 164 - 缓存,MMUs
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/linux/arch/powerpc/mm/book3s64/ |
H A D | hugetlbpage.c | 3 * PPC64 Huge TLB Page Support for hash based MMUs (POWER4 and later)
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H A D | hash_hugepage.c | 16 * PPC64 THP Support for hash based MMUs
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/linux/arch/sh/include/asm/ |
H A D | pgtable_32.h | 9 * notes on SH-X2 MMUs and 64-bit PTEs): 30 * SH-X2 MMUs and extended PTEs
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/linux/arch/x86/kvm/mmu/ |
H A D | spte.h | 173 * enabled, KVM uses A/D bits for all non-nested MMUs. Because L1 can disable 195 * SPTEs in MMUs without A/D bits are marked with SPTE_TDP_AD_DISABLED;
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H A D | mmu.c | 661 * For direct MMUs (e.g. TDP or non-paging guests) or passthrough SPs, in kvm_mmu_page_get_access() 665 * For direct SPs in indirect MMUs (shadow paging), i.e. when KVM in kvm_mmu_page_get_access() 3328 * mechanism only supports direct MMUs. in page_fault_can_be_fast() 3455 * direct MMUs, nested MMUs are always indirect, and KVM always in fast_page_fault() 3456 * uses A/D bits for non-nested MMUs. Thus, if A/D bits are in fast_page_fault() 3703 /* root.pgd is ignored for direct MMUs. */ in mmu_alloc_direct_roots() 3910 * of levels for the shadow page tables, e.g. all MMUs are 4-level or in mmu_alloc_special_roots() 3911 * all MMus are 5-level. Thus, this can safely require that pml5_root in mmu_alloc_special_roots() 6032 * For indirect MMUs, i.e. if KVM is shadowing the current MMU, try to in kvm_mmu_write_protect_fault() 6071 * this wrong for nested MMUs as the GPA is an L2 GPA, but KVM doesn't in kvm_mmu_page_fault() [all …]
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/linux/drivers/media/pci/intel/ipu6/ |
H A D | ipu6-mmu.c | 68 * MMUs on successive invalidate calls, we need to first do a in tlb_invalidate() 70 * register. MMUs which need to implement this WA, will have in tlb_invalidate()
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H A D | ipu6.h | 176 * In some of the IPU6 MMUs, there is provision to configure L1 and L2 page
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/linux/Documentation/arch/arm/ |
H A D | booting.rst | 213 - Caches, MMUs
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/linux/Documentation/devicetree/bindings/remoteproc/ |
H A D | ti,omap-remoteproc.yaml | 59 and need the same programming in both the MMUs.
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/linux/tools/testing/selftests/kvm/ |
H A D | max_guest_memory_test.c |
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H A D | mmu_stress_test.c | 301 /* All KVM MMUs should be able to survive a 128gb guest. */ in main()
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/linux/drivers/gpu/drm/nouveau/ |
H A D | nouveau_drm.c | 728 mmus[] = { in nouveau_drm_device_new() local 773 ret = nvif_mclass(&drm->device.object, mmus); in nouveau_drm_device_new() 779 ret = nvif_mmu_ctor(&drm->device.object, "drmMmu", mmus[ret].oclass, &drm->mmu); in nouveau_drm_device_new()
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/linux/drivers/scsi/sym53c8xx_2/ |
H A D | sym_malloc.c | 45 * with IO MMUs for PCI.
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/linux/Documentation/ABI/testing/ |
H A D | debugfs-driver-habanalabs | 227 all MMUs specified in mmu_cap_mask.
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/linux/arch/xtensa/include/asm/ |
H A D | pgtable.h | 200 * On certain configurations of Xtensa MMUs (eg. the initial Linux config),
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/linux/arch/arm64/kvm/ |
H A D | nested.c | 25 * the guests. Running out of S2 MMUs only affects performance (we 631 BUG_ON(atomic_read(&s2_mmu->refcnt)); /* We have struct MMUs to spare */ in get_s2_mmu_nested()
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/linux/arch/xtensa/ |
H A D | Kconfig | 630 For region protection MMUs:
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/linux/Documentation/mm/ |
H A D | hmm.rst | 319 device's MMUs with the ``mmu_notifier_invalidate_range_start(()`` and
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/linux/arch/powerpc/kernel/ |
H A D | head_85xx.S | 345 * The Book E MMUs are always on so we don't need to handle
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H A D | head_44x.S | 235 * The Book E MMUs are always on so we don't need to handle
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