Searched +full:mii +full:- +full:g +full:- +full:rt (Results 1 – 8 of 8) sorted by relevance
| /linux/Documentation/devicetree/bindings/net/ |
| H A D | ti,icssg-prueth.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/ti,icssg-prueth.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Md Danish Anwar <danishanwar@ti.com> 13 Ethernet based on the Programmable Real-Time Unit and Industrial 19 - ti,am642-icssg-prueth # for AM64x SoC family 20 - ti,am654-icssg-prueth # for AM65x SoC family 21 - ti,am654-sr1-icssg-prueth # for AM65x SoC family, SR1.0 32 dma-names: [all …]
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| /linux/arch/arm64/boot/dts/ti/ |
| H A D | k3-am654-idk.dtso | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2018-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/net/ti-dp83867.h> 13 #include "k3-pinctrl.h" 17 ethernet3 = "/icssg0-eth/ethernet-ports/port@0"; 18 ethernet4 = "/icssg0-eth/ethernet-ports/port@1"; 19 ethernet5 = "/icssg1-eth/ethernet-ports/port@0"; 20 ethernet6 = "/icssg1-eth/ethernet-ports/port@1"; [all …]
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| H A D | k3-am65-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/ 7 #include <dt-bindings/phy/phy-am654-serdes.h> 11 compatible = "mmio-sram"; 13 #address-cells = <1>; 14 #size-cells = <1>; 17 atf-sram@0 { 21 sysfw-sram@f0000 { 25 l3cache-sram@100000 { 30 gic500: interrupt-controller@1800000 { [all …]
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| H A D | k3-am65-iot2050-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) Siemens AG, 2018-2024 12 #include <dt-bindings/leds/common.h> 13 #include <dt-bindings/phy/phy.h> 14 #include <dt-bindings/net/ti-dp83867.h> 36 stdout-path = "serial3:115200n8"; 39 reserved_memory: reserved-memory { 40 #address-cells = <2>; 41 #size-cells = <2>; 44 secure_ddr: secure-ddr@9e800000 { [all …]
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| H A D | k3-am642-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 6 /dts-v1/; 8 #include <dt-bindings/phy/phy.h> 9 #include <dt-bindings/leds/common.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/net/ti-dp83867.h> 12 #include "k3-am642.dtsi" 14 #include "k3-serdes.h" 17 compatible = "ti,am642-evm", "ti,am642"; [all …]
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| H A D | k3-am642-tqma64xxl-mbax4xxl.dts | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ 4 * Copyright (c) 2022-2024 TQ-Systems GmbH <linux@ew.tq-group.com>, D-82229 Seefeld, Germany. 7 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/leds/common.h> 12 #include <dt-bindings/net/ti-dp83867.h> 13 #include <dt-bindings/phy/phy.h> 14 #include <dt-bindings/pwm/pwm.h> [all …]
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| /linux/drivers/net/bonding/ |
| H A D | bond_main.c | 1 // SPDX-License-Identifier: GPL-1.0+ 72 #include <linux/mii.h> 98 /*---------------------------- Module parameters ----------------------------*/ 147 MODULE_PARM_DESC(mode, "Mode of operation; 0 for balance-rr, " 148 "1 for active-backup, 2 for balance-xor, " 149 "3 for broadcast, 4 for 802.3ad, 5 for balance-tlb, " 150 "6 for balance-alb"); 172 MODULE_PARM_DESC(xmit_hash_policy, "balance-alb, balance-tlb, balance-xor, 802.3ad hashing method; " 187 MODULE_PARM_DESC(fail_over_mac, "For active-backup, do not set all slaves to " 198 MODULE_PARM_DESC(packets_per_slave, "Packets to send per slave in balance-rr " [all …]
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| /linux/drivers/net/ethernet/sun/ |
| H A D | niu.c | 1 // SPDX-License-Identifier: GPL-2.0 13 #include <linux/dma-mapping.h> 20 #include <linux/mii.h> 55 #define niu_next_page(p) container_of(p, union niu_page, page)->next 91 #define nr64(reg) readq(np->regs + (reg)) 92 #define nw64(reg, val) writeq((val), np->regs + (reg)) 94 #define nr64_mac(reg) readq(np->mac_regs + (reg)) 95 #define nw64_mac(reg, val) writeq((val), np->mac_regs + (reg)) 97 #define nr64_ipp(reg) readq(np->regs + np->ipp_off + (reg)) 98 #define nw64_ipp(reg, val) writeq((val), np->regs + np->ipp_off + (reg)) [all …]
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