Home
last modified time | relevance | path

Searched full:mdp5 (Results 1 – 25 of 25) sorted by relevance

/linux/Documentation/devicetree/bindings/display/msm/
H A Dqcom,mdp5.yaml4 $id: http://devicetree.org/schemas/display/msm/qcom,mdp5.yaml#
7 title: Qualcomm Adreno/Snapdragon Mobile Display controller (MDP5)
10 MDP5 display controller found in SoCs like MSM8974, APQ8084, MSM8916, MSM8994
20 - const: qcom,mdp5
24 - qcom,apq8084-mdp5
25 - qcom,msm8226-mdp5
26 - qcom,msm8916-mdp5
27 - qcom,msm8917-mdp5
28 - qcom,msm8937-mdp5
29 - qcom,msm8953-mdp5
[all …]
H A Dqcom,mdss.yaml15 encapsulates sub-blocks like MDP5, DSI, HDMI, eDP, etc.
108 const: qcom,mdp5
183 compatible = "qcom,msm8916-mdp5", "qcom,mdp5";
/linux/drivers/gpu/drm/msm/
H A DMakefile58 disp/mdp5/mdp5_cfg.o \
59 disp/mdp5/mdp5_cmd_encoder.o \
60 disp/mdp5/mdp5_ctl.o \
61 disp/mdp5/mdp5_crtc.o \
62 disp/mdp5/mdp5_encoder.o \
63 disp/mdp5/mdp5_irq.o \
64 disp/mdp5/mdp5_kms.o \
65 disp/mdp5/mdp5_pipe.o \
66 disp/mdp5/mdp5_mixer.o \
67 disp/mdp5/mdp5_plane.o \
[all …]
H A DNOTES7 + MDP5 - snapdragon 800
49 For MDP5, the mapping is:
60 Also unlike MDP4, with MDP5 all the IRQs for other blocks (HDMI, DSI,
63 And finally, MDP5 has this "Shared Memory Pool" (called "SMP"), from
H A Dmsm_drv.c982 MODULE_PARM_DESC(prefer_mdp5, "Select whether MDP5 or DPU driver should be preferred");
985 /* list all platforms supported by both mdp5 and dpu drivers */
987 "qcom,msm8917-mdp5",
988 "qcom,msm8937-mdp5",
989 "qcom,msm8953-mdp5",
990 "qcom,msm8996-mdp5",
991 "qcom,sdm630-mdp5",
992 "qcom,sdm660-mdp5",
998 /* If it is not an MDP5 device, do not try MDP5 driver */ in msm_disp_drv_should_bind()
999 if (!of_device_is_compatible(dev->of_node, "qcom,mdp5")) in msm_disp_drv_should_bind()
[all …]
H A Dmsm_mdss.c236 * MDP5 platforms use generic qcom,mdp5 compat string, so we have to generate this data
280 * not readable. Fill data structure now for the MDP5 platforms. in msm_mdss_get_mdss_data()
315 * mdss on mdp5 hardware. Skip it for now. in msm_mdss_enable()
410 * MDP5 MDSS uses at most three specified clocks.
548 * MDP5/DPU based devices don't have a flat hierarchy. There is a top in mdss_probe()
549 * level parent: MDSS, and children: MDP5/DPU, DSI, HDMI, eDP etc. in mdss_probe()
550 * Populate the children devices, find the MDP5/DPU node, and then add in mdss_probe()
H A DKconfig84 bool "Enable MDP5 support in MSM DRM driver"
89 Compile in support for the Mobile Display Processor v5 (MDP5) in
H A Dmsm_io_utils.c157 * If the MDP5/DPU device node doesn't have interconnects, lookup the in msm_icc_get()
H A Dmsm_drv.h92 * shared by both mdp4 and mdp5..
96 /* DSI is shared by mdp4 and mdp5 */
/linux/drivers/gpu/drm/msm/disp/mdp5/
H A Dmdp5_kms.c33 * W MDP5:0x2e0 0xe9 (mdss_mdp.c:839) in mdp5_hw_init()
34 * W MDP5:0x2e4 0x55 (mdss_mdp.c:839) in mdp5_hw_init()
35 * W MDP5:0x3ac 0xc0000ccc (mdss_mdp.c:839) in mdp5_hw_init()
36 * W MDP5:0x3b4 0xc0000ccc (mdss_mdp.c:839) in mdp5_hw_init()
37 * W MDP5:0x3bc 0xcccccc (mdss_mdp.c:839) in mdp5_hw_init()
38 * W MDP5:0x4a8 0xcccc0c0 (mdss_mdp.c:839) in mdp5_hw_init()
39 * W MDP5:0x4b0 0xccccc0c0 (mdss_mdp.c:839) in mdp5_hw_init()
40 * W MDP5:0x4b8 0xccccc000 (mdss_mdp.c:839) in mdp5_hw_init()
401 * the MDP5 interfaces) than the number of layer mixers present in HW, in modeset_init()
474 DRM_DEV_INFO(dev, "MDP5 version v%d.%d", *major, *minor); in read_mdp_hw_revision()
[all …]
H A Dmdp5_kms.h13 #include "mdp5_cfg.h" /* must be included before mdp5.xml.h */
14 #include "mdp5.xml.h"
H A Dmdp5_pipe.h10 /* TODO: Add SSPP_MAX in mdp5.xml.h */
H A Dmdp5_cfg.h14 * This module configures the dynamic offsets used by mdp5.xml.h
H A Dmdp5_pipe.c36 * (1) mdp5 can have SMP (non-double-buffered) in mdp5_pipe_assign()
H A Dmdp5_cfg.c14 /* mdp5_cfg must be exposed (used in mdp5.xml.h) */
1485 DBG("MDP5: %s hw config selected", mdp5_cfg->name); in mdp5_cfg_init()
/linux/drivers/gpu/drm/msm/registers/display/
H A Dmsm.xml20 <import file="mdp5.xml"/>
H A Dmdp_common.xml8 <!-- random bits that seem same between mdp4 and mdp5 (ie. not much) -->
H A Dhdmi.xml682 seems to be all mdp5+ have same?
/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_kms.c1421 if (of_device_is_compatible(dpu_kms->pdev->dev.of_node, "qcom,mdp5")) in dpu_dev_probe()
1491 { .compatible = "qcom,msm8917-mdp5", .data = &dpu_msm8917_cfg, },
1492 { .compatible = "qcom,msm8937-mdp5", .data = &dpu_msm8937_cfg, },
1493 { .compatible = "qcom,msm8953-mdp5", .data = &dpu_msm8953_cfg, },
1494 { .compatible = "qcom,msm8996-mdp5", .data = &dpu_msm8996_cfg, },
1498 { .compatible = "qcom,sdm630-mdp5", .data = &dpu_sdm630_cfg, },
1499 { .compatible = "qcom,sdm660-mdp5", .data = &dpu_sdm660_cfg, },
/linux/drivers/gpu/drm/msm/disp/
H A Dmdp_kms.c35 /* if an mdp_irq's irqmask has changed, such as when mdp5 crtc<->encoder
/linux/drivers/gpu/drm/msm/hdmi/
H A Dhdmi_bridge.c281 /* for mdp5/apq8074, we manage our own pixel clk (as opposed to in msm_hdmi_bridge_mode_valid()
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-msm8226.dtsi1023 compatible = "qcom,msm8226-mdp5", "qcom,mdp5";
H A Dqcom-msm8974.dtsi1919 compatible = "qcom,msm8974-mdp5", "qcom,mdp5";
/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8976.dtsi879 compatible = "qcom,msm8976-mdp5", "qcom,mdp5";
H A Dmsm8953.dtsi870 compatible = "qcom,msm8953-mdp5", "qcom,mdp5";