| /linux/Documentation/devicetree/bindings/display/msm/ |
| H A D | qcom,mdp5.yaml | 4 $id: http://devicetree.org/schemas/display/msm/qcom,mdp5.yaml#
7 title: Qualcomm Adreno/Snapdragon Mobile Display controller (MDP5)
10 MDP5 display controller found in SoCs like MSM8974, APQ8084, MSM8916, MSM8994
20 - const: qcom,mdp5
24 - qcom,apq8084-mdp5
25 - qcom,msm8226-mdp5
26 - qcom,msm8916-mdp5
27 - qcom,msm8917-mdp5
28 - qcom,msm8937-mdp5
29 - qcom,msm8953-mdp5
[all …]
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| /linux/drivers/gpu/drm/msm/ |
| H A D | NOTES | 7 + MDP5 - snapdragon 800
49 For MDP5, the mapping is:
60 Also unlike MDP4, with MDP5 all the IRQs for other blocks (HDMI, DSI,
63 And finally, MDP5 has this "Shared Memory Pool" (called "SMP"), from
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| H A D | msm_mdss.c | 269 * mdss on mdp5 hardware. Skip it for now. in msm_mdss_enable()
367 * MDP5 MDSS uses at most three specified clocks.
514 * MDP5/DPU based devices don't have a flat hierarchy. There is a top in mdss_probe()
515 * level parent: MDSS, and children: MDP5/DPU, DSI, HDMI, eDP etc. in mdss_probe()
516 * Populate the children devices, find the MDP5/DPU node, and then add in mdss_probe()
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| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | sdm660.dtsi | 145 compatible = "qcom,sdm660-mdp5", "qcom,mdp5";
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| H A D | msm8917.dtsi | 1011 compatible = "qcom,msm8917-mdp5", "qcom,mdp5";
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| H A D | msm8976.dtsi | 916 compatible = "qcom,msm8976-mdp5", "qcom,mdp5";
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| H A D | sdm630.dtsi | 1587 compatible = "qcom,sdm630-mdp5", "qcom,mdp5";
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| /linux/drivers/gpu/drm/msm/registers/display/ |
| H A D | msm.xml | 20 <import file="mdp5.xml"/>
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| H A D | mdp_common.xml | 8 <!-- random bits that seem same between mdp4 and mdp5 (ie. not much) -->
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| /linux/drivers/gpu/drm/msm/disp/mdp5/ |
| H A D | mdp5_pipe.h | 10 /* TODO: Add SSPP_MAX in mdp5.xml.h */
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| H A D | mdp5_kms.h | 13 #include "mdp5_cfg.h" /* must be included before mdp5.xml.h */
14 #include "mdp5.xml.h"
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| H A D | mdp5_cfg.h | 14 * This module configures the dynamic offsets used by mdp5.xml.h
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| H A D | mdp5_pipe.c | 36 * (1) mdp5 can have SMP (non-double-buffered) in mdp5_pipe_assign()
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| H A D | mdp5_cfg.c | 14 /* mdp5_cfg must be exposed (used in mdp5.xml.h) */
1485 DBG("MDP5: %s hw config selected", mdp5_cfg->name); in mdp5_cfg_init()
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| /linux/drivers/gpu/drm/msm/disp/dpu1/ |
| H A D | dpu_kms.c | 1438 if (of_device_is_compatible(dpu_kms->pdev->dev.of_node, "qcom,mdp5")) in dpu_dev_probe()
1508 { .compatible = "qcom,msm8917-mdp5", .data = &dpu_msm8917_cfg, },
1509 { .compatible = "qcom,msm8937-mdp5", .data = &dpu_msm8937_cfg, },
1510 { .compatible = "qcom,msm8953-mdp5", .data = &dpu_msm8953_cfg, },
1511 { .compatible = "qcom,msm8996-mdp5", .data = &dpu_msm8996_cfg, },
1516 { .compatible = "qcom,sdm630-mdp5", .data = &dpu_sdm630_cfg, },
1517 { .compatible = "qcom,sdm660-mdp5", .data = &dpu_sdm660_cfg, },
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| /linux/drivers/gpu/drm/msm/disp/ |
| H A D | mdp_kms.c | 35 /* if an mdp_irq's irqmask has changed, such as when mdp5 crtc<->encoder
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| /linux/drivers/gpu/drm/msm/hdmi/ |
| H A D | hdmi_bridge.c | 433 /* for mdp5/apq8074, we manage our own pixel clk (as opposed to in msm_hdmi_bridge_tmds_char_rate_valid()
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| /linux/arch/arm/boot/dts/qcom/ |
| H A D | qcom-msm8226.dtsi | 1179 compatible = "qcom,msm8226-mdp5", "qcom,mdp5";
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| H A D | qcom-msm8974.dtsi | 1920 compatible = "qcom,msm8974-mdp5", "qcom,mdp5";
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