| /linux/drivers/dma/ |
| H A D | img-mdc-dma.c | 117 struct mdc_dma *mdma; member
148 static inline u32 mdc_readl(struct mdc_dma *mdma, u32 reg) in mdc_readl() argument
150 return readl(mdma->regs + reg); in mdc_readl()
153 static inline void mdc_writel(struct mdc_dma *mdma, u32 val, u32 reg) in mdc_writel() argument
155 writel(val, mdma->regs + reg); in mdc_writel()
160 return mdc_readl(mchan->mdma, mchan->chan_nr * 0x040 + reg); in mdc_chan_readl()
165 mdc_writel(mchan->mdma, val, mchan->chan_nr * 0x040 + reg); in mdc_chan_writel()
180 static inline struct device *mdma2dev(struct mdc_dma *mdma) in mdma2dev() argument
182 return mdma->dma_dev.dev; in mdma2dev()
209 struct mdc_dma *mdma = mchan->mdma; in mdc_list_desc_config() local
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| H A D | mpc512x_dma.c | 256 struct mpc_dma *mdma = dma_chan_to_mpc_dma(&mchan->chan); in mpc_dma_execute() local
300 memcpy_toio(&mdma->tcd[cid], first->tcd, sizeof(struct mpc_dma_tcd)); in mpc_dma_execute()
303 mdma->tcd[cid].e_sg = 1; in mpc_dma_execute()
305 if (mdma->is_mpc8308) { in mpc_dma_execute()
307 out_8(&mdma->regs->dmassrt, cid); in mpc_dma_execute()
310 out_8(&mdma->regs->dmaserq, cid); in mpc_dma_execute()
313 out_8(&mdma->regs->dmassrt, cid); in mpc_dma_execute()
318 static void mpc_dma_irq_process(struct mpc_dma *mdma, u32 is, u32 es, int off) in mpc_dma_irq_process() argument
327 mchan = &mdma->channels[ch + off]; in mpc_dma_irq_process()
331 out_8(&mdma->regs->dmacint, ch + off); in mpc_dma_irq_process()
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| H A D | dma-jz4780.c | 1110 { .compatible = "ingenic,jz4760-mdma", .data = &jz4760_mdma_soc_data },
1113 { .compatible = "ingenic,jz4760b-mdma", .data = &jz4760b_mdma_soc_data },
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| /linux/Documentation/arch/arm/stm32/ |
| H A D | stm32-dma-mdma-chaining.rst | 4 STM32 DMA-MDMA chaining
11 This document describes the STM32 DMA-MDMA chaining feature. But before going
17 STM32MP1 SoCs embed both STM32 DMA and STM32 MDMA controllers. STM32 DMA
33 **STM32 MDMA**
35 STM32 MDMA (Master DMA) is mainly used to manage direct data transfers between
38 interfaces for AHB peripherals, while the STM32 MDMA acts as a second level
39 DMA with better performance. As a AXI/AHB master, STM32 MDMA can take control
46 STM32 DMA-MDMA chaining feature relies on the strengths of STM32 DMA and
47 STM32 MDMA controllers.
52 counter is automatically reloaded. This allows the SW or the STM32 MDMA to
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| /linux/Documentation/devicetree/bindings/dma/stm32/ |
| H A D | st,stm32-mdma.yaml | 4 $id: http://devicetree.org/schemas/dma/stm32/st,stm32-mdma.yaml#
7 title: STMicroelectronics STM32 MDMA Controller
10 The STM32 MDMA is a general-purpose direct memory access controller capable of
12 DMA clients connected to the STM32 MDMA controller must use the format
14 a phandle to the MDMA controller plus the following five integer cells:
43 0x00: Each MDMA request triggers a buffer transfer (max 128 bytes)
44 0x1: Each MDMA request triggers a block transfer (max 64K bytes)
45 0x2: Each MDMA request triggers a repeated block transfer
46 0x3: Each MDMA request triggers a linked list transfer
48 if no HW ack signal is used by the MDMA client
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| /linux/drivers/dma/stm32/ |
| H A D | stm32-mdma.c | 8 * Driver for STM32 MDMA controller
35 #define STM32_MDMA_GISR0 0x0000 /* MDMA Int Status Reg 1 */
37 /* MDMA Channel x interrupt/status register */
46 /* MDMA Channel x interrupt flag clear register */
59 /* MDMA Channel x error status register */
68 /* MDMA Channel x control register */
89 /* MDMA Channel x transfer configuration register */
128 /* MDMA Channel x block number of data register */
139 /* MDMA Channel x source address register */
142 /* MDMA Channel x destination address register */
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| H A D | Kconfig | 32 Enable support for the on-chip MDMA controller on STMicroelectronics
35 and want to use MDMA say Y here.
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| H A D | Makefile | 4 obj-$(CONFIG_STM32_MDMA) += stm32-mdma.o
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| H A D | stm32-dma.c | 197 * struct stm32_dma_mdma_config - STM32 DMA MDMA configuration
198 * @stream_id: DMA request to trigger STM32 MDMA transfer
200 * used by STM32 MDMA to clear DMA Transfer Complete flag
404 /* Check if user is requesting DMA to trigger STM32 MDMA */ in stm32_dma_slave_config()
586 /* When DMA triggers STM32 MDMA, DMA Transfer Complete is managed by STM32 MDMA */ in stm32_dma_start_transfer()
1115 /* Activate Double Buffer Mode if DMA triggers STM32 MDMA and more than 1 sg */ in stm32_dma_prep_slave_sg()
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| /linux/Documentation/devicetree/bindings/dma/ |
| H A D | ingenic,dma.yaml | 24 - ingenic,jz4760-mdma
27 - ingenic,jz4760b-mdma
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| /linux/drivers/dma/qcom/ |
| H A D | hidma.c | 109 struct hidma_dev *mdma = to_hidma_dev(ddev); in hidma_process_completed() local
133 llstat = hidma_ll_status(mdma->lldev, mdesc->tre_ch); in hidma_process_completed()
396 struct hidma_dev *mdma = mchan->dmadev; in hidma_prep_dma_memcpy() local
411 hidma_ll_set_transfer_params(mdma->lldev, mdesc->tre_ch, in hidma_prep_dma_memcpy()
429 struct hidma_dev *mdma = mchan->dmadev; in hidma_prep_dma_memset() local
455 hidma_ll_set_transfer_params(mdma->lldev, mdesc->tre_ch, in hidma_prep_dma_memset()
535 struct hidma_dev *mdma = mchan->dmadev; in hidma_free_chan_resources() local
550 hidma_ll_free(mdma->lldev, mdesc->tre_ch); in hidma_free_chan_resources()
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| /linux/drivers/spi/ |
| H A D | spi-stm32.c | 343 * @mdma_rx: MDMA channel for RX transfer
1517 * stm32_spi_prepare_rx_dma_mdma_chaining - Prepare RX DMA and MDMA chaining
1522 * @rx_mdma_desc: pointer to the RX MDMA descriptor
1543 /* Configure MDMA RX channel */ in stm32_spi_prepare_rx_dma_mdma_chaining()
1592 /* Prepare MDMA slave_sg transfer MEM_TO_MEM (SRAM>DDR) */ in stm32_spi_prepare_rx_dma_mdma_chaining()
1661 if (ret) { /* RX DMA MDMA chaining not possible, fallback to DMA only */ in stm32_spi_transfer_one_dma()
1705 dev_err(spi->dev, "Rx MDMA submit failed\n"); in stm32_spi_transfer_one_dma()
1708 /* Enable Rx MDMA channel */ in stm32_spi_transfer_one_dma()
2497 dev_info(&pdev->dev, "SRAM pool: %zu KiB for RX DMA/MDMA chaining\n", in stm32_spi_probe()
2515 "failed to request rx mdma channel, DMA only\n"); in stm32_spi_probe()
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| /linux/include/dt-bindings/clock/ |
| H A D | stm32mp13-clks.h | 97 #define MDMA 69 macro
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| H A D | stm32mp1-clks.h | 113 #define MDMA 100 macro
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| /linux/drivers/clk/stm32/ |
| H A D | clk-stm32mp13.c | 887 static struct clk_stm32_gate mdma = { variable
889 .hw.init = CLK_HW_INIT("mdma", "ck_axi", &clk_stm32_gate_ops, 0),
1389 STM32_GATE_CFG(MDMA, mdma, SECF_NONE),
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| H A D | clk-stm32mp1.c | 1986 PCLK(MDMA, "mdma", "ck_axi", 0, G_MDMA),
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| /linux/drivers/clk/ingenic/ |
| H A D | jz4760-cgu.c | 325 "mdma", CGU_CLK_GATE,
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| /linux/drivers/ata/ |
| H A D | pata_ep93xx.c | 98 /* MDMA Operation Register */
106 /* PIO/MDMA/UDMA Data Registers */
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| /linux/drivers/rapidio/devices/ |
| H A D | tsi721.h | 889 struct tsi721_bdma_maint mdma; /* Maintenance rd/wr request channel */ member
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| /linux/arch/arm/boot/dts/st/ |
| H A D | stm32h743.dtsi | 372 compatible = "st,stm32h7-mdma";
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| /linux/drivers/clk/samsung/ |
| H A D | clk-exynos4.c | 920 GATE(CLK_MDMA, "mdma", "aclk200", E4210_GATE_IP_IMAGE, 2, 0, 0),
968 GATE(CLK_MDMA, "mdma", "aclk200", E4X12_GATE_IP_IMAGE, 2, 0, 0),
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| /linux/drivers/clk/ |
| H A D | clk-stm32h7.c | 1005 PER_CLK(RCC_AHB3ENR, 0, "mdma", "hclk"),
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| /linux/Documentation/ |
| H A D | .renames.txt | 70 arm/stm32/stm32-dma-mdma-chaining arch/arm/stm32/stm32-dma-mdma-chaining
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| /linux/drivers/iommu/ |
| H A D | omap-iommu.c | 1112 * restrict IOMMU core registration only for processor-port MDMA MMUs in omap_iommu_can_register()
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| /linux/ |
| H A D | MAINTAINERS | 26253 F: Documentation/arch/arm/stm32/stm32-dma-mdma-chaining.rst
|