Searched full:mdma (Results 1 – 12 of 12) sorted by relevance
/freebsd/sys/contrib/device-tree/Bindings/dma/ |
H A D | st,stm32-mdma.yaml | 4 $id: http://devicetree.org/schemas/dma/st,stm32-mdma.yaml# 7 title: STMicroelectronics STM32 MDMA Controller 10 The STM32 MDMA is a general-purpose direct memory access controller capable of 12 DMA clients connected to the STM32 MDMA controller must use the format 14 a phandle to the MDMA controller plus the following five integer cells: 43 0x00: Each MDMA request triggers a buffer transfer (max 128 bytes) 44 0x1: Each MDMA request triggers a block transfer (max 64K bytes) 45 0x2: Each MDMA request triggers a repeated block transfer 46 0x3: Each MDMA request triggers a linked list transfer 48 if no HW ack signal is used by the MDMA client [all …]
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H A D | ingenic,dma.yaml | 24 - ingenic,jz4760-mdma 27 - ingenic,jz4760b-mdma
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/freebsd/sys/contrib/device-tree/Bindings/dma/stm32/ |
H A D | st,stm32-mdma.yaml | 4 $id: http://devicetree.org/schemas/dma/stm32/st,stm32-mdma.yaml# 7 title: STMicroelectronics STM32 MDMA Controller 10 The STM32 MDMA is a general-purpose direct memory access controller capable of 12 DMA clients connected to the STM32 MDMA controller must use the format 14 a phandle to the MDMA controller plus the following five integer cells: 43 0x00: Each MDMA request triggers a buffer transfer (max 128 bytes) 44 0x1: Each MDMA request triggers a block transfer (max 64K bytes) 45 0x2: Each MDMA request triggers a repeated block transfer 46 0x3: Each MDMA request triggers a linked list transfer 48 if no HW ack signal is used by the MDMA client [all …]
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/freebsd/sys/contrib/device-tree/src/arm/st/ |
H A D | stm32mp131.dtsi | 912 mdma: dma-controller@58000000 { label 913 compatible = "st,stm32h7-mdma"; 916 clocks = <&rcc MDMA>; 1419 dmas = <&mdma 30 0x2 0x1000a02 0x0 0x0>; 1460 dmas = <&mdma 24 0x2 0x12000a02 0x0 0x0>, 1461 <&mdma 24 0x2 0x12000a08 0x0 0x0>, 1462 <&mdma 25 0x2 0x12000a0a 0x0 0x0>; 1475 dmas = <&mdma 26 0x2 0x10100002 0x0 0x0>, 1476 <&mdma 26 0x2 0x10100008 0x0 0x0>;
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H A D | stm32h743.dtsi | 364 compatible = "st,stm32h7-mdma";
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H A D | stm32mp151.dtsi | 274 compatible = "st,stm32h7-mdma"; 277 clocks = <&rcc MDMA>;
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/freebsd/sys/contrib/device-tree/Bindings/iommu/ |
H A D | ti,omap-iommu.txt | 28 instance number should be 0 for DSP MDMA MMUs and 1 for
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/freebsd/sys/contrib/device-tree/include/dt-bindings/clock/ |
H A D | stm32mp13-clks.h | 97 #define MDMA 69 macro
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H A D | stm32mp1-clks.h | 113 #define MDMA 100 macro
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/freebsd/sys/contrib/device-tree/src/arm64/xilinx/ |
H A D | zynqmp-zc1751-xm017-dc3.dts | 132 arasan,has-mdma;
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H A D | zynqmp-zc1751-xm016-dc2.dts | 138 arasan,has-mdma;
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/freebsd/sys/contrib/device-tree/Bindings/clock/ |
H A D | exynos5433-clock.txt | 23 which generates clocks for G2D/MDMA IPs.
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