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/freebsd/contrib/llvm-project/clang/lib/Tooling/DependencyScanning/
H A DModuleDepCollector.cpp451 if (MDC.ContextHash.empty()) { in LexedFileChanged()
452 MDC.ContextHash = MDC.ScanInstance.getInvocation().getModuleHash(); in LexedFileChanged()
453 MDC.Consumer.handleContextHash(MDC.ContextHash); in LexedFileChanged()
456 SourceManager &SM = MDC.ScanInstance.getSourceManager(); in LexedFileChanged()
462 MDC.addFileDep(llvm::sys::path::remove_leading_dotslash(*Filename)); in LexedFileChanged()
473 MDC.addFileDep(FileName); in InclusionDirective()
481 if (MDC.ScanInstance.getPreprocessor().isInImportingCXXNamedModules()) { in moduleImport()
485 MDC.RequiredStdCXXModules.push_back(RequiredModule); in moduleImport()
498 if (MDC.isPrebuiltModule(TopLevelModule)) in handleImport()
499 MDC.DirectPrebuiltModularDeps.insert( in handleImport()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/dma/
H A Dimg-mdc-dma.txt1 * IMG Multi-threaded DMA Controller (MDC)
4 - compatible: Must be "img,pistachio-mdc-dma".
5 - reg: Must contain the base address and length of the MDC registers.
10 - sys: MDC system interface clock.
28 mdc: dma-controller@18143000 {
29 compatible = "img,pistachio-mdc-dma";
54 dmas = <&mdc 9 0xffffffff 0>, <&mdc 10 0xffffffff 0>;
/freebsd/sys/contrib/device-tree/Bindings/arm/marvell/
H A Dcp110-system-controller.txt92 mpp1 1 gpio, dev(ale0), au(i2sdo_spdifo), ge0(rxd2), tdm(drx), ptp(clk), mss_i2c(sck), uart0(txd), sata1(present_act), ge(mdc)
93 mpp2 2 gpio, dev(ad15), au(i2sextclk), ge0(rxd1), tdm(dtx), mss_uart(rxd), ptp(pclk_out), i2c1(sck), uart1(rxd), sata0(present_act), xg(mdc)
95 mpp4 4 gpio, dev(ad13), au(i2sbclk), ge0(rxctl), tdm(rstn), mss_uart(rxd), uart1(cts), pcie0(clkreq), uart3(rxd), ge(mdc)
119 mpp28 28 gpio, dev(csn1), spi1(csn0), mss_gpio5, ge0(rxd2), spi0(csn5), pcie2(clkreq), ptp(pulse), ge(mdc), sata1(present_act), uart0(cts), led(data)
122 mpp31 31 gpio, dev(a2), mss_gpio4, pcie(rstoutn), ge(mdc)
125 mpp34 34 gpio, mii(rxerr), sdio(pwr11), mss_spi(mosi), tdm(dtx), au(i2slrclk), sdio(wr_protect), ge(mdc), pcie0(clkreq), mss_gpio2
127 mpp36 36 gpio, synce2(clk), i2c1(sck), ptp(clk), synce1(clk), au(i2sbclk), sata0(present_act), xg(mdc), ge(mdc), pcie2(clkreq), mss_gpio5
128 mpp37 37 gpio, uart2(rxd), i2c0(sck), ptp(pclk_out), tdm(intn), mss_i2c(sck), sata1(present_act), ge(mdc), xg(mdc), pcie
[all...]
/freebsd/sys/contrib/device-tree/Bindings/net/dsa/
H A Drealtek.yaml50 mdc-gpios:
51 description: GPIO line for the MDC clock line.
116 - mdc-gpios
121 mdc-gpios: false
127 - mdc-gpios
135 # - mdc-gpios
150 /* 22 = MDIO (has input reads), 21 = MDC (clock, output only) */
151 mdc-gpios = <&gpio0 21 GPIO_ACTIVE_HIGH>;
244 mdc-gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>;
H A Drealtek-smi.txt23 - mdc-gpios: GPIO line for the MDC clock line.
70 /* 22 = MDIO (has input reads), 21 = MDC (clock, output only) */
71 mdc-gpios = <&gpio0 21 GPIO_ACTIVE_HIGH>;
162 mdc-gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>;
/freebsd/crypto/openssl/doc/man3/
H A DEVP_mdc2.pod6 - MDC-2 For EVP
16 MDC-2 (Modification Detection Code 2 or Meyer-Schilling) is a cryptographic
24 The MDC-2DES algorithm of using MDC-2 with the DES block cipher. It produces a
/freebsd/sys/dev/mii/
H A Dmii_bitbang.c61 #define MDC ops->mbo_bits[MII_BIT_MDC] macro
80 MWRITE(v | MDC); in mii_bitbang_sync()
106 MWRITE(v | MDC); in mii_bitbang_sendbits()
132 MWRITE(MDIRHOST | MDC); in mii_bitbang_readreg()
139 MWRITE(MDIRHOST | MDC); in mii_bitbang_readreg()
149 MWRITE(MDIRHOST | MDC); in mii_bitbang_readreg()
/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dmarvell,armada-98dx3236-pinctrl.txt18 mpp4 4 gpio, spi0(cs1), smi(mdc), dev(cs0)
45 mpp31 31 gpio, slv_smi(mdc), smi(mdc), dev(we1)
H A Dmarvell,armada-38x-pinctrl.txt22 mpp4 4 gpio, ge(mdc), ua1(txd), ua0(rts)
33 mpp15 15 gpio, ge0(rxd3), ge(mdc slave), pcie0(rstout), spi0(mosi)
74 mpp56 56 gpio, ua1(rts), ge(mdc), dram(deccerr), spi1(mosi), ua1(txd)
H A Dmarvell,armada-39x-pinctrl.txt22 mpp4 4 gpio, ua1(txd), ua0(rts), smi(mdc)
25 mpp7 7 gpio, dev(ad9), xsmi(mdc)
38 mpp20 20 gpio, sata0(prsnt) [1], ua0(rts), ua1(txd), smi(mdc)
/freebsd/sys/contrib/device-tree/src/mips/img/
H A Dpistachio.dtsi120 dmas = <&mdc 30 0xffffffff 0>;
136 dmas = <&mdc 23 0xffffffff 0>;
156 dmas = <&mdc 16 0xffffffff 0>;
173 dmas = <&mdc 14 0xffffffff 0>;
192 dmas = <&mdc 15 0xffffffff 0>;
217 dmas = <&mdc 9 0xffffffff 0>, <&mdc 10 0xffffffff 0>;
232 dmas = <&mdc 1 0xffffffff 0>, <&mdc 2 0xffffffff 0>;
817 mdc: dma-controller@18143000 { label
818 compatible = "img,pistachio-mdc-dma";
882 dmas = <&mdc 8 0xffffffff 0>;
/freebsd/secure/lib/libcrypto/man/man3/
H A DEVP_mdc2.3141 \&\- MDC\-2 For EVP
151 \&\s-1MDC\-2\s0 (Modification Detection Code 2 or Meyer-Schilling) is a cryptographic
156 The \s-1MDC\-2DES\s0 algorithm of using \s-1MDC\-2\s0 with the \s-1DES\s0 block cipher. It produces…
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dmdio-gpio.txt7 MDC and MDIO lines connected to GPIO controllers are listed in the
10 MDC, MDIO.
/freebsd/sys/dev/gpio/
H A Dgpiomdio.c63 #define MDC sc->miibb_ops.mbo_bits[MII_BIT_MDC] macro
115 if (OF_getencprop(node, "mdc", &pin, sizeof(pin)) > 0) in gpiomdio_attach()
126 device_printf(dev, "MDC pin: %d, MDIO pin: %d\n", in gpiomdio_attach()
132 MDC = MDC_BIT; in gpiomdio_attach()
/freebsd/crypto/openssl/test/recipes/30-test_evp_data/
H A Devppkey_rsa.txt136 # DigestInfo-wrapped MDC-2 signature
149 # Legacy OCTET STRING MDC-2 signature
162 # Legacy OCTET STRING MDC-2 signature, digest mismatch
170 # Legacy OCTET STRING MDC-2 signature, wrong input digest length
178 # Legacy OCTET STRING MDC-2 signature, wrong signature digest length
193 # Legacy OCTET STRING MDC-2 signature, wrong input and signature digest length
/freebsd/sys/contrib/device-tree/Bindings/spi/
H A Dspi-img-spfi.txt34 dmas = <&mdc 9 0xffffffff 0>, <&mdc 10 0xffffffff 0>;
/freebsd/crypto/openssl/crypto/pkcs7/
H A Dpk7_doit.c733 EVP_MD_CTX *mdc, *ctx_tmp; in PKCS7_dataFinal() local
825 btmp = PKCS7_find_digest(&mdc, btmp, j); in PKCS7_dataFinal()
833 if (!EVP_MD_CTX_copy_ex(ctx_tmp, mdc)) in PKCS7_dataFinal()
866 if (!PKCS7_find_digest(&mdc, bio, in PKCS7_dataFinal()
869 if (!EVP_DigestFinal_ex(mdc, md_data, &md_len)) in PKCS7_dataFinal()
1018 EVP_MD_CTX *mdc_tmp, *mdc; in PKCS7_signatureVerify() local
1050 BIO_get_md_ctx(btmp, &mdc); in PKCS7_signatureVerify()
1051 if (mdc == NULL) { in PKCS7_signatureVerify()
1055 if (EVP_MD_CTX_get_type(mdc) == md_type) in PKCS7_signatureVerify()
1061 if (EVP_MD_get_pkey_type(EVP_MD_CTX_get0_md(mdc)) == md_type) in PKCS7_signatureVerify()
[all …]
/freebsd/sys/contrib/device-tree/src/powerpc/
H A Dkmeter1.dts149 0 2 1 0 1 0 /* MDC */
175 0 2 1 0 1 0 /* MDC */
201 0 2 1 0 1 0 /* MDC */
221 0 2 1 0 1 0 /* MDC */
239 0 2 1 0 1 0 /* MDC */
257 0 2 1 0 1 0 /* MDC */
275 0 2 1 0 1 0 /* MDC */
/freebsd/contrib/llvm-project/clang/include/clang/Tooling/DependencyScanning/
H A DModuleDepCollector.h167 ModuleDepCollectorPP(ModuleDepCollector &MDC) : MDC(MDC) {} in ModuleDepCollectorPP() argument
186 ModuleDepCollector &MDC;
/freebsd/sys/contrib/device-tree/Bindings/soc/fsl/cpm_qe/
H A Dnetwork.txt31 fsl,mdc-pin : pin of port C controlling mdio clock
42 fsl,mdc-pin = <13>;
/freebsd/sys/contrib/device-tree/src/arm/broadcom/
H A Dbcm47094-asus-rt-ac88u.dts21 /* 7 = MDIO (has input reads), 6 = MDC (clock, output only) */
22 mdc-gpios = <&chipcommon 6 GPIO_ACTIVE_HIGH>;
/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dstm32mp151a-prtt1l.dtsi40 /* DP83TD510E PHYs have max MDC rate of 1.75MHz. Since we can't reduce
41 * stmmac MDC clock without reducing system bus rate, we need to use
/freebsd/sys/dev/my/
H A Dif_my.c182 /* low MDC; MDO is already high (miir) */ in my_send_cmd_to_phy()
186 /* high MDC */ in my_send_cmd_to_phy()
197 /* low MDC, prepare MDO */ in my_send_cmd_to_phy()
203 /* high MDC */ in my_send_cmd_to_phy()
234 /* low MDC */ in my_phy_readreg()
243 /* high MDC, and wait */ in my_phy_readreg()
252 /* low MDC */ in my_phy_readreg()
276 /* low MDC, prepare MDO */ in my_phy_writereg()
283 /* high MDC */ in my_phy_writereg()
292 /* low MDC */ in my_phy_writereg()
/freebsd/sys/contrib/ncsw/Peripherals/FM/MAC/
H A Dfman_dtsec_mii_acc.c43 * the MII MDC clock. MII MDC clock will be set to work in the range
/freebsd/sys/contrib/device-tree/src/arm/gemini/
H A Dgemini-sq201.dts58 /* Uses MDC and MDIO */
59 gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */

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