| /linux/sound/pci/aw2/ |
| H A D | aw2-saa7146.c | 45 WRITEREG((MRST_N << 16), MC1); in snd_aw2_saa7146_free()
87 WRITEREG((MRST_N << 16), MC1); in snd_aw2_saa7146_setup()
119 WRITEREG((EAP << 16) | EAP, MC1); in snd_aw2_saa7146_setup()
122 WRITEREG((EI2C << 16) | EI2C, MC1); in snd_aw2_saa7146_setup()
279 WRITEREG((TR_E_A2_OUT << 16) | TR_E_A2_OUT, MC1); in snd_aw2_saa7146_pcm_trigger_start_playback()
286 WRITEREG((TR_E_A1_OUT << 16) | TR_E_A1_OUT, MC1); in snd_aw2_saa7146_pcm_trigger_start_playback()
304 WRITEREG((TR_E_A2_OUT << 16), MC1); in snd_aw2_saa7146_pcm_trigger_stop_playback()
310 WRITEREG((TR_E_A1_OUT << 16), MC1); in snd_aw2_saa7146_pcm_trigger_stop_playback()
320 WRITEREG((TR_E_A1_IN << 16) | TR_E_A1_IN, MC1); in snd_aw2_saa7146_pcm_trigger_start_capture()
327 WRITEREG((TR_E_A1_IN << 16), MC1); in snd_aw2_saa7146_pcm_trigger_stop_capture()
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| H A D | saa7146.h | 31 #define MC1 0xFC macro
95 /* MC1 */
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| /linux/arch/arm/boot/dts/st/ |
| H A D | stm32mp157c-lxa-mc1.dts | 18 compatible = "lxa,stm32mp157c-mc1", "oct,stm32mp15xx-osd32", "st,stm32mp157";
43 label = "mc1:green:act";
54 label = "mc1:red:rgb";
61 label = "mc1:green:rgb";
68 label = "mc1:blue:rgb";
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| /linux/drivers/media/common/saa7146/ |
| H A D | saa7146_hlp.c | 655 WRITE_RPS0(CMD_WR_REG_MASK | (MC1/4)); in program_capture_engine()
660 WRITE_RPS0(CMD_WR_REG_MASK | (MC1/4)); in program_capture_engine()
665 WRITE_RPS0(CMD_WR_REG_MASK | (MC1/4)); in program_capture_engine()
683 WRITE_RPS0(CMD_WR_REG_MASK | (MC1/4)); in program_capture_engine()
688 WRITE_RPS0(CMD_WR_REG_MASK | (MC1/4)); in program_capture_engine()
693 WRITE_RPS0(CMD_WR_REG_MASK | (MC1/4)); in program_capture_engine()
718 saa7146_write(dev, MC1, MASK_21); in saa7146_disable_clipping()
770 saa7146_write(dev, MC1, (MASK_12 | MASK_28)); in saa7146_set_capture()
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| H A D | saa7146_fops.c | 126 saa7146_write(dev,MC1, MASK_20); in saa7146_buffer_next()
139 saa7146_write(dev, MC1, (MASK_12 | MASK_28)); in saa7146_buffer_next()
286 saa7146_write(dev, MC1, (MASK_10 | MASK_26)); in saa7146_vv_init()
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| H A D | saa7146_core.c | 380 saa7146_write(dev, MC1, MASK_31); in saa7146_init_one()
387 saa7146_write(dev, MC1, 0x30ff0000); in saa7146_init_one()
504 saa7146_write(dev, MC1, 0x00ff0000); in saa7146_remove_one()
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| H A D | saa7146_i2c.c | 406 saa7146_write(dev, MC1, (MASK_08 | MASK_24)); in saa7146_i2c_adapter_prepare()
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| /linux/Documentation/driver-api/ |
| H A D | edac.rst | 236 mc1 |
237 mc2 |- GPU card[0] => node 0(mc1), node 1(mc2)
256 ├── mc 1 # GPU node 0 == mc1, Each MC node has 4 UMCs/CSROWs
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| /linux/drivers/scsi/csiostor/ |
| H A D | csio_hw_t5.c | 336 * csio_t5_dfs_create_ext_mem - setup debugfs for MC0 or MC1 to read the values
340 * MC0 & MC1.
355 csio_add_debugfs_mem(hw, "mc1", MEM_MC1, in csio_t5_dfs_create_ext_mem()
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| /linux/drivers/media/pci/ttpci/ |
| H A D | budget-core.c | 52 saa7146_write(budget->dev, MC1, MASK_20); // DMA3 off in stop_ts_capture()
66 saa7146_write(dev, MC1, MASK_20); // DMA3 off in start_ts_capture()
143 saa7146_write(dev, MC1, (MASK_04 | MASK_20)); /* DMA3 on */ in start_ts_capture()
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| H A D | budget-ci.c | 448 saa7146_write(saa, MC1, MASK_27 | MASK_11); in ciintf_init()
522 saa7146_write(saa, MC1, MASK_27); in ciintf_init()
550 saa7146_write(saa, MC1, MASK_27); in ciintf_deinit()
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| H A D | budget-av.c | 338 saa7146_write(saa, MC1, MASK_27 | MASK_11); in ciintf_init()
365 saa7146_write(saa, MC1, MASK_27); in ciintf_init()
382 saa7146_write(saa, MC1, MASK_27); in ciintf_deinit()
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| /linux/drivers/staging/media/av7110/ |
| H A D | av7110.c | 1169 saa7146_write(budget->dev, MC1, MASK_20); /* DMA3 off */ in stop_ts_capture()
1188 saa7146_write(budget->dev, MC1, (MASK_04 | MASK_20)); /* DMA3 on */ in start_ts_capture()
2346 * reset with MASK_31 to MC1 in av7110_attach()
2356 saa7146_write(dev, MC1, MASK_31); in av7110_attach()
2378 saa7146_write(dev, MC1, MASK_29); in av7110_attach()
2406 saa7146_write(dev, MC1, (MASK_13 | MASK_29)); in av7110_attach()
2420 saa7146_write(dev, MC1, (MASK_29)); in av7110_attach()
2581 saa7146_write(dev, MC1, (MASK_13 | MASK_29)); in av7110_attach()
2739 saa7146_write(saa, MC1, MASK_29); in av7110_detach()
2743 saa7146_write(saa, MC1, MASK_20); /* DMA3 off */ in av7110_detach()
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| /linux/Documentation/devicetree/bindings/memory-controllers/ |
| H A D | nvidia,tegra186-mc.yaml | 247 <0x0 0x02c30000 0x0 0x10000>, /* MC1 */
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| /linux/sound/soc/codecs/ |
| H A D | mc13783.c | 460 SND_SOC_DAPM_SUPPLY("MC1 Bias", MC13783_AUDIO_TX, 0, 0, NULL, 0),
591 SOC_SINGLE("MC1 Capture Bias Switch", MC13783_AUDIO_TX, 0, 1, 0),
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| /linux/drivers/pinctrl/nomadik/ |
| H A D | pinctrl-nomadik-db8500.c | 476 /* MC1 has only 4 data pins, designed for SD or SDIO exclusively */
878 DB8500_FUNC_GROUPS(mc1, "mc1_a_1", "mc1_a_2", "mc1dir_a_1");
947 FUNCTION(mc1),
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| /linux/Documentation/admin-guide/RAS/ |
| H A D | main.rst | 405 |->mc1
471 │ ├── mc1
1105 For socket 1, it is needed to replace "mc0" by "mc1" at the above
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| /linux/drivers/comedi/drivers/ |
| H A D | s626.h | 177 /* Master Control Register 1 (MC1) constants. */
180 * Shut down all MC1-controlled
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| /linux/drivers/media/pci/saa7146/ |
| H A D | hexium_orion.c | 217 saa7146_write(dev, MC1, (MASK_08 | MASK_24 | MASK_10 | MASK_26)); in hexium_probe()
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| H A D | hexium_gemini.c | 260 saa7146_write(dev, MC1, (MASK_08 | MASK_24 | MASK_10 | MASK_26)); in hexium_attach()
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| /linux/include/media/drv-intf/ |
| H A D | saa7146.h | 372 #define MC1 0xFC /* Main control register 1 */ macro
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| /linux/drivers/gpu/drm/etnaviv/ |
| H A D | etnaviv_gpu.c | 885 * On MC1.0 cores the linear window offset is ignored by the TS engine, in etnaviv_gpu_init()
902 "Need to move linear window on MC1.0, disabling TS\n"); in etnaviv_gpu_init()
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| /linux/drivers/accel/habanalabs/gaudi2/ |
| H A D | gaudi2_coresight.c | 2698 /* Set HBM (MC0 and MC1) disable components */ in gaudi2_coresight_init()
2709 dev_err(hdev->dev, "Failed to set disabled cs_dbg units for hbm mc1 coresight\n"); in gaudi2_coresight_init()
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| /linux/drivers/net/ethernet/chelsio/cxgb4/ |
| H A D | cudbg_lib.c | 407 /* In T6, there's no MC1. So, HMA shares MC1 in cudbg_get_entity_length()
1157 /* Some T5 cards have both MC0 and MC1. */ in cudbg_meminfo_get_mem_index()
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| /linux/drivers/edac/ |
| H A D | sb_edac.c | 587 * MC0 is mapped to CH3,4,5 and MC1 is mapped to CH0,1,2
3007 * MC1 channels 3-5 are device 8 function 2-4. in knl_mci_bind_devs()
3167 * bank15 means mc0 and bank16 means mc1. in sbridge_mce_output_error()
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