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/linux/drivers/memory/tegra/
H A Dmc.c22 #include "mc.h"
26 { .compatible = "nvidia,tegra20-mc-gart", .data = &tegra20_mc_soc },
29 { .compatible = "nvidia,tegra30-mc", .data = &tegra30_mc_soc },
32 { .compatible = "nvidia,tegra114-mc", .data = &tegra114_mc_soc },
35 { .compatible = "nvidia,tegra124-mc", .data = &tegra124_mc_soc },
38 { .compatible = "nvidia,tegra132-mc", .data = &tegra132_mc_soc },
41 { .compatible = "nvidia,tegra210-mc", .data = &tegra210_mc_soc },
44 { .compatible = "nvidia,tegra186-mc", .data = &tegra186_mc_soc },
47 { .compatible = "nvidia,tegra194-mc", .data = &tegra194_mc_soc },
50 { .compatible = "nvidia,tegra234-mc", .data = &tegra234_mc_soc },
[all …]
H A Dtegra20.c14 #include <dt-bindings/memory/tegra20-mc.h>
16 #include "mc.h"
75 const struct tegra_mc *mc; member
279 static int tegra20_mc_hotreset_assert(struct tegra_mc *mc, in tegra20_mc_hotreset_assert() argument
285 spin_lock_irqsave(&mc->lock, flags); in tegra20_mc_hotreset_assert()
287 value = mc_readl(mc, rst->reset); in tegra20_mc_hotreset_assert()
288 mc_writel(mc, value & ~BIT(rst->bit), rst->reset); in tegra20_mc_hotreset_assert()
290 spin_unlock_irqrestore(&mc->lock, flags); in tegra20_mc_hotreset_assert()
295 static int tegra20_mc_hotreset_deassert(struct tegra_mc *mc, in tegra20_mc_hotreset_deassert() argument
301 spin_lock_irqsave(&mc->lock, flags); in tegra20_mc_hotreset_deassert()
[all …]
H A DMakefile2 tegra-mc-y := mc.o
4 tegra-mc-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20.o
5 tegra-mc-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra30.o
6 tegra-mc-$(CONFIG_ARCH_TEGRA_114_SOC) += tegra114.o
7 tegra-mc-$(CONFIG_ARCH_TEGRA_124_SOC) += tegra124.o
8 tegra-mc-$(CONFIG_ARCH_TEGRA_132_SOC) += tegra124.o
9 tegra-mc-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210.o
10 tegra-mc-$(CONFIG_ARCH_TEGRA_186_SOC) += tegra186.o
11 tegra-mc-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra186.o tegra194.o
12 tegra-mc-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra186.o tegra234.o
[all …]
H A Dtegra186.c14 #include <soc/tegra/mc.h>
17 #include <dt-bindings/memory/tegra186-mc.h>
20 #include "mc.h"
26 static int tegra186_mc_probe(struct tegra_mc *mc) in tegra186_mc_probe() argument
28 struct platform_device *pdev = to_platform_device(mc->dev); in tegra186_mc_probe()
35 * From Tegra264, the SID region is not present in MC node and BROADCAST is first. in tegra186_mc_probe()
38 * the first entry mapped in mc probe as the BROADCAST region. This is done to avoid in tegra186_mc_probe()
43 mc->bcast_ch_regs = devm_platform_ioremap_resource_byname(pdev, "broadcast"); in tegra186_mc_probe()
45 mc->bcast_ch_regs = mc->regs; in tegra186_mc_probe()
47 if (IS_ERR(mc->bcast_ch_regs)) { in tegra186_mc_probe()
[all …]
/linux/sound/soc/
H A Dsoc-ops.c113 static int soc_mixer_reg_to_ctl(struct soc_mixer_control *mc, unsigned int reg_val, in soc_mixer_reg_to_ctl() argument
118 if (mc->sign_bit) in soc_mixer_reg_to_ctl()
119 val = sign_extend32(val, mc->sign_bit); in soc_mixer_reg_to_ctl()
121 val = clamp(val, mc->min, mc->max); in soc_mixer_reg_to_ctl()
122 val -= mc->min; in soc_mixer_reg_to_ctl()
124 if (mc->invert) in soc_mixer_reg_to_ctl()
130 static unsigned int soc_mixer_ctl_to_reg(struct soc_mixer_control *mc, int val, in soc_mixer_ctl_to_reg()
136 if (mc->invert) in soc_mixer_ctl_to_reg()
139 reg_val = val + mc in soc_mixer_ctl_to_reg()
129 soc_mixer_ctl_to_reg(struct soc_mixer_control * mc,int val,unsigned int mask,unsigned int shift,int max) soc_mixer_ctl_to_reg() argument
143 soc_mixer_valid_ctl(struct soc_mixer_control * mc,long val,int max) soc_mixer_valid_ctl() argument
157 soc_mixer_mask(struct soc_mixer_control * mc) soc_mixer_mask() argument
165 soc_mixer_sx_mask(struct soc_mixer_control * mc) soc_mixer_sx_mask() argument
173 soc_info_volsw(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo,struct soc_mixer_control * mc,int max) soc_info_volsw() argument
197 soc_put_volsw(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol,struct soc_mixer_control * mc,int mask,int max) soc_put_volsw() argument
248 soc_get_volsw(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol,struct soc_mixer_control * mc,int mask,int max) soc_get_volsw() argument
286 struct soc_mixer_control *mc = snd_soc_info_volsw() local
309 struct soc_mixer_control *mc = snd_soc_info_volsw_sx() local
329 struct soc_mixer_control *mc = snd_soc_get_volsw() local
350 struct soc_mixer_control *mc = snd_soc_put_volsw() local
371 struct soc_mixer_control *mc = snd_soc_get_volsw_sx() local
391 struct soc_mixer_control *mc = snd_soc_put_volsw_sx() local
401 struct soc_mixer_control *mc = (struct soc_mixer_control *)kctl->private_value; snd_soc_clip_to_platform_max() local
450 struct soc_mixer_control *mc = snd_soc_limit_volume() local
634 struct soc_mreg_control *mc = snd_soc_info_xr_sx() local
664 struct soc_mreg_control *mc = snd_soc_get_xr_sx() local
708 struct soc_mreg_control *mc = snd_soc_put_xr_sx() local
755 struct soc_mixer_control *mc = snd_soc_get_strobe() local
787 struct soc_mixer_control *mc = snd_soc_put_strobe() local
[all...]
/linux/drivers/gpio/
H A Dgpio-mc33880.c43 static int mc33880_write_config(struct mc33880 *mc) in mc33880_write_config() argument
45 return spi_write(mc->spi, &mc->port_config, sizeof(mc->port_config)); in mc33880_write_config()
49 static int __mc33880_set(struct mc33880 *mc, unsigned offset, int value) in __mc33880_set() argument
52 mc->port_config |= 1 << offset; in __mc33880_set()
54 mc->port_config &= ~(1 << offset); in __mc33880_set()
56 return mc33880_write_config(mc); in __mc33880_set()
62 struct mc33880 *mc = gpiochip_get_data(chip); in mc33880_set() local
65 mutex_lock(&mc->lock); in mc33880_set()
67 ret = __mc33880_set(mc, offset, value); in mc33880_set()
69 mutex_unlock(&mc->lock); in mc33880_set()
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/mc/
H A Dbase.c32 struct nvkm_mc *mc = device->mc; in nvkm_mc_unk260() local
33 if (likely(mc) && mc->func->unk260) in nvkm_mc_unk260()
34 mc->func->unk260(mc, data); in nvkm_mc_unk260()
53 struct nvkm_mc *mc = device->mc; in nvkm_mc_reset_mask() local
56 if (likely(mc)) { in nvkm_mc_reset_mask()
58 for (map = mc->func->reset; map && map->stat; map++) { in nvkm_mc_reset_mask()
76 device->mc->func->device->disable(device->mc, pmc_enable); in nvkm_mc_reset()
77 device->mc->func->device->enable(device->mc, pmc_enable); in nvkm_mc_reset()
86 device->mc->func->device->disable(device->mc, pmc_enable); in nvkm_mc_disable()
94 device->mc->func->device->enable(device->mc, pmc_enable); in nvkm_mc_enable()
[all …]
H A DKbuild2 nvkm-y += nvkm/subdev/mc/base.o
3 nvkm-y += nvkm/subdev/mc/nv04.o
4 nvkm-y += nvkm/subdev/mc/nv11.o
5 nvkm-y += nvkm/subdev/mc/nv17.o
6 nvkm-y += nvkm/subdev/mc/nv44.o
7 nvkm-y += nvkm/subdev/mc/nv50.o
8 nvkm-y += nvkm/subdev/mc/g84.o
9 nvkm-y += nvkm/subdev/mc/g98.o
10 nvkm-y += nvkm/subdev/mc/gt215.o
11 nvkm-y += nvkm/subdev/mc/gf100.o
[all …]
H A Dnv04.c34 nv04_mc_device_disable(struct nvkm_mc *mc, u32 mask) in nv04_mc_device_disable() argument
36 nvkm_mask(mc->subdev.device, 0x000200, mask, 0x00000000); in nv04_mc_device_disable()
40 nv04_mc_device_enable(struct nvkm_mc *mc, u32 mask) in nv04_mc_device_enable() argument
42 struct nvkm_device *device = mc->subdev.device; in nv04_mc_device_enable()
49 nv04_mc_device_enabled(struct nvkm_mc *mc, u32 mask) in nv04_mc_device_enabled() argument
51 return (nvkm_rd32(mc->subdev.device, 0x000200) & mask) == mask; in nv04_mc_device_enabled()
74 struct nvkm_mc *mc = container_of(intr, typeof(*mc), intr); in nv04_mc_intr_rearm() local
78 nvkm_wr32(mc->subdev.device, 0x000140 + (leaf * 4), 0x00000001); in nv04_mc_intr_rearm()
84 struct nvkm_mc *mc = container_of(intr, typeof(*mc), intr); in nv04_mc_intr_unarm() local
88 nvkm_wr32(mc->subdev.device, 0x000140 + (leaf * 4), 0x00000000); in nv04_mc_intr_unarm()
[all …]
/linux/Documentation/ABI/testing/
H A Dsysfs-devices-edac1 What: /sys/devices/system/edac/mc/mc*/reset_counters
12 What: /sys/devices/system/edac/mc/mc*/seconds_since_reset
19 What: /sys/devices/system/edac/mc/mc*/mc_name
25 What: /sys/devices/system/edac/mc/mc*/size_mb
31 What: /sys/devices/system/edac/mc/mc*/ue_count
39 What: /sys/devices/system/edac/mc/mc*/ue_noinfo_count
46 What: /sys/devices/system/edac/mc/mc*/ce_count
56 What: /sys/devices/system/edac/mc/mc*/ce_noinfo_count
66 What: /sys/devices/system/edac/mc/mc*/sdram_scrub_rate
78 What: /sys/devices/system/edac/mc/mc*/max_location
[all …]
/linux/drivers/irqchip/
H A Dirq-riscv-aplic-msi.c84 struct aplic_msicfg *mc = &priv->msicfg; in aplic_msi_write_msg() local
105 tbppn &= ~APLIC_xMSICFGADDR_PPN_HART(mc->lhxs); in aplic_msi_write_msg()
106 tbppn &= ~APLIC_xMSICFGADDR_PPN_LHX(mc->lhxw, mc->lhxs); in aplic_msi_write_msg()
107 tbppn &= ~APLIC_xMSICFGADDR_PPN_HHX(mc->hhxw, mc->hhxs); in aplic_msi_write_msg()
108 WARN_ON(tbppn != mc->base_ppn); in aplic_msi_write_msg()
111 group_index = (tppn >> APLIC_xMSICFGADDR_PPN_HHX_SHIFT(mc->hhxs)) & in aplic_msi_write_msg()
112 APLIC_xMSICFGADDR_PPN_HHX_MASK(mc->hhxw); in aplic_msi_write_msg()
113 hart_index = (tppn >> APLIC_xMSICFGADDR_PPN_LHX_SHIFT(mc->lhxs)) & in aplic_msi_write_msg()
114 APLIC_xMSICFGADDR_PPN_LHX_MASK(mc->lhxw); in aplic_msi_write_msg()
115 hart_index |= (group_index << mc->lhxw); in aplic_msi_write_msg()
[all …]
/linux/drivers/bus/fsl-mc/
H A Dmc-sys.c5 * I/O services to send MC commands to the MC hardware
15 #include <linux/fsl/mc.h>
17 #include "fsl-mc-private.h"
20 * Timeout in milliseconds to wait for the completion of an MC command
26 * iterations while waiting for MC command completion
86 return "Unknown MC error"; in mc_status_to_string()
92 * mc_write_command - writes a command to a Management Complex (MC) portal
94 * @portal: pointer to an MC portal
116 * mc_read_response - reads the response for the last MC command from a
117 * Management Complex (MC) portal
[all …]
H A Dmc-io.c8 #include <linux/fsl/mc.h>
10 #include "fsl-mc-private.h"
53 * fsl_create_mc_io() - Creates an MC I/O object
55 * @dev: device to be associated with the MC I/O object
56 * @mc_portal_phys_addr: physical address of the MC portal to use
57 * @mc_portal_size: size in bytes of the MC portal
58 * @dpmcp_dev: Pointer to the DPMCP object associated with this MC I/O
60 * @flags: flags for the new MC I/O object
61 * @new_mc_io: Area to return pointer to newly created MC I/O object
95 "devm_request_mem_region failed for MC portal %pa\n", in fsl_create_mc_io()
[all …]
H A DMakefile3 # Freescale Management Complex (MC) bus drivers
7 obj-$(CONFIG_FSL_MC_BUS) += mc-bus-driver.o
9 mc-bus-driver-objs := fsl-mc-bus.o \
10 mc-sys.o \
11 mc-io.o \
16 fsl-mc-allocator.o \
17 fsl-mc-msi.o \
21 # MC userspace support
22 obj-$(CONFIG_FSL_MC_UAPI_SUPPORT) += fsl-mc-uapi.o
H A Ddprc.c8 #include <linux/fsl/mc.h>
10 #include "fsl-mc-private.h"
14 * towards the mc firmware
21 * @mc_io: Pointer to MC portal's I/O object
45 /* send command to mc*/ in dprc_open()
59 * @mc_io: Pointer to MC portal's I/O object
78 /* send command to mc*/ in dprc_close()
85 * @mc_io: Pointer to MC portal's I/O object
136 * MC API 6.5 introduced a new field in the command used to pass in dprc_reset_container()
149 /* send command to mc*/ in dprc_reset_container()
[all …]
H A Ddpcon.c7 #include <linux/fsl/mc.h>
9 #include "fsl-mc-private.h"
13 * @mc_io: Pointer to MC portal's I/O object
22 * associated with the specific object ID and the specific MC
44 /* send command to mc*/ in dpcon_open()
58 * @mc_io: Pointer to MC portal's I/O object
78 /* send command to mc*/ in dpcon_close()
85 * @mc_io: Pointer to MC portal's I/O object
102 /* send command to mc*/ in dpcon_enable()
109 * @mc_io: Pointer to MC portal's I/O object
[all …]
/linux/drivers/crypto/amlogic/
H A Damlogic-gxl-cipher.c20 static int get_engine_number(struct meson_dev *mc) in get_engine_number() argument
22 return atomic_inc_return(&mc->flow) % MAXFLOW; in get_engine_number()
89 struct meson_dev *mc = op->mc; in meson_cipher() local
106 dev_dbg(mc->dev, "%s %s %u %x IV(%u) key=%u flow=%d\n", __func__, in meson_cipher()
114 mc->chanlist[flow].stat_req++; in meson_cipher()
132 dev_err(mc->dev, "invalid ivsize=%d vs len=%d\n", ivsize, areq->cryptlen); in meson_cipher()
152 phykeyiv = dma_map_single(mc->dev, bkeyiv, keyivlen, in meson_cipher()
154 err = dma_mapping_error(mc->dev, phykeyiv); in meson_cipher()
156 dev_err(mc->dev, "Cannot DMA MAP KEY IV\n"); in meson_cipher()
164 desc = &mc->chanlist[flow].tl[tloffset]; in meson_cipher()
[all …]
/linux/Documentation/devicetree/bindings/misc/
H A Dfsl,qoriq-mc.yaml4 $id: http://devicetree.org/schemas/misc/fsl,qoriq-mc.yaml#
13 The Freescale Management Complex (fsl-mc) is a hardware resource
15 network-oriented packet processing applications. After the fsl-mc
22 For an overview of the DPAA2 architecture and fsl-mc bus see:
54 - fsl,qoriq-mc
56 Must be "fsl,qoriq-mc". A Freescale Management Complex
59 the MC control register region.
68 the second region is the MC control registers. This
75 MC address space and the parent system address space.
77 The MC address space is defined by 3 components:
[all …]
/linux/arch/x86/kernel/cpu/microcode/
H A Dintel.c97 bool intel_find_matching_signature(void *mc, struct cpu_signature *sig) in intel_find_matching_signature() argument
99 struct microcode_header_intel *mc_hdr = mc; in intel_find_matching_signature()
111 ext_hdr = mc + intel_microcode_get_datasize(mc_hdr) + MC_HEADER_SIZE; in intel_find_matching_signature()
125 * @mc: Pointer to the microcode file contents.
137 int intel_microcode_sanity_check(void *mc, bool print_err, int hdr_type) in intel_microcode_sanity_check() argument
140 struct microcode_header_intel *mc_header = mc; in intel_microcode_sanity_check()
173 ext_header = mc + MC_HEADER_SIZE + data_size; in intel_microcode_sanity_check()
207 orig_sum += ((u32 *)mc)[i]; in intel_microcode_sanity_check()
237 static void update_ucode_pointer(struct microcode_intel *mc) in update_ucode_pointer() argument
245 ucode_patch_va = mc; in update_ucode_pointer()
[all …]
/linux/include/linux/fsl/
H A Dmc.h3 * Freescale Management Complex (MC) bus public interface
27 * struct fsl_mc_driver - MC object device driver object
62 * enum fsl_mc_pool_type - Types of allocatable MC bus resources
68 FSL_MC_POOL_DPMCP = 0x0, /* corresponds to "dpmcp" in the MC */
69 FSL_MC_POOL_DPBP, /* corresponds to "dpbp" in the MC */
70 FSL_MC_POOL_DPCON, /* corresponds to "dpcon" in the MC */
80 * struct fsl_mc_resource - MC generic resource
82 * @id: unique MC resource Id within the resources of the same type
90 * MC resource structures.
101 * struct fsl_mc_device_irq - MC object device message-based interrupt
[all …]
/linux/drivers/gpu/drm/radeon/
H A Dr520.c89 pr_warn("Failed to wait MC idle while programming pipes. Bad things might happen.\n"); in r520_gpu_init()
97 rdev->mc.vram_width = 128; in r520_vram_get_type()
98 rdev->mc.vram_is_ddr = true; in r520_vram_get_type()
102 rdev->mc.vram_width = 32; in r520_vram_get_type()
105 rdev->mc.vram_width = 64; in r520_vram_get_type()
108 rdev->mc.vram_width = 128; in r520_vram_get_type()
111 rdev->mc.vram_width = 256; in r520_vram_get_type()
114 rdev->mc.vram_width = 128; in r520_vram_get_type()
118 rdev->mc.vram_width *= 2; in r520_vram_get_type()
126 radeon_vram_location(rdev, &rdev->mc, 0); in r520_mc_init()
[all …]
/linux/include/soc/tegra/
H A Dmc.h103 struct tegra_mc *mc);
108 struct tegra_mc *mc) in tegra_smmu_probe() argument
128 int (*hotreset_assert)(struct tegra_mc *mc,
130 int (*hotreset_deassert)(struct tegra_mc *mc,
132 int (*block_dma)(struct tegra_mc *mc,
134 bool (*dma_idling)(struct tegra_mc *mc,
136 int (*unblock_dma)(struct tegra_mc *mc,
138 int (*reset_status)(struct tegra_mc *mc,
164 int (*probe)(struct tegra_mc *mc);
165 void (*remove)(struct tegra_mc *mc);
[all …]
/linux/drivers/net/ethernet/freescale/dpaa2/
H A Ddpni.c8 #include <linux/fsl/mc.h>
80 * @mc_io: Pointer to MC portal's I/O object
89 * associated with the specific object ID and the specific MC
112 /* send command to mc*/ in dpni_open()
125 * @mc_io: Pointer to MC portal's I/O object
145 /* send command to mc*/ in dpni_close()
151 * @mc_io: Pointer to MC portal's I/O object
188 /* send command to mc*/ in dpni_set_pools()
194 * @mc_io: Pointer to MC portal's I/O object
211 /* send command to mc*/ in dpni_enable()
[all …]
/linux/arch/x86/um/os-Linux/
H A Dmcontext.c12 void get_regs_from_mc(struct uml_pt_regs *regs, mcontext_t *mc) in get_regs_from_mc() argument
15 #define COPY2(X,Y) regs->gp[X] = mc->gregs[REG_##Y] in get_regs_from_mc()
16 #define COPY(X) regs->gp[X] = mc->gregs[REG_##X] in get_regs_from_mc()
17 #define COPY_SEG(X) regs->gp[X] = mc->gregs[REG_##X] & 0xffff; in get_regs_from_mc()
18 #define COPY_SEG_CPL3(X) regs->gp[X] = (mc->gregs[REG_##X] & 0xffff) | 3; in get_regs_from_mc()
29 #define COPY2(X,Y) regs->gp[X/sizeof(unsigned long)] = mc->gregs[REG_##Y] in get_regs_from_mc()
30 #define COPY(X) regs->gp[X/sizeof(unsigned long)] = mc->gregs[REG_##X] in get_regs_from_mc()
38 regs->gp[SS / sizeof(unsigned long)] = mc->gregs[REG_CSGSFS] >> 48; in get_regs_from_mc()
46 mcontext_t *mc = _mc; in mc_set_rip() local
49 mc->gregs[REG_EIP] = (unsigned long)target; in mc_set_rip()
[all …]
/linux/arch/powerpc/platforms/powernv/
H A Dopal-msglog.c34 ssize_t memcons_copy(struct memcons *mc, char *to, loff_t pos, size_t count) in memcons_copy() argument
41 if (!mc) in memcons_copy()
44 out_pos = be32_to_cpu(READ_ONCE(mc->out_pos)); in memcons_copy()
50 conbuf = phys_to_virt(be64_to_cpu(mc->obuf_phys)); in memcons_copy()
58 avail = be32_to_cpu(mc->obuf_size) - out_pos; in memcons_copy()
76 if (out_pos > be32_to_cpu(mc->obuf_size)) { in memcons_copy()
111 struct memcons *mc; in memcons_init() local
119 mc = phys_to_virt(mcaddr); in memcons_init()
120 if (!mc) { in memcons_init()
125 if (be64_to_cpu(mc->magic) != MEMCONS_MAGIC) { in memcons_init()
[all …]

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