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/freebsd/sys/dev/bwi/
H A Dbwiphy.c1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
87 static void bwi_tbl_write_2(struct bwi_mac *mac, uint16_t, uint16_t);
88 static void bwi_tbl_write_4(struct bwi_mac *mac, uint16_t, uint32_t);
135 bwi_phy_write(struct bwi_mac *mac, uint16_t ctrl, uint16_t data) in bwi_phy_write() argument
137 struct bwi_softc *sc = mac->mac_sc; in bwi_phy_write()
144 bwi_phy_read(struct bwi_mac *mac, uint16_t ctrl) in bwi_phy_read() argument
146 struct bwi_softc *sc = mac->mac_sc; in bwi_phy_read()
153 bwi_phy_attach(struct bwi_mac *mac) in bwi_phy_attach() argument
155 struct bwi_softc *sc = mac->mac_sc; in bwi_phy_attach()
[all …]
H A Dbwirf.c1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
78 #define RF_LO_WRITE(mac, lo) bwi_rf_lo_write((mac), (lo)) argument
81 (ieee80211_ieee2mhz((chan), IEEE80211_CHAN_2GHZ) - 2400)
106 #define SAVE_RF_REG(mac, regs, n) (regs)->rf_##n = RF_READ((mac), 0x##n) argument
107 #define RESTORE_RF_REG(mac, regs, n) RF_WRITE((mac), 0x##n, (regs)->rf_##n) argument
109 #define SAVE_PHY_REG(mac, regs, n) (regs)->phy_##n = PHY_READ((mac), 0x##n) argument
110 #define RESTORE_PHY_REG(mac, regs, n) PHY_WRITE((mac), 0x##n, (regs)->phy_##n) argument
159 bwi_nrssi_11g(struct bwi_mac *mac) in bwi_nrssi_11g() argument
165 val = (int16_t)__SHIFTOUT(PHY_READ(mac, 0x47f), NRSSI_11G_MASK); in bwi_nrssi_11g()
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H A Dbwimac.c1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
118 bwi_tmplt_write_4(struct bwi_mac *mac, uint32_t ofs, uint32_t val) in bwi_tmplt_write_4() argument
120 struct bwi_softc *sc = mac->mac_sc; in bwi_tmplt_write_4()
122 if (mac->mac_flags & BWI_MAC_F_BSWAP) in bwi_tmplt_write_4()
130 bwi_hostflags_write(struct bwi_mac *mac, uint64_t flags) in bwi_hostflags_write() argument
135 MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_HFLAGS_LO, val); in bwi_hostflags_write()
138 MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_HFLAGS_MI, val); in bwi_hostflags_write()
144 bwi_hostflags_read(struct bwi_mac *mac) in bwi_hostflags_read() argument
151 val = MOBJ_READ_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_HFLAGS_MI); in bwi_hostflags_read()
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/freebsd/sys/dev/bwn/
H A Dif_bwn_phy_g.c1 /*-
2 * Copyright (c) 2009-2010 Weongyo Jeong <weongyo@freebsd.org>
124 static uint16_t bwn_phy_g_txctl(struct bwn_mac *mac);
125 static int bwn_phy_shm_tssi_read(struct bwn_mac *mac, uint16_t shm_offset);
126 static void bwn_phy_g_setatt(struct bwn_mac *mac, int *bbattp, int *rfattp);
127 static void bwn_phy_lock(struct bwn_mac *mac);
128 static void bwn_phy_unlock(struct bwn_mac *mac);
129 static void bwn_rf_lock(struct bwn_mac *mac);
130 static void bwn_rf_unlock(struct bwn_mac *mac);
140 bwn_has_hwpctl(struct bwn_mac *mac) in bwn_has_hwpctl() argument
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/freebsd/sys/dev/e1000/
H A De1000_82571.c2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
88 * e1000_init_phy_params_82571 - Init PHY func ptrs.
93 struct e1000_phy_info *phy = &hw->phy; in e1000_init_phy_params_82571() local
98 if (hw->phy.media_type != e1000_media_type_copper) { in e1000_init_phy_params_82571()
99 phy->type = e1000_phy_none; in e1000_init_phy_params_82571()
103 phy->addr = 1; in e1000_init_phy_params_82571()
104 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; in e1000_init_phy_params_82571()
105 phy->reset_delay_us = 100; in e1000_init_phy_params_82571()
107 phy->ops.check_reset_block = e1000_check_reset_block_generic; in e1000_init_phy_params_82571()
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H A De1000_82541.c2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
82 * e1000_init_phy_params_82541 - Init PHY func ptrs.
87 struct e1000_phy_info *phy = &hw->phy; in e1000_init_phy_params_82541() local
92 phy->addr = 1; in e1000_init_phy_params_82541()
93 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; in e1000_init_phy_params_82541()
94 phy->reset_delay_us = 10000; in e1000_init_phy_params_82541()
95 phy->type = e1000_phy_igp; in e1000_init_phy_params_82541()
98 phy->ops.check_polarity = e1000_check_polarity_igp; in e1000_init_phy_params_82541()
99 phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_igp; in e1000_init_phy_params_82541()
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H A De1000_82540.c2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
63 * e1000_init_phy_params_82540 - Init PHY func ptrs.
68 struct e1000_phy_info *phy = &hw->phy; in e1000_init_phy_params_82540() local
71 phy->addr = 1; in e1000_init_phy_params_82540()
72 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; in e1000_init_phy_params_82540()
73 phy->reset_delay_us = 10000; in e1000_init_phy_params_82540()
74 phy->type = e1000_phy_m88; in e1000_init_phy_params_82540()
77 phy->ops.check_polarity = e1000_check_polarity_m88; in e1000_init_phy_params_82540()
78 phy->ops.commit = e1000_phy_sw_reset_generic; in e1000_init_phy_params_82540()
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H A De1000_82543.c2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
81 * e1000_init_phy_params_82543 - Init PHY func ptrs.
86 struct e1000_phy_info *phy = &hw->phy; in e1000_init_phy_params_82543() local
91 if (hw->phy.media_type != e1000_media_type_copper) { in e1000_init_phy_params_82543()
92 phy->type = e1000_phy_none; in e1000_init_phy_params_82543()
95 phy->ops.power_up = e1000_power_up_phy_copper; in e1000_init_phy_params_82543()
96 phy->ops.power_down = e1000_power_down_phy_copper; in e1000_init_phy_params_82543()
99 phy->addr = 1; in e1000_init_phy_params_82543()
100 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; in e1000_init_phy_params_82543()
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H A De1000_api.c2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
38 * e1000_init_mac_params - Initialize MAC function pointers
41 * This function initializes the function pointers for the MAC
48 if (hw->mac.ops.init_params) { in e1000_init_mac_params()
49 ret_val = hw->mac.ops.init_params(hw); in e1000_init_mac_params()
51 DEBUGOUT("MAC Initialization Error\n"); in e1000_init_mac_params()
55 DEBUGOUT("mac.init_mac_params was NULL\n"); in e1000_init_mac_params()
56 ret_val = -E1000_ERR_CONFIG; in e1000_init_mac_params()
64 * e1000_init_nvm_params - Initialize NVM function pointers
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H A De1000_ich8lan.c2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
36 * 82562G-2 10/100 Network Connection
38 * 82562GT-2 10/100 Network Connection
40 * 82562V-2 10/100 Network Connection
41 * 82566DC-2 Gigabit Network Connection
43 * 82566DM-2 Gigabit Network Connection
50 * 82567LM-2 Gigabit Network Connection
51 * 82567LF-2 Gigabit Network Connection
52 * 82567V-2 Gigabit Network Connection
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H A De1000_80003es2lan.c2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
84 * e1000_init_phy_params_80003es2lan - Init ESB2 PHY func ptrs.
89 struct e1000_phy_info *phy = &hw->phy; in e1000_init_phy_params_80003es2lan() local
94 if (hw->phy.media_type != e1000_media_type_copper) { in e1000_init_phy_params_80003es2lan()
95 phy->type = e1000_phy_none; in e1000_init_phy_params_80003es2lan()
98 phy->ops.power_up = e1000_power_up_phy_copper; in e1000_init_phy_params_80003es2lan()
99 phy->ops.power_down = e1000_power_down_phy_copper_80003es2lan; in e1000_init_phy_params_80003es2lan()
102 phy->addr = 1; in e1000_init_phy_params_80003es2lan()
103 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; in e1000_init_phy_params_80003es2lan()
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H A De1000_82575.c2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
121 * e1000_sgmii_uses_mdio_82575 - Determine if I2C pins are for external MDIO
134 switch (hw->mac.type) { in e1000_sgmii_uses_mdio_82575()
155 * e1000_init_phy_params_82575 - Initialize PHY function ptrs
160 struct e1000_phy_info *phy = &hw->phy; in e1000_init_phy_params_82575() local
166 phy->ops.read_i2c_byte = e1000_read_i2c_byte_generic; in e1000_init_phy_params_82575()
167 phy->ops.write_i2c_byte = e1000_write_i2c_byte_generic; in e1000_init_phy_params_82575()
169 if (hw->phy.media_type != e1000_media_type_copper) { in e1000_init_phy_params_82575()
170 phy->type = e1000_phy_none; in e1000_init_phy_params_82575()
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/freebsd/sys/gnu/dev/bwn/phy_n/
H A Dif_bwn_phy_n_core.c5 IEEE 802.11n PHY data tables
23 Boston, MA 02110-1301, USA.
162 static inline bool bwn_nphy_ipa(struct bwn_mac *mac) in bwn_nphy_ipa() argument
164 bwn_band_t band = bwn_current_band(mac); in bwn_nphy_ipa()
165 return ((mac->mac_phy.phy_n->ipa2g_on && band == BWN_BAND_2G) || in bwn_nphy_ipa()
166 (mac->mac_phy.phy_n->ipa5g_on && band == BWN_BAND_5G)); in bwn_nphy_ipa()
169 /* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RxCoreGetState */
170 static uint8_t bwn_nphy_get_rx_core_state(struct bwn_mac *mac) in bwn_nphy_get_rx_core_state() argument
172 return (BWN_PHY_READ(mac, BWN_NPHY_RFSEQCA) & BWN_NPHY_RFSEQCA_RXEN) >> in bwn_nphy_get_rx_core_state()
180 /* http://bcm-v4.sipsolutions.net/802.11/PHY/N/ForceRFSeq */
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/freebsd/sys/dev/ixgbe/
H A Dixgbe_x550.c3 Copyright (c) 2001-2020, Intel Corporation
47 * ixgbe_init_ops_X550 - Inits func ptrs and MAC type
50 * Initialize the function pointers and assign the MAC type for X550.
55 struct ixgbe_mac_info *mac = &hw->mac; in ixgbe_init_ops_X550() local
56 struct ixgbe_eeprom_info *eeprom = &hw->eeprom; in ixgbe_init_ops_X550()
62 mac->ops.dmac_config = ixgbe_dmac_config_X550; in ixgbe_init_ops_X550()
63 mac->ops.dmac_config_tcs = ixgbe_dmac_config_tcs_X550; in ixgbe_init_ops_X550()
64 mac->ops.dmac_update_tcs = ixgbe_dmac_update_tcs_X550; in ixgbe_init_ops_X550()
65 mac->ops.setup_eee = NULL; in ixgbe_init_ops_X550()
66 mac->ops.set_source_address_pruning = in ixgbe_init_ops_X550()
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H A Dixgbe_82598.c2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
71 * ixgbe_set_pcie_completion_timeout - set pci-e completion timeout
76 * than the 10ms recommended by the pci-e spec. To address this we need to
113 * ixgbe_init_ops_82598 - Inits func ptrs and MAC type
116 * Initialize the function pointers and assign the MAC type for 82598.
121 struct ixgbe_mac_info *mac = &hw->mac; in ixgbe_init_ops_82598() local
122 struct ixgbe_phy_info *phy = &hw->phy; in ixgbe_init_ops_82598() local
130 /* PHY */ in ixgbe_init_ops_82598()
131 phy->ops.init = ixgbe_init_phy_ops_82598; in ixgbe_init_ops_82598()
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H A Dixgbe_82599.c2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
63 struct ixgbe_mac_info *mac = &hw->mac; in ixgbe_init_mac_link_ops_82599() local
71 if ((mac->ops.get_media_type(hw) == ixgbe_media_type_fiber) && in ixgbe_init_mac_link_ops_82599()
73 mac->ops.disable_tx_laser = in ixgbe_init_mac_link_ops_82599()
75 mac->ops.enable_tx_laser = in ixgbe_init_mac_link_ops_82599()
77 mac->ops.flap_tx_laser = ixgbe_flap_tx_laser_multispeed_fiber; in ixgbe_init_mac_link_ops_82599()
80 mac->ops.disable_tx_laser = NULL; in ixgbe_init_mac_link_ops_82599()
81 mac->ops.enable_tx_laser = NULL; in ixgbe_init_mac_link_ops_82599()
82 mac->ops.flap_tx_laser = NULL; in ixgbe_init_mac_link_ops_82599()
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H A Dixgbe_api.c2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
61 * ixgbe_dcb_get_rtrup2tc - read rtrup2tc reg
69 if (hw->mac.ops.get_rtrup2tc) in ixgbe_dcb_get_rtrup2tc()
70 hw->mac.ops.get_rtrup2tc(hw, map); in ixgbe_dcb_get_rtrup2tc()
74 * ixgbe_init_shared_code - Initialize the shared code
77 * This will assign function pointers and assign the MAC type and PHY code.
92 * Set the mac type in ixgbe_init_shared_code()
96 switch (hw->mac.type) { in ixgbe_init_shared_code()
126 hw->mac.max_link_up_time = IXGBE_LINK_UP_TIME; in ixgbe_init_shared_code()
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/freebsd/sys/dev/igc/
H A Digc_api.c1 /*-
4 * SPDX-License-Identifier: BSD-3-Clause
11 * igc_init_mac_params - Initialize MAC function pointers
14 * This function initializes the function pointers for the MAC
21 if (hw->mac.ops.init_params) { in igc_init_mac_params()
22 ret_val = hw->mac.ops.init_params(hw); in igc_init_mac_params()
24 DEBUGOUT("MAC Initialization Error\n"); in igc_init_mac_params()
28 DEBUGOUT("mac.init_mac_params was NULL\n"); in igc_init_mac_params()
29 ret_val = -IGC_ERR_CONFIG; in igc_init_mac_params()
37 * igc_init_nvm_params - Initialize NVM function pointers
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/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dethernet-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - David S. Miller <davem@davemloft.net>
19 local-mac-address:
21 Specifies the MAC address that was assigned to the network device.
22 $ref: /schemas/types.yaml#/definitions/uint8-array
26 mac-address:
28 Specifies the MAC address that was last used by the boot
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H A Dhisilicon-femac.txt1 Hisilicon Fast Ethernet MAC controller
4 - compatible: should contain one of the following version strings:
5 * "hisilicon,hisi-femac-v1"
6 * "hisilicon,hisi-femac-v2"
7 and the soc string "hisilicon,hi3516cv300-femac".
8 - reg: specifies base physical address(s) and size of the device registers.
9 The first region is the MAC core register base and size.
10 The second region is the global MAC control register.
11 - interrupts: should contain the MAC interrupt.
12 - clocks: A phandle to the MAC main clock.
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H A Dftgmac100.txt4 - compatible: "faraday,ftgmac100"
10 - "aspeed,ast2400-mac"
11 - "aspeed,ast2500-mac"
12 - "aspeed,ast2600-mac"
14 - reg: Address and length of the register set for the device
15 - interrupts: Should contain ethernet controller interrupt
18 - phy-handle: See ethernet.txt file in the same directory.
19 - phy-mode: See ethernet.txt file in the same directory. If the property is
22 - use-ncsi: Use the NC-SI stack instead of an MDIO PHY. Currently assumes
23 rmii (100bT) but kept as a separate property in case NC-SI grows support
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H A Dcpsw.txt2 ------------------------------------------------------
5 - compatible : Should be one of the below:-
7 "ti,am335x-cpsw" for AM335x controllers
8 "ti,am4372-cpsw" for AM437x controllers
9 "ti,dra7-cpsw" for DRA7x controllers
10 - reg : physical base address and size of the cpsw
12 - interrupts : property with a value describing the interrupt
14 - cpdma_channels : Specifies number of channels in CPDMA
15 - ale_entries : Specifies No of entries ALE can hold
16 - bd_ram_size : Specifies internal descriptor RAM size
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/freebsd/sys/contrib/device-tree/Bindings/net/dsa/
H A Dsja1105.txt6 - compatible:
8 - "nxp,sja1105e"
9 - "nxp,sja1105t"
10 - "nxp,sja1105p"
11 - "nxp,sja1105q"
12 - "nxp,sja1105r"
13 - "nxp,sja1105s"
18 and the non-SGMII devices, while pin-compatible, are not equal in terms
24 - sja1105,role-mac:
25 - sja1105,role-phy:
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/freebsd/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-j784s4-evm-quad-port-eth-exp1.dtso1 /* SPDX-License-Identifier: GPL-2.0-only OR MIT */
3 * DT Overlay for CPSW9G in QSGMII mode using J7 Quad Port ETH EXP Add-On Ethernet Card with
4 * J784S4 EVM. The Add-On Ethernet Card has to be connected to ENET Expansion 1 slot on the
11 * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/
14 /dts-v1/;
17 #include <dt-bindings/gpio/gpio.h>
18 #include <dt-bindings/phy/phy-cadence.h>
19 #include <dt-bindings/phy/phy.h>
21 #include "k3-pinctrl.h"
22 #include "k3-serdes.h"
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/freebsd/sys/contrib/device-tree/src/mips/cavium-octeon/
H A Docteon_3xxx.dts1 // SPDX-License-Identifier: GPL-2.0
6 * use. Because of this, it contains a super-set of the available
15 phy0: ethernet-phy@0 {
17 marvell,reg-init =
21 <3 0x11 0 0x442a>, /* Reg 3,17 <- 0442a */
22 /* irq, blink-activity, blink-link */
23 <3 0x10 0 0x0242>; /* Reg 3,16 <- 0x0242 */
27 phy1: ethernet-phy@1 {
29 marvell,reg-init =
33 <3 0x11 0 0x442a>, /* Reg 3,17 <- 0442a */
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