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/freebsd/sys/contrib/libb2/
H A Dblake2s-load-sse2.h19 #define LOAD_MSG_0_3(buf) buf = _mm_set_epi32(m14,m12,m10,m8)
24 #define LOAD_MSG_1_4(buf) buf = _mm_set_epi32(m3,m7,m2,m12)
25 #define LOAD_MSG_2_1(buf) buf = _mm_set_epi32(m15,m5,m12,m11)
30 #define LOAD_MSG_3_2(buf) buf = _mm_set_epi32(m14,m12,m1,m9)
36 #define LOAD_MSG_4_4(buf) buf = _mm_set_epi32(m13,m8,m12,m1)
38 #define LOAD_MSG_5_2(buf) buf = _mm_set_epi32(m3,m11,m10,m12)
41 #define LOAD_MSG_6_1(buf) buf = _mm_set_epi32(m4,m14,m1,m12)
45 #define LOAD_MSG_7_1(buf) buf = _mm_set_epi32(m3,m12,m7,m13)
51 #define LOAD_MSG_8_3(buf) buf = _mm_set_epi32(m10,m1,m13,m12)
56 #define LOAD_MSG_9_4(buf) buf = _mm_set_epi32(m0,m12,m14,m11)
H A Dblake2b-load-sse2.h19 #define LOAD_MSG_0_3(b0, b1) b0 = _mm_set_epi64x(m10, m8); b1 = _mm_set_epi64x(m14, m12)
24 #define LOAD_MSG_1_4(b0, b1) b0 = _mm_set_epi64x(m2, m12); b1 = _mm_set_epi64x(m3, m7)
25 #define LOAD_MSG_2_1(b0, b1) b0 = _mm_set_epi64x(m12, m11); b1 = _mm_set_epi64x(m15, m5)
30 #define LOAD_MSG_3_2(b0, b1) b0 = _mm_set_epi64x(m1, m9); b1 = _mm_set_epi64x(m14, m12)
36 #define LOAD_MSG_4_4(b0, b1) b0 = _mm_set_epi64x(m12, m1); b1 = _mm_set_epi64x(m13, m8)
38 #define LOAD_MSG_5_2(b0, b1) b0 = _mm_set_epi64x(m10, m12); b1 = _mm_set_epi64x(m3, m11)
41 #define LOAD_MSG_6_1(b0, b1) b0 = _mm_set_epi64x(m1, m12); b1 = _mm_set_epi64x(m4, m14)
45 #define LOAD_MSG_7_1(b0, b1) b0 = _mm_set_epi64x(m7, m13); b1 = _mm_set_epi64x(m3, m12)
51 #define LOAD_MSG_8_3(b0, b1) b0 = _mm_set_epi64x(m13, m12); b1 = _mm_set_epi64x(m10, m1)
56 #define LOAD_MSG_9_4(b0, b1) b0 = _mm_set_epi64x(m14, m11); b1 = _mm_set_epi64x(m0, m12)
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H A Dblake2s.c306 const uint32_t m12 = ( ( uint32_t * )block )[12]; in blake2s_compress() local
H A Dblake2b.c321 const uint64_t m12 = ( ( uint64_t * )block )[12]; in blake2b_compress() local
/freebsd/sys/contrib/libsodium/src/libsodium/crypto_generichash/blake2b/ref/
H A Dblake2b-load-sse2.h27 b1 = _mm_set_epi64x(m14, m12)
41 b0 = _mm_set_epi64x(m2, m12); \
44 b0 = _mm_set_epi64x(m12, m11); \
60 b1 = _mm_set_epi64x(m14, m12)
77 b0 = _mm_set_epi64x(m12, m1); \
83 b0 = _mm_set_epi64x(m10, m12); \
92 b0 = _mm_set_epi64x(m1, m12); \
105 b1 = _mm_set_epi64x(m3, m12)
122 b0 = _mm_set_epi64x(m13, m12); \
138 b1 = _mm_set_epi64x(m0, m12)
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H A Dblake2b-compress-ssse3.c54 const uint64_t m12 = ((uint64_t *) block)[12]; in blake2b_compress_ssse3() local
/freebsd/lib/libmd/aarch64/
H A Dmd5block.S122 m12 .req w23 label
159 ldp m12, m13, [buf, #48]
166 rounds0 m12, m13, m14, m15, 0x6b901122, 0xfd987193, 0xa679438e, 0x49b40821
171 rounds1 m13, m2, m7, m12, 0xa9e3e905, 0xfcefa3f8, 0x676f02d9, 0x8d2a4c8a
176 rounds2 m9, m12, m15, m2, 0xd9d4d039, 0xe6db99e5, 0x1fa27cf8, 0xc4ac5665
179 rounds3 m12, m3, m10, m1, 0x655b59c3, 0x8f0ccc92, 0xffeff47d, 0x85845dd1
/freebsd/contrib/ntp/html/drivers/
H A Ddriver30.html26 …torola Oncore GPS receivers</a> (Basic, PVT6, VP, UT, UT+, GT, GT+, SL, M12, M12+T), as long as th…
27 …he VP, the UT+, the &quot;Remote&quot; which is a prepackaged UT+, and the M12 Timing. The VP is n…
51 …precise down to 50 nsec (1 sigma) for the VP/UT models and 25 nsec for the M12 Timing. If you do n…
H A Doncore-shmem.html21 …u have. The Manual for the VP only exists as a paper document, the UT+/GT+/M12 manuals are availab…
/freebsd/contrib/ntp/ntpd/
H A Drefclock_oncore.c12 * should work with Basic, PVT6, VP, UT, UT+, GT, GT+, SL, M12, M12+T
13 * The receivers with TRAIM (VP, UT, UT+, M12+T), will be more accurate
31 * (Basic) (M12)
43 * (M12+T) (M12+T later version)
243 * on the VP/UT, but have moved on the M12. As such we extract
257 * see what mode it is in. The bits on the M12 are multiplexed with
310 u_char chan; /* 6 for PVT6 or BASIC, 8 for UT/VP, 12 for m12, 0 if unknown */
311 s_char traim; /* do we have traim? yes UT/VP, M12
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/freebsd/sys/contrib/device-tree/Bindings/input/touchscreen/
H A Dedt-ft5x06.yaml97 M12 supports range from 1 to 255 Hz.
/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3588-jaguar-ethernet-switch.dtso10 * two user controllable LEDs, and an M12 12-pin connector which exposes the
/freebsd/sys/contrib/dev/rtw89/
H A Dcam.c1126 h2c->m12 = cpu_to_le32(DCTLINFO_V2_W12_ALL); in rtw89_cam_fill_dctl_sec_cam_info_v2()
H A Dfw.h1399 __le32 m12; member
H A Dfw.c2294 h2c->m12 = cpu_to_le32(DCTLINFO_V2_W12_ALL);
/freebsd/crypto/openssl/crypto/modes/asm/
H A Daes-gcm-riscv64-zvkb-zvkg-zvkned.pl54 # T9 = (T5+M9)*H^4 T10 = (T6+M10)*H^3 T11 = (T7+M11)*H^2 T12 = (T8+M12)*H^1
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.cpp317 // A = FMA X, M11, M12 (Leaf)
321 // A = FMUL M11, M12
/freebsd/contrib/ntp/
H A DChangeLog3158 * [Bug 1390] Control PPS on the Oncore M12.
H A DCommitLog[all...]
/freebsd/share/misc/
H A Dpci_vendors1905 4e56 RV360/M12 [Mobility Radeon 9550]