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/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Dloongson,liointc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controlle
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H A Dloongson,eiointc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,eiointc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson Extended I/O Interrupt Controller
10 - Binbin Zhou <zhoubinbin@loongson.cn>
13 This interrupt controller is found on the Loongson-3 family chips and
14 Loongson-2K series chips and is used to distribute interrupts directly to
18 - $ref: /schemas/interrupt-controller.yaml#
23 - loongson,ls2k0500-eiointc
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H A Dloongson,htvec.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,htvec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson-3 HyperTransport Interrupt Vector Controller
10 - Jiaxun Yang <jiaxun.yang@flygoat.com>
13 This interrupt controller is found in the Loongson-3 family of chips for
18 const: loongson,htvec-1.0
28 interrupt-controller: true
30 '#interrupt-cells':
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H A Dloongson,htpic.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,htpic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson-3 HyperTransport Interrupt Controller
10 - Jiaxun Yang <jiaxun.yang@flygoat.com>
13 - $ref: /schemas/interrupt-controller.yaml#
16 This interrupt controller is found in the Loongson-3 family of chips to transmit
21 const: loongson,htpic-1.0
32 interrupt-controller: true
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/freebsd/sys/contrib/device-tree/src/loongarch/
H A Dloongson-2k0500.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2023 Loongson Technology Corporation Limited
6 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/clock/loongson,ls2k-clk.h>
12 #address-cells = <2>;
13 #size-cells = <2>;
16 #address-cells = <1>;
17 #size-cells = <0>;
20 compatible = "loongson,la264";
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H A Dloongson-2k2000.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2023 Loongson Technology Corporation Limited
6 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/clock/loongson,ls2k-clk.h>
12 #address-cells = <2>;
13 #size-cells = <2>;
16 #address-cells = <1>;
17 #size-cells = <0>;
20 compatible = "loongson,la364";
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H A Dloongson-2k1000.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2023 Loongson Technology Corporation Limited
6 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/clock/loongson,ls2k-clk.h>
10 #include <dt-bindings/gpio/gpio.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
17 #address-cells = <1>;
18 #size-cells = <0>;
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/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Dloongson.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/loongson.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson PCI Host Controller
10 - Jiaxun Yang <jiaxun.yang@flygoat.com>
13 PCI host controller found on Loongson PCHs and SoCs.
16 - $ref: /schemas/pci/pci-host-bridge.yaml#
21 - loongson,ls2k-pci
22 - loongson,ls7a-pci
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/freebsd/sys/contrib/device-tree/Bindings/dma/
H A Dloongson,ls1b-apbdma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/loongson,ls1b-apbdma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson-1 APB DMA Controller
10 - Keguang Zhang <keguang.zhang@gmail.com>
13 Loongson-1 APB DMA controller provides 3 independent channels for
19 - const: loongson,ls1b-apbdma
20 - items:
21 - enum:
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/freebsd/sys/contrib/device-tree/src/mips/loongson/
H A Dloongson64-2k1000.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include <dt-bindings/interrupt-controller/irq.h>
8 compatible = "loongson,loongson2k1000";
10 #address-cells = <2>;
11 #size-cells = <2>;
14 #address-cells = <1>;
15 #size-cells = <0>;
19 compatible = "loongson,gs264";
21 #clock-cells = <1>;
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H A Dloongson64v_4core_virtio.dts1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/interrupt-controller/irq.h>
5 /dts-v1/;
7 compatible = "loongson,loongson64v-4core-virtio";
8 #address-cells = <2>;
9 #size-cells = <2>;
11 cpuintc: interrupt-controller {
12 #address-cells = <0>;
13 #interrupt-cells = <1>;
14 interrupt-controller;
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H A Dls7a-pch.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 compatible = "simple-bus";
6 #address-cells = <2>;
7 #size-cells = <2>;
13 pic: interrupt-controller@10000000 {
14 compatible = "loongson,pch-pic-1.
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H A Dloongson3-package.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/interrupt-controller/irq.h>
6 #address-cells = <2>;
7 #size-cells = <2>;
9 cpuintc: interrupt-controller {
10 #address-cells = <0>;
11 #interrupt-cells = <1>;
12 interrupt-controller;
13 compatible = "mti,cpu-interrupt-controller";
17 compatible = "simple-bus";
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H A Dloongson64c-package.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/interrupt-controller/irq.h>
6 #address-cells = <2>;
7 #size-cells = <2>;
9 cpuintc: interrupt-controller {
10 #address-cells = <0>;
11 #interrupt-cells = <1>;
12 interrupt-controller;
13 compatible = "mti,cpu-interrupt-controller";
17 compatible = "simple-bus";
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H A Dloongson64g-package.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/interrupt-controller/irq.h>
6 #address-cells = <2>;
7 #size-cells = <2>;
9 cpuintc: interrupt-controller {
10 #address-cells = <0>;
11 #interrupt-cells = <1>;
12 interrupt-controller;
13 compatible = "mti,cpu-interrupt-controller";
17 compatible = "simple-bus";
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H A Drs780e-pch.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 compatible = "simple-bus";
6 #address-cells = <2>;
7 #size-cells = <2>;
13 compatible = "loongson,rs780e-pci";
15 #address-cells = <3>;
16 #size-cells = <2>;
26 #address-cells = <2>;
27 #size-cells = <1>;
34 interrupt-parent = <&htpic>;
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/freebsd/sys/contrib/device-tree/Bindings/mips/loongson/
H A Drs780e-acpi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mips/loongson/rs780
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/freebsd/contrib/llvm-project/llvm/include/llvm/TargetParser/
H A DLoongArchTargetParser.h1 //==-- LoongArch64TargetParser - Parser for LoongArch64 features --*- C++ -*-=//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
26 // 64-bit ISA is available.
29 // Single-precision floating-point instructions are available.
32 // Double-precision floating-point instructions are available.
33 FK_FP64 = 1 << 3,
35 // Loongson SIMD Extension is available.
38 // Loongson Advanced SIMD Extension is available.
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/freebsd/contrib/llvm-project/llvm/include/llvm/Support/
H A DMipsABIFlags.h1 //===--- MipsABIFlags.h - MIPS ABI flags ----------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 // https://dmz-portal.mips.com/wiki/MIPS_O32_ABI_-_FR0_and_FR1_Interlinking
14 //===----------------------------------------------------------------------===//
25 AFL_REG_32 = 0x01, // 32-bit registers
26 AFL_REG_64 = 0x02, // 64-bit registers
27 AFL_REG_128 = 0x03 // 128-bit registers
37 AFL_ASE_MIPS3D = 0x00000020, // MIPS-3D ASE
54 AFL_EXT_OCTEONP = 3, // Cavium Networks OcteonP
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/freebsd/sys/contrib/device-tree/include/dt-bindings/clock/
H A Dloongson,ls2k-clk.h1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
3 * Author: Yinbo Zhu <zhuyinbo@loongson.cn>
4 * Copyright (C) 2022-2023 Loongson Technology Corporation Limited
13 #define LOONGSON2_DC_PLL 3
H A Dloongson,ls1x-clk.h1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
3 * Loongson-1 clock tree IDs
14 #define LS1X_CLKID_AHB 3
/freebsd/contrib/llvm-project/llvm/include/llvm/BinaryFormat/ELFRelocs/
H A DLoongArch.def6 // https://github.com/loongson/LoongArch-Documentation
14 ELF_RELOC(R_LARCH_RELATIVE, 3)
66 // Spec addition: https://github.com/loongson/LoongArch-Documentation/pull/57
110 // Spec addition: https://github.com/loongson/la-abi-specs/pull/1
127 // Spec addition: https://github.com/loongson/la-ab
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/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dsnps,dwmac.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <alexandre.torgue@foss.st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
23 - snps,dwmac
24 - snps,dwmac-3.40a
25 - snps,dwmac-3.50a
26 - snps,dwmac-3.610
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/freebsd/sys/sys/
H A Delf_common.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
62 #define ODK_PAD 3 /* section padding */
92 #define OHW_R4KEOP 0x00000001 /* patch for R4000 branch at end-of-page bug */
94 #define OHW_R5KEOP 0x00000004 /* patch for R5000 branch at end-of-page bug */
101 #define OHWA0_R4KEOP_CHECKED 0x00000001 /* object checked for R4000 end-of-page bug */
102 #define OHWA0_R4KEOP_CLEAN 0x00000002 /* object verified clean for R4000 end-of-page bug */
109 #define OGP_SELF 0x00010000 /* GP group is self-contained */
112 * The header for GNU-style hash sections.
129 #define EI_MAG3 3 /* Magic number, byte 3. */
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/freebsd/crypto/openssl/crypto/md5/asm/
H A Dmd5-loongarch64.pl2 # Author: Min Zhou <zhoumin@loongson.cn>
3 # Copyright 2023-2025 The OpenSSL Project Authors. All Rights Reserved.
10 # Reference to crypto/md5/asm/md5-x86_64.pl
17 my ($zero,$ra,$tp,$sp,$fp)=map("\$r$_",(0..3,22));
37 # 32-bit immediate into a general register. Meanwhile, the instruction lu12i.w
38 # treats the 20-bit immediate as a signed number. So if the T_i_h is greater
43 # https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html#_lu12i_w_lu32i_d_lu52i_d
45 $T_i_h = -((1<<32) - (0xfff00000 | $T_i_h)) if ($T_i_h >= (1<<19));
47 $code .= " ld.w $t0,$a1,0 /* (NEXT STEP) X[0] */\n" if ($pos == -1);
48 $code .= " xor $t1,$y,$z /* y ^ z */\n" if ($pos == -1);
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