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/linux/drivers/md/dm-vdo/indexer/
H A Dindex-layout.c6 #include "index-layout.h"
21 * The UDS layout on storage media is divided into a number of fixed-size regions, the sizes of
40 * The header contains the encoded region layout table as well as some index configuration data.
53 * The header contains the encoded region layout table as well as index state data for that save.
100 static const u8 LAYOUT_MAGIC[] = "*ALBIREO*SINGLE*FILE*LAYOUT*001*";
296 static int __must_check open_layout_reader(struct index_layout *layout, in open_layout_reader() argument
300 return uds_make_buffered_reader(layout->factory, lr->start_block + offset, in open_layout_reader()
304 static int open_region_reader(struct index_layout *layout, struct layout_region *region, in open_region_reader() argument
307 return open_layout_reader(layout, region, -layout->super.start_offset, in open_region_reader()
311 static int __must_check open_layout_writer(struct index_layout *layout, in open_layout_writer() argument
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H A Dindex-layout.h14 * The index layout describes the format of the index on the underlying storage, and is responsible
24 void uds_free_index_layout(struct index_layout *layout);
26 int __must_check uds_replace_index_layout_storage(struct index_layout *layout,
29 int __must_check uds_load_index_state(struct index_layout *layout,
32 int __must_check uds_save_index_state(struct index_layout *layout,
35 int __must_check uds_discard_open_chapter(struct index_layout *layout);
37 u64 __must_check uds_get_volume_nonce(struct index_layout *layout);
39 int __must_check uds_open_volume_bufio(struct index_layout *layout, size_t block_size,
/linux/drivers/clk/at91/
H A Dclk-programmable.c18 #define PROG_PRES(layout, pckr) ((pckr >> layout->pres_shift) & layout->pres_mask) argument
26 const struct clk_programmable_layout *layout; member
36 const struct clk_programmable_layout *layout = prog->layout; in clk_programmable_recalc_rate() local
42 if (layout->is_pres_direct) in clk_programmable_recalc_rate()
43 rate = parent_rate / (PROG_PRES(layout, pckr) + 1); in clk_programmable_recalc_rate()
45 rate = parent_rate >> PROG_PRES(layout, pckr); in clk_programmable_recalc_rate()
54 const struct clk_programmable_layout *layout = prog->layout; in clk_programmable_determine_rate() local
68 if (layout->is_pres_direct) { in clk_programmable_determine_rate()
69 for (shift = 0; shift <= layout->pres_mask; shift++) { in clk_programmable_determine_rate()
75 for (shift = 0; shift < layout->pres_mask; shift++) { in clk_programmable_determine_rate()
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H A Dclk-pll.c20 #define PLL_MUL(reg, layout) (((reg) >> (layout)->mul_shift) & \ argument
21 (layout)->mul_mask)
23 #define PLL_MUL_MASK(layout) ((layout)->mul_mask) argument
24 #define PLL_MUL_MAX(layout) (PLL_MUL_MASK(layout) + 1) argument
41 const struct clk_pll_layout *layout; member
59 const struct clk_pll_layout *layout = pll->layout; in clk_pll_prepare() local
73 mul = PLL_MUL(pllr, layout); in clk_pll_prepare()
87 regmap_update_bits(regmap, offset, layout->pllr_mask, in clk_pll_prepare()
90 ((pll->mul & layout->mul_mask) << layout->mul_shift)); in clk_pll_prepare()
108 unsigned int mask = pll->layout->pllr_mask; in clk_pll_unprepare()
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H A Dclk-generated.c29 const struct clk_pcr_layout *layout; member
44 regmap_write(gck->regmap, gck->layout->offset, in clk_generated_set()
45 (gck->id & gck->layout->pid_mask)); in clk_generated_set()
46 regmap_update_bits(gck->regmap, gck->layout->offset, in clk_generated_set()
47 AT91_PMC_PCR_GCKDIV_MASK | gck->layout->gckcss_mask | in clk_generated_set()
48 gck->layout->cmd | enable, in clk_generated_set()
49 field_prep(gck->layout->gckcss_mask, gck->parent_id) | in clk_generated_set()
50 gck->layout->cmd | in clk_generated_set()
76 regmap_write(gck->regmap, gck->layout->offset, in clk_generated_disable()
77 (gck->id & gck->layout->pid_mask)); in clk_generated_disable()
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H A Dclk-sam9x60-pll.c32 const struct clk_pll_layout *layout; member
81 if (core->layout->div2) in sam9x60_frac_pll_recalc_rate()
99 cmul = (val & core->layout->mul_mask) >> core->layout->mul_shift; in sam9x60_frac_pll_set()
100 cfrac = (val & core->layout->frac_mask) >> core->layout->frac_shift; in sam9x60_frac_pll_set()
111 (frac->mul << core->layout->mul_shift) | in sam9x60_frac_pll_set()
112 (frac->frac << core->layout->frac_shift)); in sam9x60_frac_pll_set()
269 cmul = (val & core->layout->mul_mask) >> core->layout->mul_shift; in sam9x60_frac_pll_set_rate_chg()
270 cfrac = (val & core->layout->frac_mask) >> core->layout->frac_shift; in sam9x60_frac_pll_set_rate_chg()
276 (frac->mul << core->layout->mul_shift) | in sam9x60_frac_pll_set_rate_chg()
277 (frac->frac << core->layout->frac_shift)); in sam9x60_frac_pll_set_rate_chg()
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H A Dclk-peripheral.c40 const struct clk_pcr_layout *layout; member
174 regmap_write(periph->regmap, periph->layout->offset, in clk_sam9x5_peripheral_set()
175 (periph->id & periph->layout->pid_mask)); in clk_sam9x5_peripheral_set()
176 regmap_update_bits(periph->regmap, periph->layout->offset, in clk_sam9x5_peripheral_set()
177 periph->layout->div_mask | periph->layout->cmd | in clk_sam9x5_peripheral_set()
179 field_prep(periph->layout->div_mask, periph->div) | in clk_sam9x5_peripheral_set()
180 periph->layout->cmd | enable); in clk_sam9x5_peripheral_set()
202 regmap_write(periph->regmap, periph->layout->offset, in clk_sam9x5_peripheral_disable()
203 (periph->id & periph->layout->pid_mask)); in clk_sam9x5_peripheral_disable()
204 regmap_update_bits(periph->regmap, periph->layout->offset, in clk_sam9x5_peripheral_disable()
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H A Dclk-master.c31 const struct clk_master_layout *layout; member
90 const struct clk_master_layout *layout = master->layout; in clk_master_div_recalc_rate() local
96 regmap_read(master->regmap, master->layout->offset, &mckr); in clk_master_div_recalc_rate()
99 mckr &= layout->mask; in clk_master_div_recalc_rate()
121 regmap_read(master->regmap, master->layout->offset, &mckr); in clk_master_div_save_context()
124 mckr &= master->layout->mask; in clk_master_div_save_context()
142 regmap_read(master->regmap, master->layout->offset, &mckr); in clk_master_div_restore_context()
145 mckr &= master->layout->mask; in clk_master_div_restore_context()
188 ret = regmap_read(master->regmap, master->layout->offset, &mckr); in clk_master_div_set()
192 mckr &= master->layout->mask; in clk_master_div_set()
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/linux/drivers/net/can/spi/mcp251xfd/
H A Dmcp251xfd-ethtool.c22 struct can_ram_layout layout; in mcp251xfd_ring_get_ringparam() local
24 can_ram_get_layout(&layout, &mcp251xfd_ram_config, NULL, NULL, fd_mode); in mcp251xfd_ring_get_ringparam()
25 ring->rx_max_pending = layout.max_rx; in mcp251xfd_ring_get_ringparam()
26 ring->tx_max_pending = layout.max_tx; in mcp251xfd_ring_get_ringparam()
40 struct can_ram_layout layout; in mcp251xfd_ring_set_ringparam() local
42 can_ram_get_layout(&layout, &mcp251xfd_ram_config, ring, NULL, fd_mode); in mcp251xfd_ring_set_ringparam()
43 if ((layout.cur_rx != priv->rx_obj_num || in mcp251xfd_ring_set_ringparam()
44 layout.cur_tx != priv->tx->obj_num) && in mcp251xfd_ring_set_ringparam()
48 priv->rx_obj_num = layout.cur_rx; in mcp251xfd_ring_set_ringparam()
49 priv->rx_obj_num_coalesce_irq = layout.rx_coalesce; in mcp251xfd_ring_set_ringparam()
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H A Dmcp251xfd-ram.c60 void can_ram_get_layout(struct can_ram_layout *layout, in can_ram_get_layout() argument
79 layout->default_rx = can_ram_rounddown_pow_of_two(config, &config->rx, 0, num_rx); in can_ram_get_layout()
80 layout->default_tx = num_tx; in can_ram_get_layout()
92 layout->max_rx = can_ram_rounddown_pow_of_two(config, &config->rx, 0, num_rx); in can_ram_get_layout()
93 layout->max_tx = can_ram_rounddown_pow_of_two(config, &config->tx, 0, num_tx); in can_ram_get_layout()
106 if (num_rx > layout->max_rx) in can_ram_get_layout()
107 num_rx = layout->default_rx; in can_ram_get_layout()
152 layout->cur_rx = num_rx; in can_ram_get_layout()
153 layout->cur_tx = num_tx; in can_ram_get_layout()
154 layout->rx_coalesce = num_rx_coalesce; in can_ram_get_layout()
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/linux/drivers/gpio/
H A Dgpio-creg-snps.c27 const struct creg_layout *layout; member
33 const struct creg_layout *layout = hcg->layout; in creg_gpio_set() local
38 value = val ? hcg->layout->on[offset] : hcg->layout->off[offset]; in creg_gpio_set()
40 reg_shift = layout->shift[offset]; in creg_gpio_set()
42 reg_shift += layout->bit_per_gpio[i] + layout->shift[i]; in creg_gpio_set()
46 reg &= ~(GENMASK(layout->bit_per_gpio[i] - 1, 0) << reg_shift); in creg_gpio_set()
62 const struct creg_layout *layout = hcg->layout; in creg_gpio_validate_pg() local
64 if (layout->bit_per_gpio[i] < 1 || layout->bit_per_gpio[i] > 8) in creg_gpio_validate_pg()
68 if (GENMASK(31, layout->bit_per_gpio[i]) & layout->on[i]) in creg_gpio_validate_pg()
72 if (GENMASK(31, layout->bit_per_gpio[i]) & layout->off[i]) in creg_gpio_validate_pg()
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/linux/drivers/nvmem/
H A Dlayouts.c3 * NVMEM layout bus handling
32 struct nvmem_layout *layout = to_nvmem_layout_device(dev); in nvmem_layout_bus_probe() local
37 return drv->probe(layout); in nvmem_layout_bus_probe()
43 struct nvmem_layout *layout = to_nvmem_layout_device(dev); in nvmem_layout_bus_remove() local
45 return drv->remove(layout); in nvmem_layout_bus_remove()
61 .name = "nvmem-layout",
86 struct nvmem_layout *layout = to_nvmem_layout_device(dev); in nvmem_layout_release_device() local
88 of_node_put(layout->dev.of_node); in nvmem_layout_release_device()
89 kfree(layout); in nvmem_layout_release_device()
95 struct nvmem_layout *layout; in nvmem_layout_create_device() local
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/linux/drivers/md/dm-vdo/
H A Dencodings.c786 * allocate_partition() - Allocate a partition and add it to a layout.
787 * @layout: The layout containing the partition.
789 * @offset: The offset into the layout at which the partition begins.
794 static int allocate_partition(struct layout *layout, u8 id, in allocate_partition() argument
807 partition->next = layout->head; in allocate_partition()
808 layout->head = partition; in allocate_partition()
815 * layout.
816 * @layout: The layout.
824 static int __must_check make_partition(struct layout *layout, enum partition_id id, in make_partition() argument
829 block_count_t free_blocks = layout->last_free - layout->first_free; in make_partition()
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/linux/rust/kernel/
H A Dalloc.rs8 pub mod layout; module
26 use core::{alloc::Layout, ptr::NonNull};
141 /// via [`Layout`].
165 /// the requested layout has a smaller alignment.
168 /// Allocate memory based on `layout`, `flags` and `nid`.
170 /// On success, returns a buffer represented as `NonNull<[u8]>` that satisfies the layout
171 /// constraints (i.e. minimum size and alignment as specified by `layout`).
178 /// - valid for reads and writes for `layout.size()` bytes, until it is passed to
180 /// - aligned to `layout.align()`,
184 fn alloc(layout: Layout, flags: Flags, nid: NumaNode) -> Result<NonNull<[u8]>, AllocError> { in alloc() argument
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/linux/rust/kernel/alloc/
H A Dallocator.rs12 use core::alloc::Layout;
87 layout: Layout, in call() argument
88 old_layout: Layout, in call() argument
92 let size = layout.size(); in call()
114 self.0(ptr.cast(), size, layout.align(), flags.0, nid.0).cast() in call()
118 crate::alloc::dangling_from_layout(layout) in call()
128 /// Returns a [`Layout`] that makes [`Kmalloc`] fulfill the requested size and alignment of
129 /// `layout`.
130 pub fn aligned_layout(layout: Layout) -> Layout { in aligned_layout() argument
131 // Note that `layout.size()` (after padding) is guaranteed to be a multiple of in aligned_layout()
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/linux/Documentation/filesystems/nfs/
H A Dpnfs.rst17 Each nfs_inode may hold a pointer to a cache of these layout
18 segments in nfsi->layout, of type struct pnfs_layout_hdr.
26 the reference count, as the layout is kept around by the lseg that
33 layout driver type. The device ids are held in a RCU cache (struct
62 layout drivers
65 PNFS utilizes what is called layout drivers. The STD defines 4 basic
66 layout types: "files", "objects", "blocks", and "flexfiles". For each
67 of these types there is a layout-driver with a common function-vectors
69 different layout types.
71 Files-layout-driver code is in: fs/nfs/filelayout/.. directory
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/linux/include/linux/
H A Dnvmem-provider.h102 * @layout: Fixed layout associated with this nvmem device.
127 struct nvmem_layout *layout; member
141 * struct nvmem_layout - NVMEM layout definitions
143 * @dev: Device-model layout device.
146 * has this layout. The function will add layout
151 * pairs. A nvmem layout can parse the nvmem device and add appropriate
157 int (*add_cells)(struct nvmem_layout *layout);
162 int (*probe)(struct nvmem_layout *layout);
163 void (*remove)(struct nvmem_layout *layout);
177 int nvmem_layout_register(struct nvmem_layout *layout);
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/linux/fs/ceph/
H A Dioctl.h11 * CEPH_IOC_GET_LAYOUT - get file layout or dir layout policy
12 * CEPH_IOC_SET_LAYOUT - set file layout
13 * CEPH_IOC_SET_LAYOUT_POLICY - set dir layout policy
15 * The file layout specifies how file data is striped over objects in
20 * Files get a new layout based on the policy set on the containing
22 * you examine the layout for a file or the policy on a directory.
24 * SET_LAYOUT will let you set a layout on a newly created file. This
28 * SET_LAYOUT_POLICY will let you set a layout policy (default layout)
30 * directory (or any child directory that doesn't specify a layout of
H A Dioctl.c16 * get and set the file layout
78 /* validate changed params against current layout */ in ceph_ioctl_set_layout()
118 req->r_args.setlayout.layout.fl_stripe_unit = in ceph_ioctl_set_layout()
120 req->r_args.setlayout.layout.fl_stripe_count = in ceph_ioctl_set_layout()
122 req->r_args.setlayout.layout.fl_object_size = in ceph_ioctl_set_layout()
124 req->r_args.setlayout.layout.fl_pg_pool = cpu_to_le32(l.data_pool); in ceph_ioctl_set_layout()
132 * Set a layout policy on a directory inode. All items in the tree
133 * rooted at this inode will inherit this layout on creation,
135 * unless a subdirectory has its own layout policy.
162 req->r_args.setlayout.layout.fl_stripe_unit = in ceph_ioctl_set_layout_policy()
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/linux/Documentation/devicetree/bindings/nvmem/layouts/
H A Dfixed-layout.yaml4 $id: http://devicetree.org/schemas/nvmem/layouts/fixed-layout.yaml#
7 title: NVMEM layout for fixed NVMEM cells
10 Many NVMEM devices have hardcoded cells layout (offset and size of defined
13 This binding allows defining such NVMEM layout with its cells. It can be used
21 const: fixed-layout
42 nvmem-layout {
43 compatible = "fixed-layout";
H A Donie,tlv-layout.yaml4 $id: http://devicetree.org/schemas/nvmem/layouts/onie,tlv-layout.yaml#
7 title: NVMEM layout of the ONIE tlv table
26 const: onie,tlv-layout
116 nvmem-layout {
117 compatible = "onie,tlv-layout";
137 nvmem-layout {
138 compatible = "onie,tlv-layout";
/linux/include/uapi/drm/
H A Ddrm_fourcc.h46 * format and data layout of the buffer, and should be the only way to describe
49 * Having multiple fourcc:modifier pairs which describe the same layout should
61 * Modifiers must uniquely encode buffer layout. In other words, a buffer must
305 * then V), but the exact Linear layout is undefined.
497 * When adding a new token please document the layout with a code comment,
513 * In future cases where a generic layout is identified before merging with a
537 * Linear Layout
539 * Just plain linear layout. Note that this is different from no specifying any
550 * implicit, instead it means that the layout is linear. Whether modifiers are
559 * Intel X-tiling layout
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/linux/drivers/nvmem/layouts/
H A Du-boot-env.c170 static int u_boot_env_add_cells(struct nvmem_layout *layout) in u_boot_env_add_cells() argument
172 struct device *dev = &layout->dev; in u_boot_env_add_cells()
177 return u_boot_env_parse(dev, layout->nvmem, format); in u_boot_env_add_cells()
180 static int u_boot_env_probe(struct nvmem_layout *layout) in u_boot_env_probe() argument
182 layout->add_cells = u_boot_env_add_cells; in u_boot_env_probe()
184 return nvmem_layout_register(layout); in u_boot_env_probe()
187 static void u_boot_env_remove(struct nvmem_layout *layout) in u_boot_env_remove() argument
189 nvmem_layout_unregister(layout); in u_boot_env_remove()
202 .name = "u-boot-env-layout",
213 MODULE_DESCRIPTION("NVMEM layout driver for U-Boot environment variables");
/linux/drivers/md/
H A Draid0.h9 int disk_shift; /* start disk for the original layout */
13 * the RAID0 layout for multi-zone arrays (where devices aren't all
15 * RAID0_ORIG_LAYOUT restores the original layout
16 * RAID0_ALT_MULTIZONE_LAYOUT uses the altered layout
30 enum r0layout layout; member
/linux/drivers/clk/samsung/
H A Dclk-cpu.h17 * enum exynos_cpuclk_layout - CPU clock registers layout compatibility
18 * @CPUCLK_LAYOUT_E4210: Exynos4210 compatible layout
19 * @CPUCLK_LAYOUT_E5433: Exynos5433 compatible layout
20 * @CPUCLK_LAYOUT_E850_CL0: Exynos850 cluster 0 compatible layout
21 * @CPUCLK_LAYOUT_E850_CL1: Exynos850 cluster 1 compatible layout

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