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/linux/tools/perf/pmu-events/arch/x86/lunarlake/
H A D	memory.json	3 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 11 …s when the latency from first dispatch to completion is greater than 1024 cycles. Reported latenc… 17 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 25 …s when the latency from first dispatch to completion is greater than 128 cycles. Reported latency… 31 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 39 …ds when the latency from first dispatch to completion is greater than 16 cycles. Reported latency… 45 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 53 …s when the latency from first dispatch to completion is greater than 2048 cycles. Reported latenc… 59 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 67 …s when the latency from first dispatch to completion is greater than 256 cycles. Reported latency… [all …]
/linux/arch/arm/boot/dts/nvidia/
H A D	tegra30-cpu-opp.dtsi	`9 clock-latency-ns = <100000>; 15 clock-latency-ns = <100000>; 21 clock-latency-ns = <100000>; 27 clock-latency-ns = <100000>; 33 clock-latency-ns = <100000>; 39 clock-latency-ns = <100000>; 45 clock-latency-ns = <100000>; 52 clock-latency-ns = <100000>; 59 clock-latency-ns = <100000>; 66 clock-latency-ns = <100000>; [all …]`
H A D	tegra20-cpu-opp.dtsi	`9 clock-latency-ns = <400000>; 16 clock-latency-ns = <400000>; 23 clock-latency-ns = <400000>; 29 clock-latency-ns = <400000>; 35 clock-latency-ns = <400000>; 41 clock-latency-ns = <400000>; 48 clock-latency-ns = <400000>; 54 clock-latency-ns = <400000>; 60 clock-latency-ns = <400000>; 66 clock-latency-ns = <400000>; [all …]`
/linux/arch/sh/lib/
H A D	memcpy-sh4.S	`31 mov r4,r2 ! 5 MT (0 cycles latency) 33 mov.l @(r0,r5),r7 ! 21 LS (2 cycles latency) 40 3: mov.l @(r0,r5),r1 ! 21 LS (latency=2) ! NMLK 41 mov r7, r3 ! 5 MT (latency=0) ! RQPO 46 mov r1,r6 ! 5 MT (latency=0) 50 mov r1, r7 ! 5 MT (latency=0) 57 3: mov.l @(r0,r5),r1 ! 21 LS (latency=2) ! KLMN 58 mov r7,r3 ! 5 MT (latency=0) ! OPQR 64 mov r1,r6 ! 5 MT (latency=0) 67 mov r1,r7 ! 5 MT (latency=0) [all …]`
/linux/tools/perf/pmu-events/arch/x86/graniterapids/
H A D	memory.json	68 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 76 …s when the latency from first dispatch to completion is greater than 1024 cycles. Reported latenc… 81 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 89 …s when the latency from first dispatch to completion is greater than 128 cycles. Reported latency… 94 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 102 …ds when the latency from first dispatch to completion is greater than 16 cycles. Reported latency… 107 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 115 …s when the latency from first dispatch to completion is greater than 2048 cycles. Reported latenc… 120 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 128 …s when the latency from first dispatch to completion is greater than 256 cycles. Reported latency… [all …]
/linux/arch/arm64/boot/dts/qcom/
H A D	msm8996pro.dtsi	`26 clock-latency-ns = <200000>; 32 clock-latency-ns = <200000>; 38 clock-latency-ns = <200000>; 44 clock-latency-ns = <200000>; 50 clock-latency-ns = <200000>; 56 clock-latency-ns = <200000>; 62 clock-latency-ns = <200000>; 68 clock-latency-ns = <200000>; 74 clock-latency-ns = <200000>; 80 clock-latency-ns = <200000>; [all …]`
/linux/Documentation/devicetree/bindings/cpu/
H A D	idle-states.yaml	44 Idle state parameters (e.g. entry latency) are platform specific and need to 81 \| latency \| 83 \| latency \| 85 \|<------- wakeup-latency ------->\| 93 event conditions. The abort latency is assumed to be negligible 107 entry-latency: Worst case latency required to enter the idle state. The 108 exit-latency may be guaranteed only after entry-latency has passed. 113 wakeup-latency: Maximum delay between the signaling of a wake-up event and the 115 to be entry-latency + exit-latency. 127 wakeup-delay = exit-latency + max(entry-latency - (now - entry-timestamp), 0) [all …]
/linux/tools/perf/pmu-events/arch/x86/meteorlake/
H A D	memory.json	139 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 147 …s when the latency from first dispatch to completion is greater than 1024 cycles. Reported latenc… 153 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 161 …s when the latency from first dispatch to completion is greater than 128 cycles. Reported latency… 167 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 175 …ds when the latency from first dispatch to completion is greater than 16 cycles. Reported latency… 181 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 189 …s when the latency from first dispatch to completion is greater than 2048 cycles. Reported latenc… 195 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 203 …s when the latency from first dispatch to completion is greater than 256 cycles. Reported latency… [all …]
/linux/tools/perf/pmu-events/arch/x86/tigerlake/
H A D	memory.json	21 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 29 …s when the latency from first dispatch to completion is greater than 128 cycles. Reported latency… 34 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 42 …ds when the latency from first dispatch to completion is greater than 16 cycles. Reported latency… 47 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 55 …s when the latency from first dispatch to completion is greater than 256 cycles. Reported latency… 60 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 68 …ds when the latency from first dispatch to completion is greater than 32 cycles. Reported latency… 73 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 81 …ds when the latency from first dispatch to completion is greater than 4 cycles. Reported latency … [all …]
/linux/Documentation/power/
H A D	pm_qos_interface.rst	10 * CPU latency QoS. 12 per-device latency constraints and PM QoS flags. 14 The latency unit used in the PM QoS framework is the microsecond (usec). 20 A global list of CPU latency QoS requests is maintained along with an aggregated 22 to the request list or elements of the list. For CPU latency QoS, the 32 Will insert an element into the CPU latency QoS list with the target value. 49 Returns the aggregated value for the CPU latency QoS. 53 CPU latency QoS list. 56 Adds a notification callback function to the CPU latency QoS. The callback is 57 called when the aggregated value for the CPU latency QoS is changed. [all …]
/linux/tools/perf/pmu-events/arch/x86/alderlake/
H A D	memory.json	129 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 137 …s when the latency from first dispatch to completion is greater than 1024 cycles. Reported latenc… 143 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 151 …s when the latency from first dispatch to completion is greater than 128 cycles. Reported latency… 157 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 165 …ds when the latency from first dispatch to completion is greater than 16 cycles. Reported latency… 171 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 179 …s when the latency from first dispatch to completion is greater than 256 cycles. Reported latency… 185 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 193 …ds when the latency from first dispatch to completion is greater than 32 cycles. Reported latency… [all …]
/linux/tools/tracing/latency/
H A D	Makefile	27 LATENCY-COLLECTOR := $(OUTPUT)latency-collector 28 LATENCY-COLLECTOR_IN := $(LATENCY-COLLECTOR)-in.o 46 all: $(LATENCY-COLLECTOR) 69 $(LATENCY-COLLECTOR): $(LATENCY-COLLECTOR_IN) 70 $(QUIET_LINK)$(CC) $(LDFLAGS) -o $(LATENCY-COLLECTOR) $(LATENCY-COLLECTOR_IN) $(EXTLIBS) 72 latency-collector.%: fixdep FORCE 75 $(LATENCY-COLLECTOR_IN): fixdep FORCE 76 make $(build)=latency-collector 85 $(call QUIET_INSTALL,latency-collector)$(INSTALL) $(LATENCY-COLLECTOR) -m 755 $(DESTDIR)$(BINDIR) 86 @$(STRIP) $(DESTDIR)$(BINDIR)/latency-collector [all …]
/linux/tools/perf/pmu-events/arch/x86/sapphirerapids/
H A D	memory.json	59 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 67 …s when the latency from first dispatch to completion is greater than 1024 cycles. Reported latenc… 72 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 80 …s when the latency from first dispatch to completion is greater than 128 cycles. Reported latency… 85 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 93 …ds when the latency from first dispatch to completion is greater than 16 cycles. Reported latency… 98 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 106 …s when the latency from first dispatch to completion is greater than 256 cycles. Reported latency… 111 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 119 …ds when the latency from first dispatch to completion is greater than 32 cycles. Reported latency… [all …]
/linux/tools/perf/pmu-events/arch/x86/emeraldrapids/
H A D	memory.json	59 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 67 …s when the latency from first dispatch to completion is greater than 1024 cycles. Reported latenc… 72 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 80 …s when the latency from first dispatch to completion is greater than 128 cycles. Reported latency… 85 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 93 …ds when the latency from first dispatch to completion is greater than 16 cycles. Reported latency… 98 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 106 …s when the latency from first dispatch to completion is greater than 256 cycles. Reported latency… 111 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 119 …ds when the latency from first dispatch to completion is greater than 32 cycles. Reported latency… [all …]
/linux/kernel/
H A D	latencytop.c	3 * latencytop.c: Latency display infrastructure 10 * CONFIG_LATENCYTOP enables a kernel latency tracking infrastructure that is 11 * used by the "latencytop" userspace tool. The latency that is tracked is not 12 * the 'traditional' interrupt latency (which is primarily caused by something 13 * else consuming CPU), but instead, it is the latency an application encounters 17 * 1) System level latency 18 * 2) Per process latency 20 * The latency is stored in fixed sized data structures in an accumulated form; 21 * if the "same" latency cause is hit twice, this will be tracked as one entry 22 * in the data structure. Both the count, total accumulated latency and maximum [all …]
/linux/arch/arm64/boot/dts/rockchip/
H A D	rk3588-opp.dtsi	`11 clock-latency-ns = <40000>; 16 clock-latency-ns = <40000>; 21 clock-latency-ns = <40000>; 27 clock-latency-ns = <40000>; 32 clock-latency-ns = <40000>; 43 clock-latency-ns = <40000>; 48 clock-latency-ns = <40000>; 53 clock-latency-ns = <40000>; 58 clock-latency-ns = <40000>; 63 clock-latency-ns = <40000>; [all …]`
/linux/tools/perf/pmu-events/arch/x86/ivybridge/
H A D	memory.json	11 "BriefDescription": "Loads with latency value being above 128", 18 "PublicDescription": "Loads with latency value being above 128.", 23 "BriefDescription": "Loads with latency value being above 16", 30 "PublicDescription": "Loads with latency value being above 16.", 35 "BriefDescription": "Loads with latency value being above 256", 42 "PublicDescription": "Loads with latency value being above 256.", 47 "BriefDescription": "Loads with latency value being above 32", 54 "PublicDescription": "Loads with latency value being above 32.", 59 "BriefDescription": "Loads with latency value being above 4", 66 "PublicDescription": "Loads with latency value being above 4.", [all …]
/linux/drivers/char/tpm/st33zp24/
H A D	spi.c	41 * Between command and response, there are latency byte (up to 15 47 * some latency byte before the answer is available (max 15). 60 int latency; member 119 memset(&phy->tx_buf[total_length], TPM_DUMMY_BYTE, phy->latency); in st33zp24_spi_send() 121 spi_xfer.len = total_length + phy->latency; in st33zp24_spi_send() 125 ret = phy->rx_buf[total_length + phy->latency - 1]; in st33zp24_spi_send() 155 phy->latency + tpm_size); in st33zp24_spi_read8_reg() 157 spi_xfer.len = total_length + phy->latency + tpm_size; in st33zp24_spi_read8_reg() 162 ret = phy->rx_buf[total_length + phy->latency - 1]; in st33zp24_spi_read8_reg() 164 memcpy(tpm_data, phy->rx_buf + total_length + phy->latency, in st33zp24_spi_read8_reg() [all …]
/linux/tools/perf/pmu-events/arch/x86/rocketlake/
H A D	memory.json	84 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 92 …s when the latency from first dispatch to completion is greater than 128 cycles. Reported latency… 97 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 105 …ds when the latency from first dispatch to completion is greater than 16 cycles. Reported latency… 110 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 118 …s when the latency from first dispatch to completion is greater than 256 cycles. Reported latency… 123 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 131 …ds when the latency from first dispatch to completion is greater than 32 cycles. Reported latency… 136 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 144 …ds when the latency from first dispatch to completion is greater than 4 cycles. Reported latency … [all …]
/linux/tools/perf/pmu-events/arch/x86/icelake/
H A D	memory.json	84 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 92 …s when the latency from first dispatch to completion is greater than 128 cycles. Reported latency… 97 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 105 …ds when the latency from first dispatch to completion is greater than 16 cycles. Reported latency… 110 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 118 …s when the latency from first dispatch to completion is greater than 256 cycles. Reported latency… 123 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 131 …ds when the latency from first dispatch to completion is greater than 32 cycles. Reported latency… 136 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 144 …ds when the latency from first dispatch to completion is greater than 4 cycles. Reported latency … [all …]
/linux/arch/arm/boot/dts/samsung/
H A D	exynos4212.dtsi	`65 clock-latency-ns = <200000>; 70 clock-latency-ns = <200000>; 75 clock-latency-ns = <200000>; 80 clock-latency-ns = <200000>; 85 clock-latency-ns = <200000>; 90 clock-latency-ns = <200000>; 95 clock-latency-ns = <200000>; 101 clock-latency-ns = <200000>; 106 clock-latency-ns = <200000>; 111 clock-latency-ns = <200000>; [all …]`
H A D	exynos4412.dtsi	`91 clock-latency-ns = <200000>; 96 clock-latency-ns = <200000>; 101 clock-latency-ns = <200000>; 106 clock-latency-ns = <200000>; 111 clock-latency-ns = <200000>; 116 clock-latency-ns = <200000>; 121 clock-latency-ns = <200000>; 127 clock-latency-ns = <200000>; 132 clock-latency-ns = <200000>; 137 clock-latency-ns = <200000>; [all …]`
H A D	exynos5800.dtsi	`27 clock-latency-ns = <140000>; 32 clock-latency-ns = <140000>; 37 clock-latency-ns = <140000>; 75 clock-latency-ns = <140000>; 80 clock-latency-ns = <140000>; 85 clock-latency-ns = <140000>; 90 clock-latency-ns = <140000>; 95 clock-latency-ns = <140000>; 103 clock-latency-ns = <140000>; 132 clock-latency-ns = <140000>; [all …]`
/linux/tools/perf/pmu-events/arch/powerpc/power8/
H A D	metrics.json	744 …tion": "estimate of dl2l3 distant MOD miss rates with measured DL2L3 MOD latency as a %of dcache m… 750 …tion": "estimate of dl2l3 distant SHR miss rates with measured DL2L3 SHR latency as a %of dcache m… 756 …"BriefDescription": "estimate of distant L4 miss rates with measured DL4 latency as a %of dcache m… 762 …"BriefDescription": "estimate of distant memory miss rates with measured DMEM latency as a %of dca… 768 …"BriefDescription": "estimate of dl21 MOD miss rates with measured L21 MOD latency as a %of dcache… 774 …"BriefDescription": "estimate of dl21 SHR miss rates with measured L21 SHR latency as a %of dcache… 780 …"BriefDescription": "estimate of dl2 miss rates with measured L2 latency as a %of dcache miss cpi", 786 …"BriefDescription": "estimate of dl31 MOD miss rates with measured L31 MOD latency as a %of dcache… 792 …"BriefDescription": "estimate of dl31 SHR miss rates with measured L31 SHR latency as a %of dcache… 798 …"BriefDescription": "estimate of dl3 miss rates with measured L3 latency as a % of dcache miss cpi… [all …]
/linux/Documentation/devicetree/bindings/power/
H A D	domain-idle-state.yaml	`31 entry-latency-us: 33 The worst case latency in microseconds required to enter the idle 34 state. Note that, the exit-latency-us duration may be guaranteed only 35 after the entry-latency-us has passed. 37 exit-latency-us: 39 The worst case latency in microseconds required to exit the idle 59 - entry-latency-us 60 - exit-latency-us 71 entry-latency-us = <20>; 72 exit-latency-us = <40>;`

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