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Searched full:latch (Results 1 – 25 of 188) sorted by relevance

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/freebsd/contrib/llvm-project/libcxx/include/
H A Dlatch14 latch synopsis
19 class latch
24 constexpr explicit latch(ptrdiff_t __expected);
25 ~latch();
27 latch(const latch&) = delete;
28 latch& operator=(const latch&) = delete;
66 class _LIBCPP_DEPRECATED_ATOMIC_SYNC latch {
72 inline _LIBCPP_HIDE_FROM_ABI constexpr explicit latch(ptrdiff_t __expected) : __a_(__expected) {
75 "latch::latch(ptrdiff_t): latch cannot be "
79 "latch::latch(ptrdiff_t): latch cannot be "
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DMatrixUtils.cpp32 BasicBlock *Latch = BasicBlock::Create(Header->getContext(), Name + ".latch", in CreateLoop() local
37 BranchInst::Create(Latch, Body); in CreateLoop()
42 B.SetInsertPoint(Latch); in CreateLoop()
45 BranchInst::Create(Header, Exit, Cond, Latch); in CreateLoop()
46 IV->addIncoming(Inc, Latch); in CreateLoop()
54 {DominatorTree::Insert, Body, Latch}, in CreateLoop()
55 {DominatorTree::Insert, Latch, Header}, in CreateLoop()
56 {DominatorTree::Insert, Latch, Exit}, in CreateLoop()
62 L->addBasicBlockToLoop(Latch, LI); in CreateLoop()
86 ColumnLoop.Latch = ColBody->getSingleSuccessor(); in CreateTiledLoops()
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H A DLoopUnrollRuntime.cpp57 cl::desc("Assume the non latch exit block to be predictable"));
99 // Latch in ConnectProlog()
101 BasicBlock *Latch = L->getLoopLatch(); in ConnectProlog() local
102 assert(Latch && "Loop must have a latch"); in ConnectProlog()
103 BasicBlock *PrologLatch = cast<BasicBlock>(VMap[Latch]); in ConnectProlog()
110 for (BasicBlock *Succ : successors(Latch)) { in ConnectProlog()
132 Value *V = PN.getIncomingValueForBlock(Latch); in ConnectProlog()
184 if (hasBranchWeightMD(*Latch->getTerminator())) { in ConnectProlog()
217 BasicBlock *Latch = L->getLoopLatch(); in ConnectEpilog() local
218 assert(Latch && "Loop must have a latch"); in ConnectEpilog()
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H A DLoopRotationUtils.cpp53 "a better latch exit"));
210 // Assuming both header and latch are exiting, look for a phi which is only
232 // Check that latch exit is deoptimizing (which means - very unlikely to happen)
234 // If we rotate latch to that exit our loop has a better chance of being fully
239 BasicBlock *Latch = L->getLoopLatch(); in canRotateDeoptimizingLatchExit() local
240 assert(Latch && "need latch"); in canRotateDeoptimizingLatchExit()
241 BranchInst *BI = dyn_cast<BranchInst>(Latch->getTerminator()); in canRotateDeoptimizingLatchExit()
242 // Need normal exiting latch. in canRotateDeoptimizingLatchExit()
250 // Latch exit is non-deoptimizing, no need to rotate. in canRotateDeoptimizingLatchExit()
405 /// \param SimplifiedLatch is true if the latch was just folded into the final
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H A DLoopConstrainer.cpp111 /// Returns estimate for max latch taken count of the loop of the narrowest
112 /// available type. If the latch block has such estimate, it is returned.
114 /// type than latch check itself), which is still better than no estimate.
133 BasicBlock *Latch = L.getLoopLatch(); in parseLoopStructure() local
134 assert(Latch && "Simplified loops only have one latch!"); in parseLoopStructure()
136 if (Latch->getTerminator()->getMetadata(ClonedLoopTag)) { in parseLoopStructure()
141 if (!L.isLoopExiting(Latch)) { in parseLoopStructure()
142 FailureReason = "no loop latch"; in parseLoopStructure()
153 BranchInst *LatchBr = dyn_cast<BranchInst>(Latch->getTerminator()); in parseLoopStructure()
155 FailureReason = "latch terminator not conditional branch"; in parseLoopStructure()
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H A DLoopPeel.cpp92 // The latch must either be the only exiting block or all non-latch exit in canPeel()
97 // note that LoopPeeling currently can only update the branch weights of latch in canPeel()
284 // All non-latch exit blocks must have an UnreachableInst terminator. in peelToTurnInvariantLoadsDerefencebale()
293 // Now look for invariant loads that dominate the latch and are not known to in peelToTurnInvariantLoadsDerefencebale()
299 BasicBlock *Latch = L.getLoopLatch(); in peelToTurnInvariantLoadsDerefencebale() local
318 if (DT.dominates(BB, Latch) && L.isLoopInvariant(Ptr) && in peelToTurnInvariantLoadsDerefencebale()
517 BasicBlock *Latch = L->getLoopLatch(); in violatesLegacyMultiExitLoopCheck() local
518 if (!Latch) in violatesLegacyMultiExitLoopCheck()
521 BranchInst *LatchBR = dyn_cast<BranchInst>(Latch->getTerminator()); in violatesLegacyMultiExitLoopCheck()
522 if (!LatchBR || LatchBR->getNumSuccessors() != 2 || !L->isLoopExiting(Latch)) in violatesLegacyMultiExitLoopCheck()
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H A DLoopUnroll.cpp88 "latch (completely or otherwise)");
186 /// PN = PHI [I, Latch], [CI, PreHeader]
192 /// PN = PHI [I2, Latch], [CI, PreHeader]
199 /// PN = PHI [I2, Latch], [NewPN, PreHeader]
443 /// can only fail when the loop's latch block is not terminated by a conditional
448 /// epilogue that ensures the latch has a trip multiple of Count. UnrollLoop
571 // (1) single latch; and in UnrollLoop()
572 // (2a) latch is unconditional; or in UnrollLoop()
573 // (2b) latch is conditional and is an exiting block in UnrollLoop()
583 dbgs() << "Can't unroll; a conditional latch must exit the loop"); in UnrollLoop()
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/freebsd/contrib/llvm-project/llvm/lib/Analysis/
H A DLoopNestAnalysis.cpp30 /// or jump around the inner loop to the outer loop latch
31 /// - if the inner loop latch exits the inner loop, it should 'flow' into
32 /// the outer loop latch.
54 const BasicBlock *Latch = OuterLoop.getLoopLatch(); in getOuterLoopLatchCmp() local
55 assert(Latch && "Expecting a valid loop latch"); in getOuterLoopLatchCmp()
57 const BranchInst *BI = dyn_cast<BranchInst>(Latch->getTerminator()); in getOuterLoopLatchCmp()
59 "Expecting loop latch terminator to be a branch instruction"); in getOuterLoopLatchCmp()
64 dbgs() << "Outer loop latch compare instruction: " << *OuterLoopLatchCmp in getOuterLoopLatchCmp()
95 // compare instruction and the outer loop latch compare instruction. in checkSafeInstruction()
121 // or jump around the inner loop to the outer loop latch in analyzeLoopNestForPerfectNest()
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H A DLoopInfo.cpp174 /// Get the latch condition instruction.
176 if (BasicBlock *Latch = getLoopLatch()) in getLatchCmpInst() local
177 if (BranchInst *BI = dyn_cast_or_null<BranchInst>(Latch->getTerminator())) in getLatchCmpInst()
234 BasicBlock *Latch = L.getLoopLatch(); in getCanonicalPredicate() local
235 assert(Latch && "Expecting valid latch"); in getCanonicalPredicate()
237 BranchInst *BI = dyn_cast_or_null<BranchInst>(Latch->getTerminator()); in getCanonicalPredicate()
238 assert(BI && BI->isConditional() && "Expecting conditional latch branch"); in getCanonicalPredicate()
242 "Expecting the latch compare instruction to be a CmpInst"); in getCanonicalPredicate()
253 // Need to flip strictness of the predicate when the latch compare instruction in getCanonicalPredicate()
313 BasicBlock *Latch = getLoopLatch(); in getInductionVariable() local
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DLoopPredication.cpp102 // * The loop has a single latch with the condition of the form:
108 // For the ult latch comparison case M is:
156 // * The loop has a single latch with the condition of the form:
161 // For the ugt latch comparison case M is:
223 // This is the scale factor for the latch probability. We use this during
225 // probability of exiting the loop instead of loop exiting via latch.
228 "loop-predication-latch-probability-scale", cl::Hidden, cl::init(2.0),
229 cl::desc("scale factor for the latch probability. Value should be greater "
316 // predicate based on the latch check. For example, the latch chec
1139 auto *Latch = L->getLoopLatch(); predicateLoopExits() local
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H A DLoopInterchange.cpp556 // outerloop latch. in tightlyNested()
567 LLVM_DEBUG(dbgs() << "Checking instructions in Loop header and Loop latch\n"); in tightlyNested()
569 // and outer loop latch doesn't contain any unsafe instructions. in tightlyNested()
582 // Ensure the inner loop exit block flows to the outer loop latch possibly in tightlyNested()
588 << " does not lead to the outer loop latch.\n";); in tightlyNested()
591 // The inner loop exit block does flow to the outer loop latch and not some in tightlyNested()
780 dbgs() << "Loops where the latch is not the exiting block are not" in currentLimitations()
786 << "Loops where the latch is not the exiting block cannot be" in currentLimitations()
863 // Reduction lcssa phi will have only 1 incoming block that from loop latch. in areInnerLoopExitPHIsSupported()
878 // incoming values do not come from the outer loop latch or if the
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H A DLoopFuse.cpp79 STATISTIC(InvalidLatch, "Loop has invalid latch");
158 /// Latch of the loop
159 BasicBlock *Latch; member
190 Latch(L->getLoopLatch()), L(L), Valid(true), in FusionCandidate()
235 return Preheader && Header && ExitingBlock && ExitBlock && Latch && L && in isValid()
248 assert(Latch == L->getLoopLatch() && "Latch is out of sync"); in verify()
270 Latch = L->getLoopLatch(); in updateAfterPeeling()
308 << "\tLatch: " << (Latch ? Latch->getName() : "nullptr") << "\n" in dump()
329 if (!Latch) in isEligibleForFusion()
1519 /// Modify the latch branch of FC to be unconditional since successors of the
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H A DInductiveRangeCheckElimination.cpp113 static cl::opt<bool> AllowUnsignedLatchCondition("irce-allow-unsigned-latch",
117 "irce-allow-narrow-latch", cl::Hidden, cl::init(true),
119 "with narrow latch condition."));
580 // addition that feeds into the icmp for the latch's terminating branch is nuw in DisableAllLoopOptsOnLoop()
654 // We can deal when types of latch check and range checks don't match in case
655 // if latch check is more narrow.
715 // values, depending on type of latch condition that defines IV iteration
964 BPI->getEdgeProbability(LS.Latch, LS.LatchBrExitIdx); in parseLoopStructure()
1030 // Basing on the type of latch predicate, we interpret the IV iteration range in parseLoopStructure()
596 BasicBlock *Latch = nullptr; global() member
902 BasicBlock *Latch = L.getLoopLatch(); parseLoopStructure() local
/freebsd/sys/contrib/device-tree/Bindings/gpio/
H A Dgpio-latch.yaml4 $id: http://devicetree.org/schemas/gpio/gpio-latch.yaml#
7 title: GPIO latch controller
43 of number of latches and the number of inputs per latch is derived from
48 const: gpio-latch
53 description: Array of GPIOs to be used to clock a latch
56 description: Array of GPIOs to be used as inputs per latch
59 description: Delay in nanoseconds to wait after the latch inputs have been
80 gpio-latch {
84 compatible = "gpio-latch";
H A Dsprd,gpio-eic.yaml19 controller contains 4 sub-modules, i.e. EIC-debounce, EIC-latch, EIC-async and
32 The EIC-latch sub-module is used to latch some special power down signals
33 and generate interrupts, since the EIC-latch does not depend on the APB
48 - sprd,sc9860-eic-latch
58 - sprd,ums512-eic-latch
59 - const: sprd,sc9860-eic-latch
H A Dgpio-eic-sprd.txt6 controller contains 4 sub-modules: EIC-debounce, EIC-latch, EIC-async and
19 The EIC-latch sub-module is used to latch some special power down signals
20 and generate interrupts, since the EIC-latch does not depend on the APB
33 "sprd,sc9860-eic-latch",
59 compatible = "sprd,sc9860-eic-latch";
/freebsd/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DLoopInfo.h111 /// Get the latch condition instruction.
133 /// i_1 = phi[{lb, preheader}, {i_2, latch}]
136 /// latch:
181 /// Return the canonical predicate for the latch compare instruction, if
186 /// 1. The first successor of the latch branch is the loop header
188 /// 2. One of the operands of the latch comparison is StepInst
206 /// - The second successor of the latch branch is the loop header instead
208 /// - The first operand of the latch comparison (%cmp) is the IndVar (%iv)
256 /// - it is used to determine the condition of the branch in the loop latch
273 /// conditional branch in the loop latch. (but it can be)
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86LowerAMXIntrinsics.cpp112 BasicBlock *Latch = in createLoop() local
113 BasicBlock::Create(Ctx, Name + ".latch", Header->getParent(), Exit); in createLoop()
117 BranchInst::Create(Latch, Body); in createLoop()
122 B.SetInsertPoint(Latch); in createLoop()
125 BranchInst::Create(Header, Exit, Cond, Latch); in createLoop()
126 IV->addIncoming(Inc, Latch); in createLoop()
134 {DominatorTree::Insert, Body, Latch}, in createLoop()
135 {DominatorTree::Insert, Latch, Header}, in createLoop()
136 {DominatorTree::Insert, Latch, Exit}, in createLoop()
142 L->addBasicBlockToLoop(Latch, *LI); in createLoop()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonHardwareLoops.cpp280 /// The desired flow is: phi ---> bump -+-> comparison-in-latch.
289 /// +-> comparison-in-latch (against upper_bound-bump),
296 /// couldn't be identified, or if the value in the latch's comparison
411 MachineBasicBlock *Latch = L->getLoopLatch(); in findInductionRegister() local
413 if (!Header || !Preheader || !Latch || !ExitingBlock) in findInductionRegister()
435 // latch block, and see if is a result of an addition of form "reg+imm", in findInductionRegister()
438 if (Phi->getOperand(i+1).getMBB() != Latch) in findInductionRegister()
609 MachineBasicBlock *Latch = L->getLoopLatch(); in getLoopTripCount() local
614 else if (MBB == Latch) in getLoopTripCount()
631 if (ExitingBlock != Latch && (TB == Latch || FB == Latch)) { in getLoopTripCount()
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/freebsd/sys/amd64/vmm/io/
H A Dvatpit.c212 pit_update_counter(struct vatpit *vatpit, struct channel *c, bool latch) in pit_update_counter() argument
217 /* cannot latch a new value until the old one has been consumed */ in pit_update_counter()
218 if (latch && c->olbyte != 0) in pit_update_counter()
238 if (latch) { in pit_update_counter()
255 * Latch the count/status of the timer if not already latched. in pit_readback1()
256 * N.B. that the count/status latch-select bits are active-low. in pit_readback1()
316 * latch command. in vatpit_update_mode()
330 c->olbyte = 0; /* reset latch after reprogramming */ in vatpit_update_mode()
380 * The spec says that once the output latch is completely in vatpit_handler()
/freebsd/contrib/llvm-project/libcxx/modules/std/
H A Dlatch.cppm
/freebsd/contrib/llvm-project/llvm/include/llvm/Transforms/Utils/
H A DMatrixUtils.h49 /// The header and latch of the loop.
51 BasicBlock *Latch = nullptr; member
67 /// for the inner loop body and sets {Column,Row,Inner}LoopHeader/Latch
78 /// Creates a new loop with header, body and latch blocks that iterates from
/freebsd/sys/dev/mii/
H A Dnsphyterreg.h45 #define PHYSTS_REL 0x8000 /* receive error latch */
46 #define PHYSTS_CIML 0x4000 /* CIM latch */
47 #define PHYSTS_FCSL 0x2000 /* false carrier sense latch */
61 #define PHYSTS_MP_REL 0x2000 /* receive error latch */
63 #define PHYSTS_MP_FCSL 0x0800 /* false carrier sense latch */
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachineLoopInfo.cpp120 if (MachineBasicBlock *Latch = getLoopLatch()) { in findLoopControlBlock() local
121 if (isLoopExiting(Latch)) in findLoopControlBlock()
122 return Latch; in findLoopControlBlock()
157 // Find the predecessor of the header that is not the latch block. in findLoopPreheader()
185 // If there is a single latch block, then the metadata in getLoopID()
193 // There seem to be multiple latch blocks, so we have to in getLoopID()
/freebsd/lib/libpmc/pmu-events/arch/powerpc/power8/
H A Dpipeline.json269 "BriefDescription": "Cycles run latch is set and core is in SMT2 mode",
275 "BriefDescription": "cycles this threads run latch is set and the core is in SMT4 mode",
276 "PublicDescription": "Cycles run latch is set and core is in SMT4 mode"
281 "BriefDescription": "Cycles run latch is set and core is in ST mode",

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