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/linux/drivers/acpi/riscv/
H A Dcpuidle.c25 struct acpi_lpi_state *lpi; in acpi_cpu_init_idle() local
40 lpi = &pr->power.lpi_states[i]; in acpi_cpu_init_idle()
48 if (((lpi->address & RISCV_FFH_LPI_TYPE_MASK) != RISCV_FFH_LPI_TYPE_SBI) || in acpi_cpu_init_idle()
49 (lpi->address & RISCV_FFH_LPI_RSVD_MASK)) { in acpi_cpu_init_idle()
50 pr_warn("Invalid LPI entry method %#llx\n", lpi->address); in acpi_cpu_init_idle()
54 state = lpi->address; in acpi_cpu_init_idle()
69 int __cpuidle acpi_processor_ffh_lpi_enter(struct acpi_lpi_state *lpi) in acpi_processor_ffh_lpi_enter() argument
71 u32 state = lpi->address; in acpi_processor_ffh_lpi_enter()
75 lpi->index, in acpi_processor_ffh_lpi_enter()
79 lpi->index, in acpi_processor_ffh_lpi_enter()
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dqcom,sm6115-lpass-lpi-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm6115-lpass-lpi-pinctrl.yaml#
7 title: Qualcomm SM6115 SoC LPASS LPI TLMM
15 (LPASS) Low Power Island (LPI) of Qualcomm SM6115 SoC.
21 - qcom,sm6115-lpass-lpi-pinctrl
24 - qcom,qcm2290-lpass-lpi-pinctrl
25 - const: qcom,sm6115-lpass-lpi-pinctrl
29 - description: LPASS LPI TLMM Control and Status registers
30 - description: LPASS LPI MCC registers
55 $ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state
76 - $ref: qcom,lpass-lpi-common.yaml#
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H A Dqcom,milos-lpass-lpi-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,milos-lpass-lpi-pinctrl.yaml#
7 title: Qualcomm Milos SoC LPASS LPI TLMM
14 (LPASS) Low Power Island (LPI) of Qualcomm Milos SoC.
19 - qcom,eliza-lpass-lpi-pinctrl
20 - qcom,milos-lpass-lpi-pinctrl
25 - description: LPASS LPI TLMM Control and Status registers
26 - description: LPASS LPI MCC registers
53 $ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state
78 - $ref: qcom,lpass-lpi-common.yaml#
83 const: qcom,eliza-lpass-lpi-pinctrl
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H A Dqcom,sm4250-lpass-lpi-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm4250-lpass-lpi-pinctrl.yaml#
7 title: Qualcomm SM4250 SoC LPASS LPI TLMM
14 (LPASS) Low Power Island (LPI) of Qualcomm SM4250 SoC.
18 const: qcom,sm4250-lpass-lpi-pinctrl
22 - description: LPASS LPI TLMM Control and Status registers
23 - description: LPASS LPI MCC registers
48 $ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state
72 - $ref: qcom,lpass-lpi-common.yaml#
86 compatible = "qcom,sm4250-lpass-lpi-pinctrl";
H A Dqcom,sc8280xp-lpass-lpi-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml#
7 title: Qualcomm SC8280XP SoC LPASS LPI TLMM
14 (LPASS) Low Power Island (LPI) of Qualcomm SC8280XP SoC.
18 const: qcom,sc8280xp-lpass-lpi-pinctrl
22 - description: LPASS LPI TLMM Control and Status registers
23 - description: LPASS LPI MCC registers
50 $ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state
74 - $ref: qcom,lpass-lpi-common.yaml#
88 compatible = "qcom,sc8280xp-lpass-lpi-pinctrl";
H A Dqcom,sm8250-lpass-lpi-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml#
7 title: Qualcomm SM8250 SoC LPASS LPI TLMM
14 (LPASS) Low Power Island (LPI) of Qualcomm SM8250 SoC.
18 const: qcom,sm8250-lpass-lpi-pinctrl
48 $ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state
73 - $ref: qcom,lpass-lpi-common.yaml#
87 compatible = "qcom,sm8250-lpass-lpi-pinctrl";
/linux/drivers/pinctrl/qcom/
H A DMakefile41 obj-$(CONFIG_PINCTRL_MILOS_LPASS_LPI) += pinctrl-milos-lpass-lpi.o
52 obj-$(CONFIG_PINCTRL_SC7280_LPASS_LPI) += pinctrl-sc7280-lpass-lpi.o
56 obj-$(CONFIG_PINCTRL_SDM660_LPASS_LPI) += pinctrl-sdm660-lpass-lpi.o
58 obj-$(CONFIG_PINCTRL_SDM670_LPASS_LPI) += pinctrl-sdm670-lpass-lpi.o
64 obj-$(CONFIG_PINCTRL_SM4250_LPASS_LPI) += pinctrl-sm4250-lpass-lpi.o
67 obj-$(CONFIG_PINCTRL_SM6115_LPASS_LPI) += pinctrl-sm6115-lpass-lpi.o
70 obj-$(CONFIG_PINCTRL_SM6350_LPASS_LPI) += pinctrl-sm6350-lpass-lpi.o
75 obj-$(CONFIG_PINCTRL_SM8250_LPASS_LPI) += pinctrl-sm8250-lpass-lpi.o
78 obj-$(CONFIG_PINCTRL_SM8450_LPASS_LPI) += pinctrl-sm8450-lpass-lpi.o
80 obj-$(CONFIG_PINCTRL_SM8550_LPASS_LPI) += pinctrl-sm8550-lpass-lpi.o
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H A Dpinctrl-milos-lpass-lpi.c13 #include "pinctrl-lpass-lpi.h"
238 .compatible = "qcom,eliza-lpass-lpi-pinctrl",
241 .compatible = "qcom,milos-lpass-lpi-pinctrl",
254 .name = "qcom-milos-lpass-lpi-pinctrl",
263 MODULE_DESCRIPTION("Qualcomm Milos LPI GPIO pin control driver");
/linux/drivers/acpi/arm64/
H A Dcpuidle.c20 struct acpi_lpi_state *lpi; in psci_acpi_cpu_init_idle() local
36 lpi = &pr->power.lpi_states[i]; in psci_acpi_cpu_init_idle()
41 state = lpi->address; in psci_acpi_cpu_init_idle()
56 __cpuidle int acpi_processor_ffh_lpi_enter(struct acpi_lpi_state *lpi) in acpi_processor_ffh_lpi_enter() argument
58 u32 state = lpi->address; in acpi_processor_ffh_lpi_enter()
60 if (ARM64_LPI_IS_RETENTION_STATE(lpi->arch_flags)) in acpi_processor_ffh_lpi_enter()
62 lpi->index, state); in acpi_processor_ffh_lpi_enter()
65 lpi->index, state); in acpi_processor_ffh_lpi_enter()
/linux/drivers/net/ethernet/samsung/sxgbe/
H A Dsxgbe_core.c53 /* Reading this register shall clear all the LPI status bits */ in sxgbe_get_lpi_status()
190 /* Enable the LPI mode for transmit path with Tx automate bit set. in sxgbe_set_eee_mode()
192 * to LPI mode after all outstanding and pending packets are in sxgbe_set_eee_mode()
229 /* Program the timers in the LPI timer control register: in sxgbe_set_eee_timer()
232 * the LPI pattern. in sxgbe_set_eee_timer()
234 * after it has stopped transmitting the LPI pattern. in sxgbe_set_eee_timer()
H A Dsxgbe_common.h118 /* EEE-LPI mode flags*/
124 /* EEE-LPI Interrupt status flag */
127 /* EEE-LPI Default timer values */
131 /* EEE-LPI Control and status definitions */
243 /* EEE-LPI stats */
348 /* EEE-LPI specific operations */
501 /* EEE-LPI specific members */
/linux/include/linux/
H A Dphylink.h149 * @eee_rx_clk_stop_enable: if true, PHY can stop the receive clock during LPI
155 * LPI signalling.
157 * @lpi_capabilities: MAC speeds which can support LPI signalling
158 * @lpi_timer_default: Default EEE LPI timer setting.
198 * @mac_disable_tx_lpi: disable LPI.
199 * @mac_enable_tx_lpi: enable and configure LPI.
398 * @phy: any attached phy (deprecated - please use LPI interfaces)
431 * mac_disable_tx_lpi() - disable LPI generation at the MAC
434 * Disable generation of LPI at the MAC, effectively preventing the MAC
440 * mac_enable_tx_lpi() - configure and enable LPI generation at the MAC
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/linux/drivers/acpi/
H A Dprocessor_idle.c881 int __weak __cpuidle acpi_processor_ffh_lpi_enter(struct acpi_lpi_state *lpi) in acpi_processor_ffh_lpi_enter() argument
887 * acpi_idle_lpi_enter - enters an ACPI any LPI state
898 struct acpi_lpi_state *lpi; in acpi_idle_lpi_enter() local
905 lpi = &pr->power.lpi_states[index]; in acpi_idle_lpi_enter()
906 if (lpi->entry_method == ACPI_CSTATE_FFH) in acpi_idle_lpi_enter()
907 return acpi_processor_ffh_lpi_enter(lpi); in acpi_idle_lpi_enter()
915 struct acpi_lpi_state *lpi; in acpi_processor_setup_lpi_states() local
923 lpi = &pr->power.lpi_states[i]; in acpi_processor_setup_lpi_states()
926 snprintf(state->name, CPUIDLE_NAME_LEN, "LPI-%d", i); in acpi_processor_setup_lpi_states()
927 strscpy(state->desc, lpi->desc, CPUIDLE_DESC_LEN); in acpi_processor_setup_lpi_states()
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/linux/drivers/acpi/x86/
H A Ds2idle.c139 "LPI: constraints list begin:\n"); in lpi_device_get_constraints_amd()
190 acpi_handle_debug(lps0_device_handle, "LPI: constraints list end\n"); in lpi_device_get_constraints_amd()
216 acpi_handle_debug(lps0_device_handle, "LPI: constraints list begin:\n"); in lpi_device_get_constraints()
299 acpi_handle_debug(lps0_device_handle, "LPI: constraints list end\n"); in lpi_device_get_constraints()
319 "LPI: required min power state:%s current power state:%s\n", in lpi_check_constraints()
324 acpi_handle_info(entry->handle, "LPI: Device not power manageable\n"); in lpi_check_constraints()
331 "LPI: Constraint not met; min power state:%s current power state:%s\n", in lpi_check_constraints()
/linux/Documentation/devicetree/bindings/net/
H A Dsnps,dwc-qos-ethernet.txt108 - snps,en-lpi: If present it enables use of the AXI low-power interface
117 - snps,en-tx-lpi-clockgating: Enable gating of the MAC TX clock during
149 snps,en-tx-lpi-clockgating;
150 snps,en-lpi;
H A Dsamsung-sxgbe.txt8 transmit DMA interrupts, receive DMA interrupts and lpi interrupt.
12 and 1 optional lpi interrupt.
/linux/Documentation/networking/device_drivers/ethernet/stmicro/
H A Dstmmac.rst173 This parameter changes the default LPI TX Expiration time in milliseconds.
295 family of Physical layer to operate in the Low Power Idle (LPI) mode. The EEE
298 The LPI mode allows power saving by switching off parts of the communication
302 the system should enter or exit the LPI mode and communicate this to PHY.
308 To enter in TX LPI mode the driver needs to have a software timer that enable
309 and disable the LPI mode when there is nothing to be transmitted.
490 35) Enables TX LPI Clock Gating::
570 1) Enable AXI LPI::
/linux/drivers/net/ethernet/stmicro/stmmac/
H A Ddwmac4_core.c51 /* Configure LPI 1us counter to number of CSR clock ticks in 1us - 1 */ in dwmac4_core_init()
405 /* Set the hardware LPI entry timer */ in dwmac4_set_lpi_mode()
408 /* Interpret a zero LPI entry timer to mean in dwmac4_set_lpi_mode()
409 * immediate entry into LPI mode. in dwmac4_set_lpi_mode()
448 /* Program the timers in the LPI timer control register: in dwmac4_set_eee_timer()
451 * the LPI pattern. in dwmac4_set_eee_timer()
453 * after it has stopped transmitting the LPI pattern. in dwmac4_set_eee_timer()
648 /* MAC tx/rx EEE LPI entry/exit interrupts */ in dwmac4_irq_status()
650 /* Clear LPI interrupt by reading MAC_LPI_Control_Status */ in dwmac4_irq_status()
H A Ddwmac1000_core.c297 /* MAC tx/rx EEE LPI entry/exit interrupts */ in dwmac1000_irq_status()
299 /* Clean LPI interrupt by reading the Reg 12 */ in dwmac1000_irq_status()
358 /* Program the timers in the LPI timer control register: in dwmac1000_set_eee_timer()
361 * the LPI pattern. in dwmac1000_set_eee_timer()
363 * after it has stopped transmitting the LPI pattern. in dwmac1000_set_eee_timer()
/linux/drivers/irqchip/
H A Dirq-gic-v4.c32 * physical LPI which gets unmapped when the guest maps the
34 * mapped to the LPI (host) or the VLPI (guest). Note that this is
66 * dialect) gets a single doorbell LPI, no matter how many interrupts
73 * turn, this domain sits on top of the normal LPI allocator, and a
H A Dirq-gic-v5.c57 static void release_lpi(u32 lpi) in release_lpi() argument
59 ida_free(&lpi_ida, lpi); in release_lpi()
176 * unmasking an SPI/LPI IRQ. in gicv5_iri_irq_unmask()
477 /* Mark the LPI pending */ in gicv5_ipi_send_single()
545 .name = "GICv5-LPI",
774 * state to make sure we start the LPI with a clean state from in gicv5_lpi_config_reset()
1069 "LPI domain uninitialized, can't set up IPIs")) { in gicv5_init_domains()
/linux/drivers/net/pcs/
H A Dpcs-xpcs.h82 #define DW_VR_MII_EEE_LTX_EN BIT(0) /* LPI Tx Enable */
83 #define DW_VR_MII_EEE_LRX_EN BIT(1) /* LPI Rx Enable */
/linux/arch/arm64/kvm/vgic/
H A Dvgic-v4.c32 * At this stage, we can link the guest's view of an LPI (uniquely
35 * successfully upgraded the guest's LPI to a VLPI. We can then start
44 * guest performs on its LPI through the vITS. For that, a number of
453 * Perform the actual DevID/EventID -> LPI translation. in kvm_vgic_v4_set_forwarding()
456 * managed to do something stupid. Emulated LPI injection will still in kvm_vgic_v4_set_forwarding()
/linux/drivers/media/pci/cx88/
H A Dcx88-core.c67 * @lpi: lines per IRQ, or 0 to not generate irqs. Note: IRQ to be
68 * generated _after_ lpi lines are transferred.
73 unsigned int lines, unsigned int lpi, bool jump) in cx88_risc_field() argument
94 if (lpi && line > 0 && !(line % lpi)) in cx88_risc_field()
179 unsigned int lines, unsigned int lpi) in cx88_risc_databuffer() argument
202 lines, lpi, !lpi); in cx88_risc_databuffer()
/linux/drivers/net/dsa/lantiq/
H A Dlantiq_gswip.h202 #define GSWIP_MAC_CTRL_4_LPIEN BIT(7) /* LPI Mode Enable */
203 #define GSWIP_MAC_CTRL_4_GWAIT_MASK GENMASK(14, 8) /* LPI Wait Time 1G */
205 #define GSWIP_MAC_CTRL_4_WAIT_MASK GENMASK(6, 0) /* LPI Wait Time 100M */

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