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/linux/drivers/pinctrl/qcom/
H A DKconfig52 tristate "Qualcomm Technologies Inc LPASS LPI pin controller driver"
60 Qualcomm Technologies Inc LPASS (Low Power Audio SubSystem) LPI
64 tristate "Qualcomm Technologies Inc SC7280 and SM8350 LPASS LPI pin controller driver"
69 Qualcomm Technologies Inc LPASS (Low Power Audio SubSystem) LPI
74 tristate "Qualcomm Technologies Inc SDM660 LPASS LPI pin controller driver"
80 Qualcomm Technologies Inc LPASS (Low Power Audio SubSystem) LPI
84 tristate "Qualcomm Technologies Inc SM4250 LPASS LPI pin controller driver"
89 Qualcomm Technologies Inc LPASS (Low Power Audio SubSystem) LPI
93 tristate "Qualcomm Technologies Inc SM6115 LPASS LPI pin controller driver"
98 Qualcomm Technologies Inc LPASS (Low Power Audio SubSystem) LPI
[all …]
H A DMakefile45 obj-$(CONFIG_PINCTRL_SC7280_LPASS_LPI) += pinctrl-sc7280-lpass-lpi.o
49 obj-$(CONFIG_PINCTRL_SDM660_LPASS_LPI) += pinctrl-sdm660-lpass-lpi.o
55 obj-$(CONFIG_PINCTRL_SM4250_LPASS_LPI) += pinctrl-sm4250-lpass-lpi.o
58 obj-$(CONFIG_PINCTRL_SM6115_LPASS_LPI) += pinctrl-sm6115-lpass-lpi.o
65 obj-$(CONFIG_PINCTRL_SM8250_LPASS_LPI) += pinctrl-sm8250-lpass-lpi.o
68 obj-$(CONFIG_PINCTRL_SM8450_LPASS_LPI) += pinctrl-sm8450-lpass-lpi.o
70 obj-$(CONFIG_PINCTRL_SM8550_LPASS_LPI) += pinctrl-sm8550-lpass-lpi.o
72 obj-$(CONFIG_PINCTRL_SM8650_LPASS_LPI) += pinctrl-sm8650-lpass-lpi.o
74 obj-$(CONFIG_PINCTRL_SC8280XP_LPASS_LPI) += pinctrl-sc8280xp-lpass-lpi.o
75 obj-$(CONFIG_PINCTRL_LPASS_LPI) += pinctrl-lpass-lpi.o
H A Dpinctrl-sc7280-lpass-lpi.c11 #include "pinctrl-lpass-lpi.h"
132 .compatible = "qcom,sc7280-lpass-lpi-pinctrl",
135 .compatible = "qcom,sm8350-lpass-lpi-pinctrl",
144 .name = "qcom-sc7280-lpass-lpi-pinctrl",
152 MODULE_DESCRIPTION("QTI SC7280 LPI GPIO pin control driver");
H A Dpinctrl-sm6115-lpass-lpi.c11 #include "pinctrl-lpass-lpi.h"
139 { .compatible = "qcom,sm6115-lpass-lpi-pinctrl", .data = &sm6115_lpi_data },
146 .name = "qcom-sm6115-lpass-lpi-pinctrl",
154 MODULE_DESCRIPTION("QTI SM6115 LPI GPIO pin control driver");
H A Dpinctrl-sc8280xp-lpass-lpi.c10 #include "pinctrl-lpass-lpi.h"
169 .compatible = "qcom,sc8280xp-lpass-lpi-pinctrl",
178 .name = "qcom-sc8280xp-lpass-lpi-pinctrl",
186 MODULE_DESCRIPTION("QTI SC8280XP LPI GPIO pin control driver");
H A Dpinctrl-sdm660-lpass-lpi.c15 #include "pinctrl-lpass-lpi.h"
141 .compatible = "qcom,sdm660-lpass-lpi-pinctrl",
150 .name = "qcom-sdm660-lpass-lpi-pinctrl",
159 MODULE_DESCRIPTION("QTI SDM660 LPI GPIO pin control driver");
H A Dpinctrl-sm8450-lpass-lpi.c10 #include "pinctrl-lpass-lpi.h"
198 .compatible = "qcom,sm8450-lpass-lpi-pinctrl",
207 .name = "qcom-sm8450-lpass-lpi-pinctrl",
215 MODULE_DESCRIPTION("QTI SM8450 LPI GPIO pin control driver");
H A Dpinctrl-sm8550-lpass-lpi.c10 #include "pinctrl-lpass-lpi.h"
206 .compatible = "qcom,sm8550-lpass-lpi-pinctrl",
215 .name = "qcom-sm8550-lpass-lpi-pinctrl",
223 MODULE_DESCRIPTION("Qualcomm SM8550 LPI GPIO pin control driver");
H A Dpinctrl-sm8650-lpass-lpi.c10 #include "pinctrl-lpass-lpi.h"
213 .compatible = "qcom,sm8650-lpass-lpi-pinctrl",
222 .name = "qcom-sm8650-lpass-lpi-pinctrl",
230 MODULE_DESCRIPTION("Qualcomm SM8650 LPI GPIO pin control driver");
H A Dpinctrl-sm4250-lpass-lpi.c11 #include "pinctrl-lpass-lpi.h"
219 { .compatible = "qcom,sm4250-lpass-lpi-pinctrl", .data = &sm4250_lpi_data },
226 .name = "qcom-sm4250-lpass-lpi-pinctrl",
234 MODULE_DESCRIPTION("QTI SM4250 LPI GPIO pin control driver");
/linux/drivers/acpi/riscv/
H A Dcpuidle.c25 struct acpi_lpi_state *lpi; in acpi_cpu_init_idle() local
40 lpi = &pr->power.lpi_states[i]; in acpi_cpu_init_idle()
48 if (((lpi->address & RISCV_FFH_LPI_TYPE_MASK) != RISCV_FFH_LPI_TYPE_SBI) || in acpi_cpu_init_idle()
49 (lpi->address & RISCV_FFH_LPI_RSVD_MASK)) { in acpi_cpu_init_idle()
50 pr_warn("Invalid LPI entry method %#llx\n", lpi->address); in acpi_cpu_init_idle()
54 state = lpi->address; in acpi_cpu_init_idle()
69 int acpi_processor_ffh_lpi_enter(struct acpi_lpi_state *lpi) in acpi_processor_ffh_lpi_enter() argument
71 u32 state = lpi->address; in acpi_processor_ffh_lpi_enter()
75 lpi->index, in acpi_processor_ffh_lpi_enter()
79 lpi->index, in acpi_processor_ffh_lpi_enter()
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dqcom,sm6115-lpass-lpi-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm6115-lpass-lpi-pinctrl.yaml#
7 title: Qualcomm SM6115 SoC LPASS LPI TLMM
15 (LPASS) Low Power Island (LPI) of Qualcomm SM6115 SoC.
21 - qcom,sm6115-lpass-lpi-pinctrl
24 - qcom,qcm2290-lpass-lpi-pinctrl
25 - const: qcom,sm6115-lpass-lpi-pinctrl
29 - description: LPASS LPI TLMM Control and Status registers
30 - description: LPASS LPI MCC registers
55 $ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state
76 - $ref: qcom,lpass-lpi-common.yaml#
[all …]
H A Dqcom,sm4250-lpass-lpi-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm4250-lpass-lpi-pinctrl.yaml#
7 title: Qualcomm SM4250 SoC LPASS LPI TLMM
14 (LPASS) Low Power Island (LPI) of Qualcomm SM4250 SoC.
18 const: qcom,sm4250-lpass-lpi-pinctrl
22 - description: LPASS LPI TLMM Control and Status registers
23 - description: LPASS LPI MCC registers
48 $ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state
72 - $ref: qcom,lpass-lpi-common.yaml#
86 compatible = "qcom,sm4250-lpass-lpi-pinctrl";
H A Dqcom,sc8280xp-lpass-lpi-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml#
7 title: Qualcomm SC8280XP SoC LPASS LPI TLMM
14 (LPASS) Low Power Island (LPI) of Qualcomm SC8280XP SoC.
18 const: qcom,sc8280xp-lpass-lpi-pinctrl
22 - description: LPASS LPI TLMM Control and Status registers
23 - description: LPASS LPI MCC registers
50 $ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state
74 - $ref: qcom,lpass-lpi-common.yaml#
88 compatible = "qcom,sc8280xp-lpass-lpi-pinctrl";
H A Dqcom,sm8450-lpass-lpi-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml#
7 title: Qualcomm SM8450 SoC LPASS LPI TLMM
14 (LPASS) Low Power Island (LPI) of Qualcomm SM8450 SoC.
18 const: qcom,sm8450-lpass-lpi-pinctrl
22 - description: LPASS LPI TLMM Control and Status registers
23 - description: LPASS LPI MCC registers
50 $ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state
76 - $ref: qcom,lpass-lpi-common.yaml#
90 compatible = "qcom,sm8450-lpass-lpi-pinctrl";
H A Dqcom,sm8250-lpass-lpi-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml#
7 title: Qualcomm SM8250 SoC LPASS LPI TLMM
14 (LPASS) Low Power Island (LPI) of Qualcomm SM8250 SoC.
18 const: qcom,sm8250-lpass-lpi-pinctrl
48 $ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state
73 - $ref: qcom,lpass-lpi-common.yaml#
87 compatible = "qcom,sm8250-lpass-lpi-pinctrl";
/linux/drivers/acpi/arm64/
H A Dcpuidle.c20 struct acpi_lpi_state *lpi; in psci_acpi_cpu_init_idle() local
40 lpi = &pr->power.lpi_states[i + 1]; in psci_acpi_cpu_init_idle()
45 state = lpi->address; in psci_acpi_cpu_init_idle()
60 __cpuidle int acpi_processor_ffh_lpi_enter(struct acpi_lpi_state *lpi) in acpi_processor_ffh_lpi_enter() argument
62 u32 state = lpi->address; in acpi_processor_ffh_lpi_enter()
64 if (ARM64_LPI_IS_RETENTION_STATE(lpi->arch_flags)) in acpi_processor_ffh_lpi_enter()
66 lpi->index, state); in acpi_processor_ffh_lpi_enter()
69 lpi->index, state); in acpi_processor_ffh_lpi_enter()
/linux/drivers/acpi/
H A Dprocessor_idle.c922 /* LPI States start at index 3 */ in acpi_processor_evaluate_lpi()
992 * combine_lpi_states - combine local and parent LPI states to form a composite LPI state
994 * @local: local LPI state
995 * @parent: parent LPI state
996 * @result: composite LPI state
1049 pr_warn("Limiting number of LPI states to max (%d)\n", in flatten_lpi_states()
1131 /* flatten all the LPI states in this level of hierarchy */ in acpi_processor_get_lpi_info()
1152 int __weak acpi_processor_ffh_lpi_enter(struct acpi_lpi_state *lpi) in acpi_processor_ffh_lpi_enter() argument
1158 * acpi_idle_lpi_enter - enters an ACPI any LPI state
1169 struct acpi_lpi_state *lpi; in acpi_idle_lpi_enter() local
[all …]
/linux/drivers/net/ethernet/samsung/sxgbe/
H A Dsxgbe_core.c53 /* Reading this register shall clear all the LPI status bits */ in sxgbe_get_lpi_status()
190 /* Enable the LPI mode for transmit path with Tx automate bit set. in sxgbe_set_eee_mode()
192 * to LPI mode after all outstanding and pending packets are in sxgbe_set_eee_mode()
229 /* Program the timers in the LPI timer control register: in sxgbe_set_eee_timer()
232 * the LPI pattern. in sxgbe_set_eee_timer()
234 * after it has stopped transmitting the LPI pattern. in sxgbe_set_eee_timer()
H A Dsxgbe_common.h118 /* EEE-LPI mode flags*/
124 /* EEE-LPI Interrupt status flag */
127 /* EEE-LPI Default timer values */
131 /* EEE-LPI Control and status definitions */
243 /* EEE-LPI stats */
348 /* EEE-LPI specific operations */
501 /* EEE-LPI specific members */
/linux/drivers/acpi/x86/
H A Ds2idle.c139 "LPI: constraints list begin:\n"); in lpi_device_get_constraints_amd()
190 acpi_handle_debug(lps0_device_handle, "LPI: constraints list end\n"); in lpi_device_get_constraints_amd()
216 acpi_handle_debug(lps0_device_handle, "LPI: constraints list begin:\n"); in lpi_device_get_constraints()
299 acpi_handle_debug(lps0_device_handle, "LPI: constraints list end\n"); in lpi_device_get_constraints()
319 "LPI: required min power state:%s current power state:%s\n", in lpi_check_constraints()
324 acpi_handle_info(entry->handle, "LPI: Device not power manageable\n"); in lpi_check_constraints()
331 "LPI: Constraint not met; min power state:%s current power state:%s\n", in lpi_check_constraints()
/linux/Documentation/devicetree/bindings/net/
H A Dsnps,dwc-qos-ethernet.txt108 - snps,en-lpi: If present it enables use of the AXI low-power interface
117 - snps,en-tx-lpi-clockgating: Enable gating of the MAC TX clock during
149 snps,en-tx-lpi-clockgating;
150 snps,en-lpi;
H A Dsamsung-sxgbe.txt8 transmit DMA interrupts, receive DMA interrupts and lpi interrupt.
12 and 1 optional lpi interrupt.
/linux/Documentation/networking/device_drivers/ethernet/stmicro/
H A Dstmmac.rst173 This parameter changes the default LPI TX Expiration time in milliseconds.
295 family of Physical layer to operate in the Low Power Idle (LPI) mode. The EEE
298 The LPI mode allows power saving by switching off parts of the communication
302 the system should enter or exit the LPI mode and communicate this to PHY.
308 To enter in TX LPI mode the driver needs to have a software timer that enable
309 and disable the LPI mode when there is nothing to be transmitted.
490 35) Enables TX LPI Clock Gating::
570 1) Enable AXI LPI::
/linux/drivers/irqchip/
H A Dirq-gic-v4.c32 * physical LPI which gets unmapped when the guest maps the
34 * mapped to the LPI (host) or the VLPI (guest). Note that this is
66 * dialect) gets a single doorbell LPI, no matter how many interrupts
73 * turn, this domain sits on top of the normal LPI allocator, and a

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