Home
last modified time | relevance | path

Searched full:lpc32xx (Results 1 – 25 of 44) sorted by relevance

12

/linux/Documentation/devicetree/bindings/sound/
H A Dnxp,lpc3220-i2s.yaml7 title: NXP LPC32XX I2S Controller
10 The I2S controller in LPC32XX SoCs, ASoC DAI.
60 #include <dt-bindings/clock/lpc32xx-clock.h>
/linux/drivers/iio/adc/
H A Dlpc32xx_adc.c3 * lpc32xx_adc.c - Support for ADC in LPC32XX
22 * LPC32XX registers definitions
45 #define LPC32XXAD_NAME "lpc32xx-adc"
212 dev_info(&pdev->dev, "LPC32XX ADC driver loaded, IRQ %d\n", irq); in lpc32xx_adc_probe()
234 MODULE_DESCRIPTION("LPC32XX ADC driver");
/linux/arch/arm/mach-lpc32xx/
H A DKconfig4 bool "NXP LPC32XX"
13 Support for the NXP LPC32XX family of processors
H A Dserial.c3 * arch/arm/mach-lpc32xx/serial.c
18 #include <linux/soc/nxp/lpc32xx-misc.h>
20 #include "lpc32xx.h"
H A Dsuspend.S3 * arch/arm/mach-lpc32xx/suspend.S
12 #include "lpc32xx.h"
/linux/Documentation/devicetree/bindings/input/touchscreen/
H A Dnxp,lpc3220-tsc.yaml7 title: NXP LPC32xx SoC Touchscreen Controller (TSC)
35 #include <dt-bindings/clock/lpc32xx-clock.h>
/linux/Documentation/devicetree/bindings/net/
H A Dnxp,lpc-eth.yaml7 title: NXP LPC32xx SoC Ethernet Controller
27 description: Use LPC32xx internal SRAM (IRAM) for DMA buffering
/linux/Documentation/devicetree/bindings/rtc/
H A Dnxp,lpc3220-rtc.yaml7 title: NXP LPC32xx SoC Real-time Clock
40 #include <dt-bindings/clock/lpc32xx-clock.h>
/linux/Documentation/devicetree/bindings/timer/
H A Dnxp,lpc3220-timer.yaml14 LPC32xx, LPC178x, LPC18xx and LPC43xx parts.
46 #include <dt-bindings/clock/lpc32xx-clock.h>
/linux/include/dt-bindings/clock/
H A Dlpc32xx-clock.h15 /* LPC32XX System Control Block clocks */
53 /* LPC32XX USB clocks */
/linux/Documentation/devicetree/bindings/mtd/
H A Dlpc32xx-mlc.txt1 NXP LPC32xx SoC NAND MLC controller
9 The following required properties are very controller specific. See the LPC32xx
H A Dlpc32xx-slc.txt1 NXP LPC32xx SoC NAND SLC controller
9 The following required properties are very controller specific. See the LPC32xx
/linux/drivers/usb/host/
H A Dohci-nxp.c6 * - NXP LPC32xx
38 /* On LPC32xx, those are undefined */
56 /* LPC32XX only supports DAT_SE0 USB mode */ in isp1301_configure_lpc32xx()
/linux/drivers/mtd/nand/raw/
H A DKconfig141 tristate "NXP LPC32xx SLC NAND controller"
145 Enables support for NXP's LPC32XX SLC (i.e. for Single Level Cell
153 tristate "NXP LPC32xx MLC NAND controller"
157 Uses the LPC32XX MLC (i.e. for Multi Level Cell chips) NAND
/linux/drivers/rtc/
H A Drtc-lpc32xx.c349 .name = "rtc-lpc32xx",
358 MODULE_DESCRIPTION("RTC driver for the LPC32xx SoC");
360 MODULE_ALIAS("platform:rtc-lpc32xx");
/linux/drivers/input/keyboard/
H A Dlpc32xx-keys.c3 * NXP LPC32xx SoC Key Scan Interface
195 input->phys = "lpc32xx/input0"; in lpc32xx_kscan_probe()
320 MODULE_DESCRIPTION("Key scanner driver for LPC32XX devices");
/linux/include/linux/mtd/
H A Dlpc32xx_mlc.h3 * Platform data for LPC32xx SoC MLC NAND controller
H A Dlpc32xx_slc.h3 * Platform data for LPC32xx SoC SLC NAND controller
/linux/drivers/clk/nxp/
H A DMakefile5 obj-$(CONFIG_ARCH_LPC32XX) += clk-lpc32xx.o
/linux/drivers/net/ethernet/nxp/
H A DKconfig9 some NXP LPC devices. You can safely enable this option for LPC32xx
/linux/Documentation/devicetree/bindings/clock/
H A Dnxp,lpc3220-usb-clk.yaml7 title: NXP LPC32xx USB Clock Controller
H A Dnxp,lpc3220-clk.yaml7 title: NXP LPC32xx Clock Controller
/linux/Documentation/devicetree/bindings/serial/
H A Dnxp,lpc3220-hsuart.yaml7 title: NXP LPC32xx SoC High Speed UART
/linux/Documentation/devicetree/bindings/iio/adc/
H A Dnxp,lpc3220-adc.yaml13 This hardware block has been used on several LPC32XX SoCs.
/linux/Documentation/devicetree/bindings/dma/
H A Dnxp,lpc3220-dmamux.yaml7 title: DMA multiplexer for LPC32XX SoC (DMA request router)

12