Home
last modified time | relevance | path

Searched full:llp (Results 1 – 25 of 28) sorted by relevance

12

/linux/sound/soc/sof/
H A Dipc4-fw-reg.h46 * struct sof_ipc4_llp_reading - Llp information in fw
47 * @llp_l: Lower part of 64-bit LLP
48 * @llp_u: Upper part of 64-bit LLP
60 * struct of sof_ipc4_llp_reading_extended - Extended llp info
61 * @llp_reading: Llp information in memory window
72 * struct sof_ipc4_llp_reading_slot - Llp slot information in memory window
74 * @reading: Llp information in memory window
100 /* Number of GPDMA LLP Reading slots in FW Regs. */
124 * @llp_gpdma_reading_slots: LLP Readings for single link gateways
126 * @llp_evad_reading_slot: LLP Readings for EVAD gateway
H A Dipc4-pcm.c26 * @llp_offset: llp offset in memory window
1002 /* find llp slot used by current dai */ in sof_ipc4_build_time_info()
1014 /* if no llp gpdma slot is used, check aggregated sdw slot */ in sof_ipc4_build_time_info()
1168 struct sof_ipc4_llp_reading_slot llp; in sof_ipc4_pcm_pointer() local
1205 * If the LLP counter is not reported by firmware in the SRAM window in sof_ipc4_pcm_pointer()
1214 sof_mailbox_read(sdev, time_info->llp_offset, &llp, sizeof(llp)); in sof_ipc4_pcm_pointer()
1215 dai_cnt = ((u64)llp.reading.llp_u << 32) | llp.reading.llp_l; in sof_ipc4_pcm_pointer()
H A Dipc4-topology.h107 * Use LARGE_CONFIG_GET to retrieve Linear Link Position (LLP) value for non
112 * Use LARGE_CONFIG_GET to retrieve Linear Link Position (LLP) value for non
/linux/Documentation/spi/
H A Dspi-lm70llp.rst2 spi_lm70llp : LM70-LLP parport-to-SPI adapter
7 * National Semiconductor LM70 LLP evaluation board
16 This driver provides glue code connecting a National Semiconductor LM70 LLP
28 The schematic for this particular board (the LM70EVAL-LLP) is
33 The hardware interfacing on the LM70 LLP eval board is as follows:
36 Parallel LM70 LLP
63 A "gotcha": National Semiconductor's LM70 LLP eval board circuit schematic
/linux/drivers/net/ethernet/mscc/
H A Docelot_fdma.c116 dcb->llp = 0; in ocelot_fdma_dcb_set_data()
177 dcb->llp = ocelot_fdma_idx_dma(rx_ring->dcbs_dma, idx); in ocelot_fdma_alloc_rx_buffs()
210 u32 llp; in ocelot_fdma_check_stop_rx() local
212 /* Check if the FDMA hits the DCB with LLP == NULL */ in ocelot_fdma_check_stop_rx()
213 llp = ocelot_fdma_readl(ocelot, MSCC_FDMA_DCB_LLP(MSCC_FDMA_XTR_CHAN)); in ocelot_fdma_check_stop_rx()
214 if (unlikely(llp)) in ocelot_fdma_check_stop_rx()
231 dcb->llp = 0; in ocelot_fdma_rx_set_llp()
254 /* FDMA stopped on the last DCB that contained a NULL LLP, since in ocelot_fdma_rx_restart()
261 /* Get the next DMA addr located after LLP == NULL DCB */ in ocelot_fdma_rx_restart()
497 /* Purge the TX packets that have been sent up to the NULL llp or the in ocelot_fdma_tx_cleanup()
[all …]
H A Docelot_fdma.h65 u32 llp; member
/linux/drivers/dma/dw-edma/
H A Ddw-hdma-v0-core.c183 struct dw_hdma_v0_llp *llp = chunk->ll_region.vaddr.mem + ofs; in dw_hdma_v0_write_ll_link() local
185 llp->control = control; in dw_hdma_v0_write_ll_link()
186 llp->llp.reg = pointer; in dw_hdma_v0_write_ll_link()
188 struct dw_hdma_v0_llp __iomem *llp = chunk->ll_region.vaddr.io + ofs; in dw_hdma_v0_write_ll_link() local
190 writel(control, &llp->control); in dw_hdma_v0_write_ll_link()
191 writeq(pointer, &llp->llp.reg); in dw_hdma_v0_write_ll_link()
250 /* llp is not aligned on 64bit -> keep 32bit accesses */ in dw_hdma_v0_core_ll_start()
251 SET_CH_32(dw, chan->dir, chan->id, llp.lsb, in dw_hdma_v0_core_ll_start()
253 SET_CH_32(dw, chan->dir, chan->id, llp.msb, in dw_hdma_v0_core_ll_start()
H A Ddw-hdma-v0-debugfs.c87 CTX_REGISTER(dw, llp.lsb, dir, ch), in dw_hdma_debugfs_regs_ch()
88 CTX_REGISTER(dw, llp.msb, dir, ch), in dw_hdma_debugfs_regs_ch()
H A Ddw-edma-v0-regs.h51 } llp; member
230 } llp; member
H A Ddw-edma-v0-debugfs.c130 CTX_REGISTER(dw, llp.lsb, dir, ch), in dw_edma_debugfs_regs_ch()
131 CTX_REGISTER(dw, llp.msb, dir, ch), in dw_edma_debugfs_regs_ch()
/linux/drivers/dma/
H A Didma64.c100 channel_writeq(idma64c, LLP, hw->llp); in idma64_chan_start()
222 dma_pool_free(idma64c->pool, hw->lli, hw->llp); in idma64_desc_free()
239 enum dma_transfer_direction direction, u64 llp) in idma64_hw_desc_fill() argument
273 lli->llp = llp; in idma64_hw_desc_fill()
283 u64 llp = 0; in idma64_desc_fill() local
288 idma64_hw_desc_fill(hw, config, desc->direction, llp); in idma64_desc_fill()
289 llp = hw->llp; in idma64_desc_fill()
296 /* Disable LLP transfer in the last block */ in idma64_desc_fill()
318 hw->lli = dma_pool_alloc(idma64c->pool, GFP_NOWAIT, &hw->llp); in idma64_prep_slave_sg()
353 u64 llp = channel_readq(idma64c, LLP); in idma64_active_desc_size() local
[all …]
H A Didma64.h99 u64 llp; member
108 dma_addr_t llp; member
/linux/drivers/spi/
H A Dspi-lm70llp.c3 * Driver for LM70EVAL-LLP board for the LM70 sensor
25 * NS LM70 LLP Evaluation Board, interfacing to a PC using its parallel
33 * The schematic for this particular board (the LM70EVAL-LLP) is
40 * The LM70 LLP connects to the PC parallel port in the following manner:
42 * Parallel LM70 LLP
89 /*---------------------- LM70 LLP eval board-specific inlines follow */
326 "Parport adapter for the National Semiconductor LM70 LLP eval board");
/linux/drivers/dma/dw/
H A Dcore.c131 " SAR: 0x%x DAR: 0x%x LLP: 0x%x CTL: 0x%x:%08x\n", in dwc_dump_chan_regs()
134 channel_readl(dwc, LLP), in dwc_dump_chan_regs()
156 * Software emulation of LLP mode relies on interrupts to continue in dwc_do_single_block()
194 "BUG: Attempted to start new LLP transfer inside ongoing one\n"); in dwc_dostart()
211 channel_writel(dwc, LLP, first->txd.phys | lms); in dwc_dostart()
300 dma_addr_t llp; in dwc_scan_descriptors() local
307 llp = channel_readl(dwc, LLP); in dwc_scan_descriptors()
356 dev_vdbg(chan2dev(&dwc->chan), "%s: soft LLP mode\n", __func__); in dwc_scan_descriptors()
361 dev_vdbg(chan2dev(&dwc->chan), "%s: llp=%pad\n", __func__, &llp); in dwc_scan_descriptors()
368 if (desc->txd.phys == DWC_LLP_LOC(llp)) { in dwc_scan_descriptors()
[all …]
H A Dregs.h42 DW_REG(LLP); /* Linked List Pointer */
128 #define DWC_PARAMS_HC_LLP 13 /* set LLP register to zero */
143 /* Bitfields in LLP */
273 /* software emulation of the LLP transfers */
373 __le32 llp; /* chain to next lli */ member
/linux/arch/powerpc/mm/book3s64/
H A Dslb.c235 unsigned long llp; in slb_dump_contents() local
256 llp = v & SLB_VSID_LLP; in slb_dump_contents()
258 pr_err(" 1T ESID=%9lx VSID=%13lx LLP:%3lx\n", in slb_dump_contents()
260 (v & ~SLB_VSID_B) >> SLB_VSID_SHIFT_1T, llp); in slb_dump_contents()
262 pr_err(" 256M ESID=%9lx VSID=%13lx LLP:%3lx\n", in slb_dump_contents()
264 (v & ~SLB_VSID_B) >> SLB_VSID_SHIFT, llp); in slb_dump_contents()
486 pr_devel("SLB: linear LLP = %04lx\n", linear_llp); in slb_initialize()
487 pr_devel("SLB: io LLP = %04lx\n", io_llp); in slb_initialize()
489 pr_devel("SLB: vmemmap LLP = %04lx\n", vmemmap_llp); in slb_initialize()
/linux/arch/mips/include/asm/sn/sn0/
H A Dhubni.h30 #define NI_GLOBAL_PARMS 0x600018 /* LLP parameters */
57 #define NI_PORT_PARMS 0x608000 /* LLP Parameters */
58 #define NI_PORT_ERROR 0x608008 /* LLP Errors */
127 #define NDP_LLP8BITMODE (UINT64_CAST 1 << 12) /* LLP 8-bit mode */
H A Dhubio.h35 #define IIO_LLP_CSR IIO_ILCSR /* LLP control and status */
36 #define IIO_LLP_LOG IIO_ILLR /* LLP log */
98 #define IIO_ILCSR 0x400128 /* LLP control and status */
99 #define IIO_ILLR 0x400130 /* LLP Log */
170 * The IO LLP control status register and widget control register
192 wcr_f_bad_pkt: 1, /* Force bad llp pkt enable */
193 wcr_xbar_crd: 3, /* LLP crossbar credit */
196 wcr_widget_id: 4; /* LLP crossbar credit */
208 llp_tx_cnt: 8, /* LLP Xmit retry counter */
210 tx_max_rtry: 1, /* LLP Retry Timeout Signal */
[all …]
/linux/drivers/bluetooth/
H A Dhci_ll.c690 static const struct hci_uart_proto llp; variable
771 return hci_uart_register_device(hu, &llp); in hci_ti_probe()
810 static const struct hci_uart_proto llp = { variable
826 return hci_uart_register_proto(&llp); in ll_init()
833 return hci_uart_unregister_proto(&llp); in ll_deinit()
/linux/sound/soc/sof/intel/
H A Dhda-pcm.c335 * Reset the llp cache values (they are used for LLP compensation in in hda_dsp_pcm_open()
H A Dhda-dai-ops.c350 * Save the LLP registers since in case of PAUSE the LLP in hda_trigger()
H A Dhda-stream.c1157 * hda_dsp_get_stream_llp - Retrieve the LLP (Linear Link Position) of the stream in hda_dsp_get_stream_llp()
1176 * The LLP needs to be read from the Link DMA used for this FE as it is in hda_dsp_get_stream_llp()
1210 /* Compensate the LLP counter with the saved offset */ in hda_dsp_get_stream_ldp()
/linux/drivers/infiniband/hw/erdma/
H A Derdma_cm.h113 /* Saved upcalls of socket llp.sock */
/linux/drivers/infiniband/sw/siw/
H A Dsiw_qp.c131 siw_dbg_qp(qp, "enter llp close, state = %s\n", in siw_qp_llp_close()
161 siw_dbg_qp(qp, "llp close: no state transition needed: %s\n", in siw_qp_llp_close()
178 siw_dbg_qp(qp, "llp close exit: state %s\n", in siw_qp_llp_close()
765 * The LLP may already moved the QP to closing in siw_qp_nextstate_from_close()
772 * QP was moved to CLOSING by LLP event in siw_qp_nextstate_from_close()
/linux/arch/m68k/include/asm/
H A DMC68EZ328.h400 #define PC_LLP 0x20 /* Use LLP as PC[5] */

12