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/linux/drivers/dma/
H A Dste_dma40_ll.c133 static int d40_phy_fill_lli(struct d40_phy_lli *lli, in d40_phy_fill_lli() argument
161 lli->reg_elt = (data_size / data_width) << D40_SREG_ELEM_PHY_ECNT_POS; in d40_phy_fill_lli()
168 lli->reg_elt |= data_width << D40_SREG_ELEM_PHY_EIDX_POS; in d40_phy_fill_lli()
171 lli->reg_ptr = data; in d40_phy_fill_lli()
172 lli->reg_cfg = reg_cfg; in d40_phy_fill_lli()
176 lli->reg_lnk = BIT(D40_SREG_LNK_PHY_TCP_POS); in d40_phy_fill_lli()
178 lli->reg_lnk = next_lli; in d40_phy_fill_lli()
182 lli->reg_cfg |= BIT(D40_SREG_CFG_TIM_POS); in d40_phy_fill_lli()
184 lli->reg_cfg &= ~BIT(D40_SREG_CFG_TIM_POS); in d40_phy_fill_lli()
213 d40_phy_buf_to_lli(struct d40_phy_lli *lli, dma_addr_t addr, u32 size, in d40_phy_buf_to_lli() argument
[all …]
H A Dloongson1-apb-dma.c176 /* allocate memory for querying the current lli */ in ls1x_dma_alloc_chan_resources()
193 struct ls1x_dma_lli *lli, *_lli; in ls1x_dma_free_desc() local
195 list_for_each_entry_safe(lli, _lli, &desc->lli_list, node) { in ls1x_dma_free_desc()
196 list_del(&lli->node); in ls1x_dma_free_desc()
197 dma_pool_free(chan->lli_pool, lli, lli->phys); in ls1x_dma_free_desc()
221 struct ls1x_dma_lli *lli, *prev = NULL, *first = NULL; in ls1x_dma_prep_lli() local
255 lli = dma_pool_zalloc(chan->lli_pool, GFP_NOWAIT, &phys); in ls1x_dma_prep_lli()
256 if (!lli) { in ls1x_dma_prep_lli()
257 dev_err(dev, "failed to alloc lli %u\n", i); in ls1x_dma_prep_lli()
262 lli->phys = phys; in ls1x_dma_prep_lli()
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H A Dat_hdmac.c196 /* LLI == Linked List Item; aka DMA buffer descriptor */
205 u32 dscr; /* chain to next lli */
211 * @lli: linked list item that is passed to the DMA controller
212 * @lli_phys: physical address of the LLI.
216 struct at_lli *lli; member
343 * @lli_pool: hw lli table
413 static void atc_dump_lli(struct at_dma_chan *atchan, struct at_lli *lli) in atc_dump_lli() argument
417 &lli->saddr, &lli->daddr, in atc_dump_lli()
418 lli->ctrla, lli->ctrlb, &lli->dscr); in atc_dump_lli()
482 u32 ctrlb = desc->sg[i].lli->ctrlb; in set_lli_eol()
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H A Damba-pl08x.c30 * - 8-word aligned LLI, instead of 4-word, due to extra CCTL2 word,
52 * which occur for the current LLI entry, and the DMAC raises TC at the
53 * end of every LLI entry. Observed behaviour shows the DMAC listening
59 * zero). The data is transferred from the current LLI entry, until
61 * will then move to the next LLI entry. Unsupported by PL080S.
106 * register and LLI word for transfer size.
145 * @reg_lli: transfer LLI address register
272 * @pool: a pool for the LLI descriptors
273 * @lli_buses: bitmask to or in to LLI pointer selecting AHB port for LLI
276 * @lli_words: how many words are used in each LLI item for this variant
[all …]
H A Dste_dma40_ll.h12 #define D40_LLI_ALIGN 16 /* LLI alignment must be 16 bytes. */
326 /* LLI related structures */
367 * struct d40_log_lli - logical lli configuration
384 * @src: pointer to src lli configuration.
385 * @dst: pointer to dst lli configuration.
444 struct d40_phy_lli *lli,
H A Dk3dma.c61 u32 lli; member
163 writel_relaxed(hw->lli, phy->base + CX_LLI); in k3_dma_set_desc()
411 /* end of lli */ in k3_dma_tx_status()
412 if (!ds->desc_hw[index].lli) in k3_dma_tx_status()
450 ds->desc_hw[num].lli = ds->desc_hw_lli + (num + 1) * in k3_dma_fill_desc()
453 ds->desc_hw[num].lli |= CX_LLI_CHAIN_EN; in k3_dma_fill_desc()
526 ds->desc_hw[num-1].lli = 0; /* end of link */ in k3_dma_prep_memcpy()
581 ds->desc_hw[num-1].lli = 0; /* end of link */ in k3_dma_prep_slave_sg()
647 ds->desc_hw[num - 1].lli |= ds->desc_hw_lli; in k3_dma_prep_dma_cyclic()
H A Dste_dma40.c36 * @soft_lli_chans: A vector, that marks physical channels will use LLI by SW
373 * @lli_phy: LLI settings for physical channel. Both src and dst=
390 /* LLI physical */
392 /* LLI logical */
854 struct d40_log_lli_bidir *lli = &desc->lli_log; in d40_log_lli_to_lcxa() local
900 &lli->dst[lli_current], in d40_log_lli_to_lcxa()
901 &lli->src[lli_current], in d40_log_lli_to_lcxa()
928 &lli->dst[lli_current], in d40_log_lli_to_lcxa()
929 &lli->src[lli_current], in d40_log_lli_to_lcxa()
938 &lli->dst[lli_current], in d40_log_lli_to_lcxa()
[all …]
H A Didma64.h107 struct idma64_lli *lli; member
/linux/drivers/dma/dw-edma/
H A Ddw-hdma-v0-core.c161 struct dw_hdma_v0_lli *lli = chunk->ll_region.vaddr.mem + ofs; in dw_hdma_v0_write_ll_data() local
163 lli->control = control; in dw_hdma_v0_write_ll_data()
164 lli->transfer_size = size; in dw_hdma_v0_write_ll_data()
165 lli->sar.reg = sar; in dw_hdma_v0_write_ll_data()
166 lli->dar.reg = dar; in dw_hdma_v0_write_ll_data()
168 struct dw_hdma_v0_lli __iomem *lli = chunk->ll_region.vaddr.io + ofs; in dw_hdma_v0_write_ll_data() local
170 writel(control, &lli->control); in dw_hdma_v0_write_ll_data()
171 writel(size, &lli->transfer_size); in dw_hdma_v0_write_ll_data()
172 writeq(sar, &lli->sar.reg); in dw_hdma_v0_write_ll_data()
173 writeq(dar, &lli->dar.reg); in dw_hdma_v0_write_ll_data()
H A Ddw-edma-v0-core.c285 struct dw_edma_v0_lli *lli = chunk->ll_region.vaddr.mem + ofs; in dw_edma_v0_write_ll_data() local
287 lli->control = control; in dw_edma_v0_write_ll_data()
288 lli->transfer_size = size; in dw_edma_v0_write_ll_data()
289 lli->sar.reg = sar; in dw_edma_v0_write_ll_data()
290 lli->dar.reg = dar; in dw_edma_v0_write_ll_data()
292 struct dw_edma_v0_lli __iomem *lli = chunk->ll_region.vaddr.io + ofs; in dw_edma_v0_write_ll_data() local
294 writel(control, &lli->control); in dw_edma_v0_write_ll_data()
295 writel(size, &lli->transfer_size); in dw_edma_v0_write_ll_data()
296 writeq(sar, &lli->sar.reg); in dw_edma_v0_write_ll_data()
297 writeq(dar, &lli->dar.reg); in dw_edma_v0_write_ll_data()
/linux/Documentation/devicetree/bindings/dma/
H A Darm-pl08x.yaml55 lli-bus-interface-ahb1:
59 lli-bus-interface-ahb2:
114 lli-bus-interface-ahb1;
115 lli-bus-interface-ahb2;
135 lli-bus-interface-ahb2;
/linux/drivers/dma/dw/
H A Dregs.h145 #define DWC_LLP_LOC(x) ((x) & ~3) /* next lli */
368 /* LLI == Linked List Item; a.k.a. DMA block descriptor */
373 __le32 llp; /* chain to next lli */
386 struct dw_lli lli; member
388 #define lli_set(d, reg, v) ((d)->lli.reg |= cpu_to_le32(v))
389 #define lli_clear(d, reg, v) ((d)->lli.reg &= ~cpu_to_le32(v))
390 #define lli_read(d, reg) le32_to_cpu((d)->lli.reg)
391 #define lli_write(d, reg, v) ((d)->lli.reg = cpu_to_le32(v))
H A Dcore.c602 prev->lli.llp = 0; in dwc_prep_dma_memcpy()
750 prev->lli.llp = 0; in dwc_prep_slave_sg()
/linux/drivers/net/ethernet/chelsio/cxgb4/
H A Dcxgb4_uld.c511 struct cxgb4_lld_info *lli) in uld_queue_init() argument
517 lli->rxq_ids = rxq_info->rspq_id; in uld_queue_init()
518 lli->nrxq = rxq_info->nrxq; in uld_queue_init()
519 lli->ciq_ids = rxq_info->rspq_id + rxq_info->nrxq; in uld_queue_init()
520 lli->nciq = rxq_info->nciq; in uld_queue_init()
521 lli->ntxq = txq_info->ntxq; in uld_queue_init()
646 struct cxgb4_lld_info lli; in uld_attach() local
649 uld_init(adap, &lli); in uld_attach()
650 uld_queue_init(adap, uld, &lli); in uld_attach()
652 handle = adap->uld[uld].add(&lli); in uld_attach()
/linux/drivers/dma/stm32/
H A Dstm32-dma3.c274 struct stm32_dma3_lli lli[] __counted_by(lli_size);
376 hwdesc = swdesc->lli[i].hwdesc; in stm32_dma3_chan_dump_hwdesc()
379 dev_dbg(chan2dev(chan), "[%d]@%pad\n", i, &swdesc->lli[i].hwdesc_addr); in stm32_dma3_chan_dump_hwdesc()
390 dev_dbg(chan2dev(chan), "-->[0]@%pad\n", &swdesc->lli[0].hwdesc_addr); in stm32_dma3_chan_dump_hwdesc()
412 swdesc = kzalloc(struct_size(swdesc, lli, count), GFP_NOWAIT); in stm32_dma3_chan_desc_alloc()
418 swdesc->lli[i].hwdesc = dma_pool_zalloc(chan->lli_pool, GFP_NOWAIT, in stm32_dma3_chan_desc_alloc()
419 &swdesc->lli[i].hwdesc_addr); in stm32_dma3_chan_desc_alloc()
420 if (!swdesc->lli[i].hwdesc) in stm32_dma3_chan_desc_alloc()
426 writel_relaxed(swdesc->lli[0].hwdesc_addr & CLBAR_LBA, in stm32_dma3_chan_desc_alloc()
437 dma_pool_free(chan->lli_pool, swdesc->lli[i].hwdesc, swdesc->lli[i].hwdesc_addr); in stm32_dma3_chan_desc_alloc()
[all …]
/linux/mm/
H A Dhwpoison-inject.c152 DEFINE_DEBUGFS_ATTRIBUTE(hwpoison_fops, NULL, hwpoison_inject, "%lli\n");
153 DEFINE_DEBUGFS_ATTRIBUTE(unpoison_fops, NULL, hwpoison_unpoison, "%lli\n");
/linux/drivers/misc/
H A Dds1682.c163 dev_dbg(&client->dev, "ds1682_eeprom_read(p=%p, off=%lli, c=%zi)\n", in ds1682_eeprom_read()
180 dev_dbg(&client->dev, "ds1682_eeprom_write(p=%p, off=%lli, c=%zi)\n", in ds1682_eeprom_write()
/linux/arch/arm/boot/dts/st/
H A Dste-nomadik-stn8815.dtsi862 lli-bus-interface-ahb1;
863 lli-bus-interface-ahb2;
876 lli-bus-interface-ahb1;
877 lli-bus-interface-ahb2;
/linux/drivers/md/bcache/
H A Dsysfs.h70 ? "%lli\n" : \
/linux/Documentation/devicetree/bindings/clock/
H A Dsamsung,exynos5433-clock.yaml30 # CMU_CPIF which generates clocks for LLI (Low Latency Interface) IP
/linux/kernel/
H A Dasync.c319 pr_debug("async_continuing @ %i after %lli usec\n", task_pid_nr(current), in async_synchronize_cookie_domain()
/linux/fs/proc/
H A Dfd.c57 seq_printf(m, "pos:\t%lli\nflags:\t0%o\nmnt_id:\t%i\nino:\t%lu\n", in seq_show()
/linux/arch/arm/boot/dts/gemini/
H A Dgemini.dtsi421 lli-bus-interface-ahb2;
/linux/drivers/bus/
H A Domap_l3_noc.h160 {0x1700, "LLI",},
/linux/drivers/ata/
H A Dsata_dwc_460ex.c830 * This function allocates the scatter gather LLI table for AHB DMA
1088 * Make sure a LLI block is not created that will span 8K max FIS

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