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/linux/drivers/video/backlight/
H A Dcorgi_lcd.c3 * LCD/Backlight Driver for Sharp Zaurus Handhelds (various models)
10 * Converted to SPI device based LCD/Backlight device driver
20 #include <linux/lcd.h>
99 static int corgi_ssp_lcdtg_send(struct corgi_lcd *lcd, int reg, uint8_t val);
110 static void lcdtg_ssp_i2c_send(struct corgi_lcd *lcd, uint8_t data) in lcdtg_ssp_i2c_send() argument
112 corgi_ssp_lcdtg_send(lcd, POWERREG0_ADRS, data); in lcdtg_ssp_i2c_send()
116 static void lcdtg_i2c_send_bit(struct corgi_lcd *lcd, uint8_t data) in lcdtg_i2c_send_bit() argument
118 lcdtg_ssp_i2c_send(lcd, data); in lcdtg_i2c_send_bit()
119 lcdtg_ssp_i2c_send(lcd, data | POWER0_COM_DCLK); in lcdtg_i2c_send_bit()
120 lcdtg_ssp_i2c_send(lcd, data); in lcdtg_i2c_send_bit()
[all …]
H A Dltv350qv.c3 * Power control for Samsung LTV350QV Quarter VGA LCD Panel
10 #include <linux/lcd.h>
35 static int ltv350qv_write_reg(struct ltv350qv *lcd, u8 reg, u16 val) in ltv350qv_write_reg() argument
49 lcd->buffer[0] = LTV_OPC_INDEX; in ltv350qv_write_reg()
50 lcd->buffer[1] = 0x00; in ltv350qv_write_reg()
51 lcd->buffer[2] = reg & 0x7f; in ltv350qv_write_reg()
52 index_xfer.tx_buf = lcd->buffer; in ltv350qv_write_reg()
56 lcd->buffer[4] = LTV_OPC_DATA; in ltv350qv_write_reg()
57 lcd->buffer[5] = val >> 8; in ltv350qv_write_reg()
58 lcd->buffer[6] = val; in ltv350qv_write_reg()
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H A Dlms501kf03.c3 * lms501kf03 TFT LCD panel driver.
10 #include <linux/lcd.h>
101 static int lms501kf03_spi_write_byte(struct lms501kf03 *lcd, int addr, int data) in lms501kf03_spi_write_byte() argument
116 return spi_sync(lcd->spi, &msg); in lms501kf03_spi_write_byte()
119 static int lms501kf03_spi_write(struct lms501kf03 *lcd, unsigned char address, in lms501kf03_spi_write() argument
122 return lms501kf03_spi_write_byte(lcd, address, command); in lms501kf03_spi_write()
125 static int lms501kf03_panel_send_sequence(struct lms501kf03 *lcd, in lms501kf03_panel_send_sequence() argument
133 ret = lms501kf03_spi_write(lcd, COMMAND_ONLY, wbuf[i]); in lms501kf03_panel_send_sequence()
135 ret = lms501kf03_spi_write(lcd, DATA_ONLY, wbuf[i]); in lms501kf03_panel_send_sequence()
144 static int lms501kf03_ldi_init(struct lms501kf03 *lcd) in lms501kf03_ldi_init() argument
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H A Dams369fg06.c3 * ams369fg06 AMOLED LCD panel driver.
13 #include <linux/lcd.h>
157 static int ams369fg06_spi_write_byte(struct ams369fg06 *lcd, int addr, int data) in ams369fg06_spi_write_byte() argument
172 return spi_sync(lcd->spi, &msg); in ams369fg06_spi_write_byte()
175 static int ams369fg06_spi_write(struct ams369fg06 *lcd, unsigned char address, in ams369fg06_spi_write() argument
181 ret = ams369fg06_spi_write_byte(lcd, 0x70, address); in ams369fg06_spi_write()
183 ret = ams369fg06_spi_write_byte(lcd, 0x72, command); in ams369fg06_spi_write()
188 static int ams369fg06_panel_send_sequence(struct ams369fg06 *lcd, in ams369fg06_panel_send_sequence() argument
195 ret = ams369fg06_spi_write(lcd, wbuf[i], wbuf[i+1]); in ams369fg06_panel_send_sequence()
207 static int _ams369fg06_gamma_ctl(struct ams369fg06 *lcd, in _ams369fg06_gamma_ctl() argument
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H A Dili9320.c4 * ILI9320 LCD controller driver core.
14 #include <linux/lcd.h>
74 static void ili9320_reset(struct ili9320 *lcd) in ili9320_reset() argument
76 struct ili9320_platdata *cfg = lcd->platdata; in ili9320_reset()
88 static inline int ili9320_init_chip(struct ili9320 *lcd) in ili9320_init_chip() argument
92 ili9320_reset(lcd); in ili9320_init_chip()
94 ret = lcd->client->init(lcd, lcd->platdata); in ili9320_init_chip()
96 dev_err(lcd->dev, "failed to initialise display\n"); in ili9320_init_chip()
100 lcd->initialised = 1; in ili9320_init_chip()
104 static inline int ili9320_power_on(struct ili9320 *lcd) in ili9320_power_on() argument
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H A Dtdo24m.c3 * tdo24m - SPI-based drivers for Toppoly TDO24M series LCD panels
15 #include <linux/lcd.h>
32 int (*adj_mode)(struct tdo24m *lcd, int mode);
174 static int tdo24m_writes(struct tdo24m *lcd, const uint32_t *array) in tdo24m_writes() argument
176 struct spi_transfer *x = &lcd->xfer; in tdo24m_writes()
182 if (!lcd->color_invert && *p == CMD0(0x21)) in tdo24m_writes()
190 lcd->buf[0] = (data >> 8) & 0xff; in tdo24m_writes()
191 lcd->buf[1] = data & 0xff; in tdo24m_writes()
194 lcd->buf[0] = (data >> 16) & 0xff; in tdo24m_writes()
195 lcd->buf[1] = (data >> 8) & 0xff; in tdo24m_writes()
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H A Dplatform_lcd.c7 * Generic platform-device LCD power control interface.
12 #include <linux/lcd.h>
19 struct lcd_device *lcd; member
26 static inline struct platform_lcd *to_our_lcd(struct lcd_device *lcd) in to_our_lcd() argument
28 return lcd_get_data(lcd); in to_our_lcd()
31 static int platform_lcd_get_power(struct lcd_device *lcd) in platform_lcd_get_power() argument
33 struct platform_lcd *plcd = to_our_lcd(lcd); in platform_lcd_get_power()
38 static int platform_lcd_set_power(struct lcd_device *lcd, int power) in platform_lcd_set_power() argument
40 struct platform_lcd *plcd = to_our_lcd(lcd); in platform_lcd_set_power()
52 static bool platform_lcd_controls_device(struct lcd_device *lcd, struct device *display_device) in platform_lcd_controls_device() argument
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H A Dhx8357.c3 * Driver for the Himax HX-8357 LCD Controller
10 #include <linux/lcd.h>
216 struct hx8357_data *lcd = lcd_get_data(lcdev); in hx8357_spi_write_then_read() local
252 ret = spi_sync(lcd->spi, &msg); in hx8357_spi_write_then_read()
320 struct hx8357_data *lcd = lcd_get_data(lcdev); in hx8357_lcd_reset() local
323 gpiod_set_value(lcd->reset, 0); in hx8357_lcd_reset()
325 gpiod_set_value(lcd->reset, 1); in hx8357_lcd_reset()
327 gpiod_set_value(lcd->reset, 0); in hx8357_lcd_reset()
335 struct hx8357_data *lcd = lcd_get_data(lcdev); in hx8357_lcd_init() local
342 if (lcd->im_pins) { in hx8357_lcd_init()
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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmarvell,armada-xp-pinctrl.txt21 mpp0 0 gpio, ge0(txclkout), lcd(d0)
22 mpp1 1 gpio, ge0(txd0), lcd(d1)
23 mpp2 2 gpio, ge0(txd1), lcd(d2)
24 mpp3 3 gpio, ge0(txd2), lcd(d3)
25 mpp4 4 gpio, ge0(txd3), lcd(d4)
26 mpp5 5 gpio, ge0(txctl), lcd(d5)
27 mpp6 6 gpio, ge0(rxd0), lcd(d6)
28 mpp7 7 gpio, ge0(rxd1), lcd(d7)
29 mpp8 8 gpio, ge0(rxd2), lcd(d8)
30 mpp9 9 gpio, ge0(rxd3), lcd(d9)
[all …]
/linux/drivers/auxdisplay/
H A Dpanel.c7 * This code drives an LCD module (/dev/lcd), and a keypad (/dev/keypad)
10 * The LCD module may either be an HD44780-like 8-bit parallel LCD, or a 1-bit
18 * Several profiles are provided for commonly found LCD+keypad modules on the
27 * - make the LCD a part of a virtual screen of Vx*Vy
199 /* lcd-specific variables */
218 } lcd; variable
224 * Bit masks to convert LCD signals to parallel port outputs.
233 * one entry for each bit on the LCD
253 * LCD protocols
260 * LCD character sets
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H A Dhd44780.c3 * HD44780 Character LCD driver for Linux
41 static void hd44780_backlight(struct charlcd *lcd, enum charlcd_onoff on) in hd44780_backlight() argument
43 struct hd44780_common *hdc = lcd->drvdata; in hd44780_backlight()
63 /* write to an LCD panel register in 8 bit GPIO mode */
79 /* write to an LCD panel register in 4 bit GPIO mode */
105 /* Send a command to the LCD panel in 8 bit GPIO mode */
116 /* Send data to the LCD panel in 8 bit GPIO mode */
144 /* Send a command to the LCD panel in 4 bit GPIO mode */
155 /* Send 4-bits of a command to the LCD panel in raw 4 bit GPIO mode */
172 /* Send data to the LCD panel in 4 bit GPIO mode */
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H A Dimg-ascii-lcd.c22 * struct img_ascii_lcd_config - Configuration information about an LCD model
23 * @num_chars: the number of characters the LCD can display
36 * @base: the base address of the LCD registers
37 * @regmap: the regmap through which LCD registers are accessed
38 * @offset: the offset within regmap to the start of the LCD registers
98 pr_err_ratelimited("Failed to update LCD display: %d\n", err); in malta_update()
200 pr_err_ratelimited("Failed to update LCD display: %d\n", err); in sead3_update()
212 { .compatible = "img,boston-lcd", .data = &boston_config },
213 { .compatible = "mti,malta-lcd", .data = &malta_config },
214 { .compatible = "mti,sead3-lcd", .data = &sead3_config },
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/linux/Documentation/devicetree/bindings/display/panel/
H A Dpanel-edp-legacy.yaml29 # AU Optronics Corporation 10.1" WSVGA TFT LCD panel
31 # AUO B116XAK01 eDP TFT LCD panel
33 # AU Optronics Corporation 13.3" FHD (1920x1080) color TFT-LCD panel
35 # AU Optronics Corporation 13.3" WXGA (1366x768) TFT LCD panel
37 # BOE OPTOELECTRONICS TECHNOLOGY 10.1" WXGA TFT LCD panel
39 # BOE NV133FHM-N61 13.3" FHD (1920x1080) TFT LCD Panel
41 # BOE NV110WTM-N61 11.0" 2160x1440 TFT LCD Panel
43 # BOE NV133FHM-N62 13.3" FHD (1920x1080) TFT LCD Panel
47 # Innolux Corporation 11.6" WXGA (1366x768) TFT LCD panel
49 # Innolux Corporation 11.6" WXGA (1366x768) TFT LCD panel
[all …]
/linux/Documentation/devicetree/bindings/display/
H A Dingenic,lcd.yaml4 $id: http://devicetree.org/schemas/display/ingenic,lcd.yaml#
7 title: Ingenic SoCs LCD controller
14 pattern: "^lcd-controller@[0-9a-f]+$"
18 - ingenic,jz4740-lcd
19 - ingenic,jz4725b-lcd
20 - ingenic,jz4760-lcd
21 - ingenic,jz4760b-lcd
22 - ingenic,jz4770-lcd
23 - ingenic,jz4780-lcd
40 - const: lcd
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H A Dallwinner,sun4i-a10-tcon.yaml30 - const: allwinner,sun8i-a83t-tcon-lcd
34 - const: allwinner,sun9i-a80-tcon-lcd
36 - const: allwinner,sun20i-d1-tcon-lcd
47 - allwinner,sun50i-a64-tcon-lcd
48 - const: allwinner,sun8i-a83t-tcon-lcd
77 Name of the LCD pixel clock created.
103 - const: lcd
106 - const: lcd
110 - const: lcd
114 - const: lcd
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/linux/include/video/
H A Ds1d13xxxfb.h34 #define S1DREG_LCD_CLK_CNF 0x0014 /* LCD Pixel Clock Configuration Register */
44 #define S1DREG_LCD_DISP_HWIDTH 0x0032 /* LCD Horizontal Display Width Register: ((val)+1)*8)=pix/l…
45 #define S1DREG_LCD_NDISP_HPER 0x0034 /* LCD Horizontal Non-Display Period Register: ((val)+1)*8)=N…
48 #define S1DREG_LCD_DISP_VHEIGHT0 0x0038 /* LCD Vertical Display Height Register 0 */
49 #define S1DREG_LCD_DISP_VHEIGHT1 0x0039 /* LCD Vertical Display Height Register 1 */
50 #define S1DREG_LCD_NDISP_VPER 0x003A /* LCD Vertical Non-Display Period Register: (val)+1=NDlines …
53 #define S1DREG_LCD_DISP_MODE 0x0040 /* LCD Display Mode Register */
54 #define S1DREG_LCD_MISC 0x0041 /* LCD Miscellaneous Register */
55 #define S1DREG_LCD_DISP_START0 0x0042 /* LCD Display Start Address Register 0 */
56 #define S1DREG_LCD_DISP_START1 0x0043 /* LCD Display Start Address Register 1 */
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/linux/Documentation/ABI/testing/
H A Dsysfs-class-lcd1 What: /sys/class/lcd/<lcd>/lcd_power
6 Control LCD power, values are FB_BLANK_* from fb.h
10 What: /sys/class/lcd/<lcd>/contrast
15 Current contrast of this LCD device. Value is between 0 and
16 /sys/class/lcd/<lcd>/max_contrast.
18 What: /sys/class/lcd/<lcd>/max_contrast
23 Maximum contrast for this LCD device.
/linux/include/linux/
H A Dlcd.h3 * LCD Lowlevel Control Abstraction
43 /* Get the LCD panel power status (0: full on, 1..3: controller
46 /* Enable or disable power to the LCD (0: on; 4: off, see FB_BLANK_XXX) */
50 /* Set LCD panel contrast */
54 * Set LCD panel mode (resolutions ...)
56 int (*set_mode)(struct lcd_device *lcd, u32 xres, u32 yres);
59 * Check if the LCD controls the given display device. This
61 * the display is always the one controlled by the LCD.
66 * the LCD, return true. Otherwise return false.
68 bool (*controls_device)(struct lcd_device *lcd, struct device *display_device);
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/linux/drivers/hid/
H A Dhid-picolcd.h13 #define REPORT_ERROR_CODE 0x10 /* LCD: IN[16] */
23 #define REPORT_KEY_STATE 0x11 /* LCD: IN[2] */
24 #define REPORT_IR_DATA 0x21 /* LCD: IN[63] */
25 #define REPORT_EE_DATA 0x32 /* LCD: IN[63] */
26 #define REPORT_MEMORY 0x41 /* LCD: IN[63] */
27 #define REPORT_LED_STATE 0x81 /* LCD: OUT[1] */
28 #define REPORT_BRIGHTNESS 0x91 /* LCD: OUT[1] */
29 #define REPORT_CONTRAST 0x92 /* LCD: OUT[1] */
30 #define REPORT_RESET 0x93 /* LCD: OUT[2] */
31 #define REPORT_LCD_CMD 0x94 /* LCD: OUT[63] */
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/linux/Documentation/devicetree/bindings/auxdisplay/
H A Dimg,ascii-lcd.yaml4 $id: http://devicetree.org/schemas/auxdisplay/img,ascii-lcd.yaml#
7 title: ASCII LCD displays on Imagination Technologies boards
15 - img,boston-lcd
16 - mti,malta-lcd
17 - mti,sead3-lcd
25 Offset in bytes to the LCD registers within the system controller
40 const: img,boston-lcd
52 lcd: lcd@17fff000 {
53 compatible = "img,boston-lcd";
/linux/arch/arm/mach-sa1100/
H A Djornada720.c63 {0x0014,0x11}, // LCD Pixel Clock Configuration Register
73 {0x0032,0x4F}, // LCD Horizontal Display Width Register
74 {0x0034,0x07}, // LCD Horizontal Non-Display Period Register
77 {0x0038,0xEF}, // LCD Vertical Display Height Register 0
78 {0x0039,0x00}, // LCD Vertical Display Height Register 1
79 {0x003A,0x13}, // LCD Vertical Non-Display Period Register
82 {0x0040,0x05}, // LCD Display Mode Register (2:4bpp,3:8bpp,5:16bpp)
83 {0x0041,0x00}, // LCD Miscellaneous Register
84 {0x0042,0x00}, // LCD Display Start Address Register 0
85 {0x0043,0x00}, // LCD Display Start Address Register 1
[all …]
/linux/drivers/pinctrl/sunxi/
H A Dpinctrl-sun8i-v3s.c167 SUNXI_FUNCTION(0x2, "lcd"), /* D2 */
173 SUNXI_FUNCTION(0x2, "lcd"), /* D3 */
179 SUNXI_FUNCTION(0x2, "lcd"), /* D4 */
185 SUNXI_FUNCTION(0x2, "lcd"), /* D5 */
191 SUNXI_FUNCTION(0x2, "lcd"), /* D6 */
197 SUNXI_FUNCTION(0x2, "lcd"), /* D7 */
203 SUNXI_FUNCTION(0x2, "lcd"), /* D10 */
209 SUNXI_FUNCTION(0x2, "lcd"), /* D11 */
215 SUNXI_FUNCTION(0x2, "lcd"), /* D12 */
221 SUNXI_FUNCTION(0x2, "lcd"), /* D13 */
[all …]
/linux/drivers/video/fbdev/omap2/omapfb/displays/
H A DKconfig55 This is the LCD panel used on Nokia N900
58 tristate "LG.Philips LB035Q02 LCD Panel"
61 LCD Panel used on the Gumstix Overo Palo35
64 tristate "Sharp LS037V7DW01 LCD Panel"
68 LCD Panel used in TI's SDP3430 and EVM boards
71 tristate "TPO TD028TTEC1 LCD Panel"
75 LCD panel used in Openmoko.
78 tristate "TPO TD043MTEA1 LCD Panel"
82 LCD Panel used in OMAP3 Pandora
90 This NEC NL8048HL11 panel is TFT LCD used in the
/linux/drivers/video/fbdev/
H A Dsa1100fb.h3 * -- StrongARM 1100 LCD Controller Frame Buffer Device
15 #define LCCR0 0x0000 /* LCD Control Reg. 0 */
16 #define LCSR 0x0004 /* LCD Status Reg. */
17 #define DBAR1 0x0010 /* LCD DMA Base Address Reg. channel 1 */
18 #define DCAR1 0x0014 /* LCD DMA Current Address Reg. channel 1 */
19 #define DBAR2 0x0018 /* LCD DMA Base Address Reg. channel 2 */
20 #define DCAR2 0x001C /* LCD DMA Current Address Reg. channel 2 */
21 #define LCCR1 0x0020 /* LCD Control Reg. 1 */
22 #define LCCR2 0x0024 /* LCD Control Reg. 2 */
23 #define LCCR3 0x0028 /* LCD Control Reg. 3 */
[all …]
/linux/drivers/video/fbdev/via/
H A Dviamode.c26 {VIACR, CR88, 0xFF, 0x40}, /* LCD Panel Type */
27 {VIACR, CR89, 0xFF, 0x00}, /* LCD Timing Control 0 */
28 {VIACR, CR8A, 0xFF, 0x88}, /* LCD Timing Control 1 */
29 {VIACR, CR8B, 0xFF, 0x69}, /* LCD Power Sequence Control 0 */
30 {VIACR, CR8C, 0xFF, 0x57}, /* LCD Power Sequence Control 1 */
31 {VIACR, CR8D, 0xFF, 0x00}, /* LCD Power Sequence Control 2 */
32 {VIACR, CR8E, 0xFF, 0x7B}, /* LCD Power Sequence Control 3 */
33 {VIACR, CR8F, 0xFF, 0x03}, /* LCD Power Sequence Control 4 */
34 {VIACR, CR90, 0xFF, 0x30}, /* LCD Power Sequence Control 5 */
71 {VIACR, CR77, 0xFF, 0x00}, /* LCD scaling Factor */
[all …]

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