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Searched +full:lat +full:- +full:soc (Results 1 – 9 of 9) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/media/
H A Dmediatek,vcodec-subdev-decoder.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/mediatek,vcodec-subdev-decoder.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Yunfei Dong <yunfei.dong@mediatek.com>
14 MediaTek SoCs that supports high-resolution decoding functionalities.
19 +------------------------------------------------+------------------------------+
21 | input -> LAT-SoC HW -> LAT HW -> LAT buffer --|--> Core HW -> output buffer |
23 +--------------||-----------||-------------------+-------||---------------------+
24 LAT Workqueue | Core Workqueue <parent>
[all …]
/freebsd/sys/arm64/nvidia/tegra210/
H A Dtegra210_cpufreq.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
72 {204000000UL, 1007452, -23865, 370},
73 {306000000UL, 1052709, -24875, 370},
74 {408000000UL, 1099069, -25895, 370},
75 {510000000UL, 1146534, -26905, 370},
76 {612000000UL, 1195102, -27915, 370},
77 {714000000UL, 1244773, -28925, 370},
78 {816000000UL, 1295549, -29935, 370},
79 {918000000UL, 1347428, -30955, 370},
[all …]
/freebsd/sys/arm/nvidia/tegra124/
H A Dtegra124_cpufreq.c1 /*-
73 { 204000000ULL, 1112619, -29295, 402},
74 { 306000000ULL, 1150460, -30585, 402},
75 { 408000000ULL, 1190122, -31865, 402},
76 { 510000000ULL, 1231606, -33155, 402},
77 { 612000000ULL, 1274912, -34435, 402},
78 { 714000000ULL, 1320040, -35725, 402},
79 { 816000000ULL, 1366990, -37005, 402},
80 { 918000000ULL, 1415762, -38295, 402},
81 {1020000000ULL, 1466355, -39575, 402},
[all …]
/freebsd/sys/arm/broadcom/bcm2835/
H A Dbcm2835_cpufreq.c1 /*-
2 * Copyright (C) 2013-2015 Daisuke Aoyama <aoyama@peach.ne.jp>
71 #define MIN_OVER_VOLTAGE -16
73 #define MSG_ERROR -999999999
85 /* ARM->VC mailbox property semaphore */
115 { "broadcom,bcm2835-vc", 1 },
116 { "broadcom,bcm2708-vc", 1 },
176 err = bcm2835_firmware_property(sc->firmware, in bcm2835_cpufreq_get_clock_rate()
179 device_printf(sc->dev, "can't get clock rate (id=%u)\n", in bcm2835_cpufreq_get_clock_rate()
217 err = bcm2835_firmware_property(sc->firmware, in bcm2835_cpufreq_get_max_clock_rate()
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt8192.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/clock/mt8192-clk.h>
9 #include <dt-bindings/gce/mt8192-gce.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/memory/mt8192-larb-port.h>
13 #include <dt-bindings/pinctrl/mt8192-pinfunc.h>
14 #include <dt-bindings/phy/phy.h>
15 #include <dt-bindings/power/mt8192-power.h>
[all …]
H A Dmt8195.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/clock/mt8195-clk.h>
9 #include <dt-bindings/gce/mt8195-gce.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/memory/mt8195-memory-port.h>
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/pinctrl/mt8195-pinfunc.h>
15 #include <dt-bindings/power/mt8195-power.h>
[all …]
H A Dmt8188.dtsi1 // SPDX-License-Identifier: GPL-2.0+
7 /dts-v1/;
8 #include <dt-bindings/clock/mediatek,mt8188-clk.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/mailbox/mediatek,mt8188-gce.h>
12 #include <dt-bindings/memory/mediatek,mt8188-memory-port.h>
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/pinctrl/mediatek,mt8188-pinfunc.h>
15 #include <dt-bindings/power/mediatek,mt8188-power.h>
[all …]
/freebsd/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h2 * Copyright (c) 2017-2018 Cavium, Inc.
78 …- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl…
79 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea…
80 …s:R DataWidth:0x6 // 0 - RX target read and config sync fifo push overflow 1 - RX header syn…
81 …ataWidth:0x14 // 4:0 - TXCPL sync fifo pop status 9:5 - TXR sync fifo pop status 14:10 - TXW hea…
88 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of …
90 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
116 … (0x1<<9) // Fast back-to-back transaction ena…
128 … (0x1<<23) // Fast back-to-back capable. Not ap…
145 …l has_io_bar=0. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
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/freebsd/share/dict/
H A Dweb299810 Jean-Christophe
99811 Jean-Pierre
104613 lat
184360 soc