| /linux/drivers/input/gameport/ |
| H A D | lightning.c | 34 struct l4 { struct
39 static struct l4 l4_ports[8]; argument
42 * l4_wait_ready() waits for the L4 to become ready.
59 struct l4 *l4 = gameport->port_data; in l4_cooked_read() local
64 outb(L4_SELECT_DIGITAL + (l4->port >> 2), L4_PORT); in l4_cooked_read()
67 outb(l4->port & 3, L4_PORT); in l4_cooked_read()
92 struct l4 *l4 = gameport->port_data; in l4_open() local
94 if (l4->port != 0 && mode != GAMEPORT_MODE_COOKED) in l4_open()
101 * l4_getcal() reads the L4 with calibration values.
137 * l4_setcal() programs the L4 with calibration values.
[all …]
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| /linux/drivers/infiniband/hw/hfi1/ |
| H A D | trace_ibhdrs.h | 69 u8 l4, u32 dest_qpn, u32 src_qpn,
73 const char *hfi1_trace_get_packet_l4_str(u8 l4);
87 u8 *l4, u8 *rc, u8 *sc,
92 u8 age, bool becn, bool fecn, u8 l4,
97 const char *hfi1_trace_fmt_rest(struct trace_seq *p, bool bypass, u8 l4,
105 #define __parse_ib_ehdrs(op, l4, dest_qpn, src_qpn, ehdrs) \ argument
106 parse_everbs_hdrs(p, op, l4, dest_qpn, src_qpn, ehdrs)
127 __field(u8, l4)
163 &__entry->l4,
172 if (__entry->l4 == OPA_16B_L4_FM) {
[all …]
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| H A D | trace.c | 28 u8 l4 = hfi1_16B_get_l4(hdr); in __get_16b_hdr_len() local
30 if (l4 == OPA_16B_L4_FM) { in __get_16b_hdr_len()
35 if (l4 == OPA_16B_L4_IB_LOCAL) in __get_16b_hdr_len()
61 const char *hfi1_trace_get_packet_l4_str(u8 l4) in hfi1_trace_get_packet_l4_str() argument
63 if (l4) in hfi1_trace_get_packet_l4_str()
170 u8 *l4, u8 *rc, u8 *sc, in hfi1_trace_parse_16b_hdr() argument
177 *l4 = hfi1_16B_get_l4(hdr); in hfi1_trace_parse_16b_hdr()
189 #define LRH_16B_PRN "age:%d becn:%d fecn:%d l4:%d " \
192 u8 age, bool becn, bool fecn, u8 l4, in hfi1_trace_fmt_lrh() argument
203 age, becn, fecn, l4, rc, sc, pkey, entropy); in hfi1_trace_fmt_lrh()
[all …]
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| /linux/arch/sparc/kernel/ |
| H A D | rtrap_64.S | 86 sethi %hi(0xf << 20), %l4
87 and %l1, %l4, %l4
88 andn %l1, %l4, %l1
90 srl %l4, 20, %l4
97 sethi %hi(0xf << 20), %l4
98 and %l1, %l4, %l4
99 andn %l1, %l4, %l1
100 srl %l4, 20, %l4
117 sethi %hi(0xf << 20), %l4
118 and %l1, %l4, %l4
[all …]
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| H A D | trampoline_64.S | 124 * %l4: TTE base
130 sethi %hi(kern_locked_tte_data), %l4
131 ldx [%l4 + %lo(kern_locked_tte_data)], %l4
163 add %l4, %g1, %g2
196 add %l4, %g1, %g2
222 sethi %hi(kern_locked_tte_data), %l4
223 ldx [%l4 + %lo(kern_locked_tte_data)], %l4
233 add %l4, %g2, %o2
241 add %l4, %g2, %o2
|
| H A D | etrap_64.S | 26 * %g4 and %g5 will be preserved %l4 and %l5 respectively.
95 mov PRIMARY_CONTEXT, %l4
124 661: stxa %g3, [%l4] ASI_DMMU
127 stxa %g3, [%l4] ASI_MMU
130 sethi %hi(KERNBASE), %l4
131 flush %l4
133 2: mov %g4, %l4
198 add %l6, TI_FPSAVED + 1, %l4
205 stb %g0, [%l4 + %l3]
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| H A D | head_64.S | 183 ldx [%sp + 2047 + 128 + 0x20], %l4 ! prom root node
186 stw %l4, [%l1]
203 stx %l4, [%sp + 2047 + 128 + 0x18] ! arg1, prom_root_node
231 ldx [%sp + 2047 + 128 + 0x20], %l4 ! chosen device node
246 stx %l4, [%sp + 2047 + 128 + 0x18] ! arg1, chosen_node
281 mov (1b - prom_boot_mapping_mode), %l4
282 sub %l0, %l4, %l4
283 stw %l1, [%l4]
284 mov (1b - prom_boot_mapping_phys_high), %l4
285 sub %l0, %l4, %l4
[all …]
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| H A D | urtt_fill.S | 35 mov %g4, %l4
81 mov %l4, %o2
85 1: mov %l4, %o1
92 mov %l4, %o1
|
| H A D | sun4v_tlb_miss.S | 219 mov %l4, %o1
246 mov %l4, %o1
269 mov %l4, %o1
285 mov %l4, %o1
301 mov %l4, %o1
317 mov %l4, %o1
351 mov %l4, %o1
376 mov %l4, %o1
392 mov %l4, %o1
|
| H A D | winfixup.S | 60 stx %l4, [%g3 + TI_REG_WINDOW + 0x20]
77 stw %l4, [%g3 + TI_REG_WINDOW + 0x10]
124 mov %l4, %o2
128 1: mov %l4, %o1
147 mov %l4, %o1
|
| /linux/drivers/clk/ti/ |
| H A D | clk-44xx.c | 533 "l4-per-clkctrl:00c0:26",
573 { OMAP4_TIMER10_CLKCTRL, omap4_timer10_bit_data, CLKF_SW_SUP, "l4-per-clkctrl:0008:24" },
574 { OMAP4_TIMER11_CLKCTRL, omap4_timer11_bit_data, CLKF_SW_SUP, "l4-per-clkctrl:0010:24" },
575 { OMAP4_TIMER2_CLKCTRL, omap4_timer2_bit_data, CLKF_SW_SUP, "l4-per-clkctrl:0018:24" },
576 { OMAP4_TIMER3_CLKCTRL, omap4_timer3_bit_data, CLKF_SW_SUP, "l4-per-clkctrl:0020:24" },
577 { OMAP4_TIMER4_CLKCTRL, omap4_timer4_bit_data, CLKF_SW_SUP, "l4-per-clkctrl:0028:24" },
578 { OMAP4_TIMER9_CLKCTRL, omap4_timer9_bit_data, CLKF_SW_SUP, "l4-per-clkctrl:0030:24" },
591 { OMAP4_MCBSP4_CLKCTRL, omap4_mcbsp4_bit_data, CLKF_SW_SUP, "l4-per-clkctrl:00c0:24" },
598 { OMAP4_SLIMBUS2_CLKCTRL, omap4_slimbus2_bit_data, CLKF_SW_SUP, "l4-per-clkctrl:0118:8" },
633 { OMAP4_TIMER1_CLKCTRL, omap4_timer1_bit_data, CLKF_SW_SUP, "l4-wkup-clkctrl:0020:24" },
[all …]
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| /linux/drivers/net/ethernet/amazon/ena/ |
| H A D | ena_eth_io_defs.h | 54 * 12:8 : l4_proto_idx - L4 protocol. This field need
62 * 17 : l4_csum_partial - L4 partial checksum. when
63 * set to 0, the ENA calculates the L4 checksum,
68 * the checksum field of the L4 is used instead. When
70 * must not include the tcp length field. L4 partial
89 * set to the sum of L4 header offset and L4 header
136 * 21:16 : l4_hdr_len_in_words - counts the L4 header
138 * that L4 header appears right after L3 header and
139 * L4 offset is based on l3_hdr_off+l3_hdr_len
207 * 14 : l4_csum_err - when set, either the L4
[all …]
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| /linux/drivers/net/ethernet/huawei/hinic/ |
| H A D | hinic_tx.c | 200 union hinic_l4 *l4, in get_inner_l3_l4_type() argument
216 if (exthdr != l4->hdr) { in get_inner_l3_l4_type()
228 static void get_inner_l4_info(struct sk_buff *skb, union hinic_l4 *l4, in get_inner_l4_info() argument
241 *l4_len = l4->tcp->doff * 4; in get_inner_l4_info()
242 *offset = *l4_len + TRANSPORT_OFFSET(l4->hdr, skb); in get_inner_l4_info()
248 *offset = TRANSPORT_OFFSET(l4->hdr, skb); in get_inner_l4_info()
258 *offset = TRANSPORT_OFFSET(l4->hdr, skb); in get_inner_l4_info()
280 union hinic_l4 l4; in offload_tso() local
295 l4.hdr = skb_transport_header(skb); in offload_tso()
311 l4.udp->check = ~csum_magic(&ip, IPPROTO_UDP); in offload_tso()
[all …]
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| /linux/arch/arm/mach-omap2/ |
| H A D | omap_hwmod_2xxx_interconnect_data.c | 57 /* L4 CORE -> UART1 interface */
65 /* L4 CORE -> UART2 interface */
73 /* L4 PER -> UART3 interface */
81 /* l4 core -> mcspi1 interface */
89 /* l4 core -> mcspi2 interface */
242 /* l4 core -> sham interface */
250 /* l4 core -> aes interface */
|
| /linux/drivers/net/ethernet/huawei/hinic3/ |
| H A D | hinic3_tx.c | 206 /* initialize l4 offset and offload */
207 static void get_inner_l4_info(struct sk_buff *skb, union hinic3_l4 *l4, in get_inner_l4_info() argument
215 *offset = (l4->tcp->doff << TCP_HDR_DATA_OFF_UNIT_SHIFT) + in get_inner_l4_info()
216 TRANSPORT_OFFSET(l4->hdr, skb); in get_inner_l4_info()
221 *offset = TRANSPORT_OFFSET(l4->hdr, skb); in get_inner_l4_info()
246 union hinic3_l4 l4; in hinic3_tx_csum() local
252 l4.hdr = skb_transport_header(skb); in hinic3_tx_csum()
253 if (l4.hdr != exthdr) in hinic3_tx_csum()
274 union hinic3_l4 *l4, in get_inner_l3_l4_type() argument
287 if (exthdr != l4->hdr) { in get_inner_l3_l4_type()
[all …]
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| /linux/tools/perf/pmu-events/arch/powerpc/power9/ |
| H A D | metrics.json | 817 …"BriefDescription": "estimate of distant L4 miss rates with measured DL4 latency as a %of dcache m…
883 …"BriefDescription": "estimate of remote L4 miss rates with measured RL4 latency as a %of dcache mi…
1015 "BriefDescription": "% of ICache reloads from Distant L4 per Inst",
1063 "BriefDescription": "% of ICache reloads from Local L4 per Inst",
1087 "BriefDescription": "% of ICache reloads from Remote L4 per Inst",
1129 "BriefDescription": "% of ICache reloads from Distant L4",
1177 "BriefDescription": "% of ICache reloads from Local L4",
1201 "BriefDescription": "% of ICache reloads from Remote L4",
1249 "BriefDescription": "Distant L4 average load latency",
1303 "BriefDescription": "Local L4 average load latency",
[all …]
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| /linux/tools/perf/pmu-events/arch/powerpc/power8/ |
| H A D | metrics.json | 279 … "BriefDescription": "Cycles stalled by D-Cache Misses that resolved in local memory or local L4",
468 "BriefDescription": "% of DL1 Reloads from Distant L4 per Inst",
558 "BriefDescription": "% of DL1 Reloads from Local L4 per Inst",
618 "BriefDescription": "% of DL1 dL1_Reloads from Distant L4",
702 "BriefDescription": "% of DL1 dL1_Reloads from Local L4",
726 "BriefDescription": "% of DL1 dL1_Reloads from Remote L4",
756 …"BriefDescription": "estimate of distant L4 miss rates with measured DL4 latency as a %of dcache m…
804 …"BriefDescription": "estimate of Local L4 miss rates with measured LL4 latency as a %of dcache mis…
828 …"BriefDescription": "estimate of remote L4 miss rates with measured RL4 latency as a %of dcache mi…
1062 "BriefDescription": "% of ICache reloads from Distant L4 per Inst",
[all …]
|
| H A D | marked.json | 59 …"BriefDescription": "The processor's data cache was reloaded from another chip's L4 on a different…
65 …"BriefDescription": "Duration in cycles to reload from another chip's L4 on a different Node or Gr…
215 …"BriefDescription": "The processor's data cache was reloaded from the local chip's L4 cache due to…
221 …"BriefDescription": "Duration in cycles to reload from the local chip's L4 cache due to a marked l…
239 … "The processor's data cache was reloaded from a memory location including L4 from local remote or…
245 …"BriefDescription": "Duration in cycles to reload from a memory location including L4 from local r…
299 …"BriefDescription": "The processor's data cache was reloaded from another chip's L4 on the same No…
305 …"BriefDescription": "Duration in cycles to reload from another chip's L4 on the same Node or Group…
377 …"BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's L4 on a differ…
443 …"BriefDescription": "A Page Table Entry was loaded into the TLB from the local chip's L4 cache due…
[all …]
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| H A D | frontend.json | 101 …"BriefDescription": "The processor's Instruction cache was reloaded from another chip's L4 on a di…
102 …"PublicDescription": "The processor's Instruction cache was reloaded from another chip's L4 on a d…
185 …"BriefDescription": "The processor's Instruction cache was reloaded from the local chip's L4 cache…
186 …"PublicDescription": "The processor's Instruction cache was reloaded from the local chip's L4 cach…
197 …rocessor's Instruction cache was reloaded from a memory location including L4 from local remote or…
198 …rocessor's Instruction cache was reloaded from a memory location including L4 from local remote or…
227 …"BriefDescription": "The processor's Instruction cache was reloaded from another chip's L4 on the …
228 …"PublicDescription": "The processor's Instruction cache was reloaded from another chip's L4 on the…
305 …"BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's L4 on a differ…
371 …"BriefDescription": "A Page Table Entry was loaded into the TLB from the local chip's L4 cache due…
[all …]
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| H A D | memory.json | 29 … "The processor's data cache was reloaded from a memory location including L4 from local remote or…
30 … "The processor's data cache was reloaded from a memory location including L4 from local remote or…
35 …"BriefDescription": "The processor's data cache was reloaded from another chip's L4 on the same No…
36 …"PublicDescription": "The processor's data cache was reloaded from another chip's L4 on the same N…
95 …"BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's L4 on a differ…
161 "BriefDescription": "Memory prefetch for this lpar. Includes L4",
167 …Reads from Memory from this lpar (includes data/inst/xlate/l1prefetch/inst prefetch). Includes L4",
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| /linux/net/core/ |
| H A D | gso.c | 163 * payload, i.e. the size of the L4 (UDP) header is already in skb_gso_transport_seglen()
175 * individual segments, including Layer3 (IP, IPv6) and L4 headers (TCP/UDP).
193 * individual segments, including MAC/L2, Layer3 (IP, IPv6) and L4
210 * - L3+L4+payload size (e.g. IP forwarding)
211 * - L2+L3+L4+payload size (e.g. sanity check before passing to driver)
251 * wanted MTU once split. It considers L3 headers, L4 headers, and the
267 * length once split, including L2, L3 and L4 headers and the payload.
|
| /linux/Documentation/netlink/specs/ |
| H A D | conntrack.yaml | 131 doc: l4 protocol number
136 doc: l4 source port
141 doc: l4 source port
146 doc: l4 icmp id
157 doc: l4 icmp id
207 doc: conntrack l4 information
381 doc: conntrack l3+l4 protocol information, original direction
386 doc: conntrack l3+l4 protocol information, reply direction
|
| /linux/arch/arm/boot/dts/gemini/ |
| H A D | gemini-wbd111.dts | 50 led-green-l4 {
51 label = "wbd111:green:L4";
56 led-red-l4 {
57 label = "wbd111:red:L4";
|
| H A D | gemini-wbd222.dts | 49 led-green-l4 {
50 label = "wbd111:green:L4";
55 led-red-l4 {
56 label = "wbd111:red:L4";
|
| /linux/drivers/bus/ |
| H A D | omap_l3_smx.h | 269 /* L4 CORE TA */
271 /* L4 PER TA */
277 /* L4 EMU TA */
281 /* L4 CORE TA */
283 /* L4 PER TA */
285 /* L4 EMU TA */
|